google-bonito: mirror sargo changes

Mirror the following changes to the Pixel 3a:

    device-google-sargo: add sensors support (MR 5329)
    google-sargo: add gpi to modules-initfs to fix fde (MR 5347)
    google-sargo: do not enable HexagonRPCD on every upgrade (MR 5400)
    google-sargo: stop HexagonRPCD on suspend (MR 5400)
    google-sargo: make necessary userspace changes for kernel v6.10.2

.ci/autoupdate.sh

@@ -81,6 +81,9 @@ update_linux_next() {
 	# Update the checksums
 	pmbootstrap checksum linux-next
 
+	# Ensure it builds
+	pmbootstrap --details-to-stdout build linux-next
+
 	# Commit
 	git add device/testing/linux-next/APKBUILD
 	git commit -S -m "linux-next: upgrade to $latest"

.ci/kconfig.sh

@@ -6,7 +6,6 @@
 
 if [ "$(id -u)" = 0 ]; then
 	set -x
-	export PMBOOTSTRAP_TAG=master
 	wget "https://gitlab.com/postmarketOS/ci-common/-/raw/master/install_pmbootstrap.sh"
 	sh ./install_pmbootstrap.sh
 	exec su "${TESTUSER:-pmos}" -c "sh -e $0"

.ci/lib/build_changed_aports.py

@@ -2,6 +2,7 @@
 # Copyright 2021 Oliver Smith
 # SPDX-License-Identifier: GPL-3.0-or-later
 import sys
+import pathlib
 
 # Same dir
 import common
@@ -11,6 +12,7 @@ import add_pmbootstrap_to_import_path
 import pmb.parse
 import pmb.parse._apkbuild
 import pmb.helpers.pmaports
+from pmb.core.context import get_context
 
 
 def build_strict(packages, arch):
@@ -59,15 +61,16 @@ if __name__ == "__main__":
         verify_checksums(packages, arch)
         sys.exit(0)
 
-    # Prepare "args" to use pmbootstrap code
-    sys.argv = ["pmbootstrap", "chroot"]
+    # Load context
+    sys.argv = ["pmbootstrap.py", "chroot"]
     args = pmb.parse.arguments()
+    context = get_context()
 
     # Filter out packages that can't be built for given arch
     # (Iterate over copy of packages, because we modify it in this loop)
     for package in packages.copy():
-        apkbuild_path = pmb.helpers.pmaports.find(args, package)
-        apkbuild = pmb.parse._apkbuild.apkbuild(f"{apkbuild_path}/APKBUILD")
+        apkbuild_path = pmb.helpers.pmaports.find(package)
+        apkbuild = pmb.parse._apkbuild.apkbuild(pathlib.Path(apkbuild_path, "APKBUILD"))
 
         if not pmb.helpers.pmaports.check_arches(apkbuild["arch"], arch):
             print(f"{package}: not enabled for {arch}, skipping")

.ci/lib/check_changed_aports_versions.py

@@ -3,6 +3,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 import glob
+import pathlib
 import tempfile
 import sys
 import subprocess
@@ -15,8 +16,9 @@ import add_pmbootstrap_to_import_path  # noqa
 import pmb.parse
 import pmb.parse.version
 import pmb.helpers.logging
+from pmb.core.context import get_context
 
-def get_package_contents(args, package, revision, check=True):
+def get_package_contents(package, revision, check=True):
     # Redirect stderr to /dev/null, so git doesn't complain about files not
     # existing in upstream branch for new packages
     stderr = None
@@ -37,15 +39,16 @@ def get_package_contents(args, package, revision, check=True):
     with tempfile.TemporaryDirectory() as tempdir:
         with open(tempdir + "/APKBUILD", "w", encoding="utf-8") as handle:
             handle.write(apkbuild_content)
-        parsed = pmb.parse.apkbuild(tempdir + "/APKBUILD", False, False)
+        parsed = pmb.parse.apkbuild(pathlib.Path(tempdir, "APKBUILD"),
+                                    False, False)
 
     return parsed
 
 
-def get_package_version(args, package, revision, check=True):
+def get_package_version(package, revision, check=True):
     """ returns version in the format "{pkgver}-r{pkgrel}", or None if no 
         matching package is found """
-    parsed = get_package_contents(args, package, revision, check)
+    parsed = get_package_contents(package, revision, check)
     if parsed is None:
         return None
     return parsed["pkgver"] + "-r" + parsed["pkgrel"]
@@ -91,7 +94,7 @@ def exit_with_error_message():
     exit(1)
 
 
-def check_versions(args, packages):
+def check_versions(packages):
     error = False
 
     # Get relevant commits: compare HEAD against upstream branch or HEAD~1
@@ -110,8 +113,8 @@ def check_versions(args, packages):
 
     for package in packages:
         # Get versions, skip new packages
-        head = get_package_version(args, package, "HEAD")
-        upstream = get_package_version(args, package, commit, False)
+        head = get_package_version(package, "HEAD")
+        upstream = get_package_version(package, commit, False)
         if not upstream:
             if head.rpartition('r')[2] != "0":
                 print(f"- {package}: {head} (HEAD) (new package) [ERROR]")
@@ -129,8 +132,8 @@ def check_versions(args, packages):
 
         # Additional checks for device packages
         if package.startswith('device-'):
-            head_parsed = get_package_contents(args, package, "HEAD", False)
-            upstream_parsed = get_package_contents(args, package, commit, False)
+            head_parsed = get_package_contents(package, "HEAD", False)
+            upstream_parsed = get_package_contents(package, commit, False)
 
             # checksums did not change
             if head_parsed["sha512sums"] == upstream_parsed["sha512sums"]:
@@ -191,8 +194,12 @@ if __name__ == "__main__":
     # Initialize args (so we can use pmbootstrap's APKBUILD parsing)
     sys.argv = ["pmbootstrap.py", "chroot"]
     args = pmb.parse.arguments()
-    pmb.helpers.logging.init(args)
+    context = get_context()
+
+    # pmb.helpers.logging.init(args)
+    pmb.helpers.logging.init(context.log, args.verbose, context.details_to_stdout)
+
 
     # Verify package versions
     print("checking changed package versions...")
-    check_versions(args, packages)
+    check_versions(packages)

.ci/lib/check_changed_kernels.py

@@ -17,7 +17,7 @@ def check_kconfig(pkgnames):
         pkgname = pkgnames[i]
         print(f"  ({i+1}/{len(pkgnames)}) {pkgname}")
 
-        p = subprocess.run(["pmbootstrap", "kconfig", "check", pkgname],
+        p = subprocess.run(["pmbootstrap", "kconfig", "check", "--keep-going", pkgname],
                            check=False)
 
         if p.returncode:
@@ -27,7 +27,7 @@ def check_kconfig(pkgnames):
 
 
 def check_kconfig_all():
-    p = subprocess.run(["pmbootstrap", "kconfig", "check"], check=False)
+    p = subprocess.run(["pmbootstrap", "kconfig", "check", "--keep-going"], check=False)
     return p.returncode == 0
 
 

.ci/pytest.sh

@@ -19,16 +19,11 @@ if [ -z "$(command -v pytest)" ]; then
 	exit 1
 fi
 
-# Wrap pmbootstrap to use this repository for --aports
 pmaports="$(cd "$(dirname "$0")"/..; pwd -P)"
-_pmbootstrap="$(command -v pmbootstrap)"
-pmbootstrap() {
-	"$_pmbootstrap" --aports="$pmaports" "$@"
-}
-
 # Make sure that the work folder format is up to date, and that there are no
 # mounts from aborted test cases (pmbootstrap#1595)
 pmbootstrap work_migrate
+pmbootstrap config aports "$pmaports"
 pmbootstrap -q shutdown
 
 # Make sure we have a valid device (pmbootstrap#1128)

.ci/testcases/conftest.py

@@ -2,24 +2,33 @@
 # Copyright 2021 Oliver Smith
 # SPDX-License-Identifier: GPL-3.0-or-later
 
+from pathlib import Path
 import add_pmbootstrap_to_import_path
 import pmb.parse
+from pmb.helpers.args import init as init_args
+from pmb.types import PmbArgs
+import pmb.config
+from pmb.core.pkgrepo import pkgrepo_default_path
 import pytest
 import sys
 import os
 
-
-@pytest.fixture
+@pytest.fixture(scope="session", autouse=True)
 def args(request):
     # Initialize args
-    pmaports = os.path.realpath(f"{os.path.dirname(__file__)}/../..")
-    sys.argv = ["pmbootstrap",
-                "--aports", pmaports,
-                "--log", "$WORK/log_testsuite_pmaports.txt"
-                "chroot"]
-    args = pmb.parse.arguments()
+    pmaports = Path(os.path.realpath(f"{os.path.dirname(__file__)}/../.."))
+    args = PmbArgs()
+    args.aports = [pmaports]
+    args.config = pmb.config.defaults["config"]
+    args.timeout = 900
+    args.details_to_stdout = False
+    args.quiet = False
+    args.verbose = True
+    args.offline = False
+    args.action = "init"
+    args.cross = False
+    args.log = None
 
-    # Initialize logging
-    pmb.helpers.logging.init(args)
+    init_args(args)
     request.addfinalizer(pmb.helpers.logging.logfd.close)
     return args

.ci/testcases/test_device.py

@@ -11,6 +11,8 @@ import sys
 import add_pmbootstrap_to_import_path
 import pmb.parse
 import pmb.parse._apkbuild
+from pmb.core.pkgrepo import pkgrepo_default_path, pkgrepo_iglob, pkgrepo_relative_path
+from pmb.core.arch import Arch
 
 # Cache for codeowners_parse
 codeowners_parsed = {}
@@ -32,11 +34,11 @@ def device_dependency_check(apkbuild, path):
                                " depends anymore (see pmaports!3478)")
 
 
-def test_aports_device(args):
+def test_aports_device():
     """
     Various tests performed on the /device/*/device-* aports.
     """
-    for path in glob.iglob(args.aports + "/device/*/device-*/APKBUILD"):
+    for path in pkgrepo_iglob("device/*/device-*/APKBUILD"):
         apkbuild = pmb.parse.apkbuild(path)
 
         # Depends: Require "postmarketos-base"
@@ -54,27 +56,27 @@ def test_aports_device(args):
 
         # Architecture
         device = apkbuild["pkgname"][len("device-"):]
-        deviceinfo = pmb.parse.deviceinfo(args, device)
-        if "".join(apkbuild["arch"]) != deviceinfo["arch"]:
-            raise RuntimeError("wrong architecture, please change to arch=\"" +
-                               deviceinfo["arch"] + "\": " + path)
+        deviceinfo = pmb.parse.deviceinfo(device)
+        if Arch.from_str("".join(apkbuild["arch"])) != deviceinfo.arch:
+            raise RuntimeError("wrong architecture, please change to arch=\""
+                               f"{deviceinfo.arch}\": {path}")
         if "!archcheck" not in apkbuild["options"]:
             raise RuntimeError("!archcheck missing in options= line: " + path)
 
 
-def test_aports_device_kernel(args):
+def test_aports_device_kernel():
     """
     Verify the kernels specified in the device packages:
     * Kernel must not be in depends when kernels are in subpackages
     * Check if only one kernel is defined in depends
     """
-
+    aports = pkgrepo_default_path()
     # Iterate over device aports
-    for path in glob.glob(args.aports + "/device/*/device-*/APKBUILD"):
+    for path in aports.glob("device/*/device-*/APKBUILD"):
         # Parse apkbuild and kernels from subpackages
         apkbuild = pmb.parse.apkbuild(path)
         device = apkbuild["pkgname"][len("device-"):]
-        kernels_subpackages = pmb.parse._apkbuild.kernels(args, device)
+        kernels_subpackages = pmb.parse._apkbuild.kernels(device)
 
         # Parse kernels from depends
         kernels_depends = []
@@ -85,29 +87,29 @@ def test_aports_device_kernel(args):
 
             # Kernel in subpackages *and* depends
             if kernels_subpackages:
-                raise RuntimeError("Kernel package '" + depend + "' needs to"
+                raise RuntimeError(f"Kernel package '{depend}' needs to"
                                    " be removed when using kernel" +
-                                   " subpackages: " + path)
+                                   f" subpackages: {path}")
 
         # No kernel
         if not kernels_depends and not kernels_subpackages:
             raise RuntimeError("Device doesn't have a kernel in depends or"
-                               " subpackages: " + path)
+                               f" subpackages: {path}")
 
         # Multiple kernels in depends
         if len(kernels_depends) > 1:
             raise RuntimeError("Please use kernel subpackages instead of"
                                " multiple kernels in depends (see"
-                               " <https://postmarketos.org/devicepkg>): " +
-                               path)
+                               f" <https://postmarketos.org/devicepkg>): {path}")
 
 
-def codeowners_parse(args):
+def codeowners_parse():
     global codeowners_parsed
 
     pattern_prev = None
+    aports = pkgrepo_default_path()
 
-    with open(f"{args.aports}/CODEOWNERS") as h:
+    with open(aports / "CODEOWNERS") as h:
         for line in h:
             line = line.rstrip()
             if not line or line.startswith("#"):
@@ -131,12 +133,13 @@ def codeowners_parse(args):
             pattern_prev = pattern
 
 
-def require_enough_codeowners_entries(args, path, maintainers):
+def require_enough_codeowners_entries(path, maintainers):
     """
     :param path: full path to an APKBUILD (e.g. /home/user/…/APKBUILD)
     :param maintainers: list of one or more maintainers
     """
-    path = os.path.relpath(path, args.aports)
+
+    _, path = pkgrepo_relative_path(path)
 
     nicks = set()
     for pattern, pattern_nicks in codeowners_parsed.items():
@@ -158,36 +161,38 @@ def require_enough_codeowners_entries(args, path, maintainers):
         f"{path}: make sure that each maintainer is listed in CODEOWNERS!"
 
 
-def test_aports_maintained(args):
+# @pytest.mark.xfail # Not all aports have been updated yet
+def test_aports_maintained():
     """
     Ensure that aports in /device/{main,community} have "Maintainer:" and
     "Co-Maintainer:" (only required for main) listed in their APKBUILDs. Also
     check that at least as many are listed in CODEOWNERS.
     """
-    codeowners_parse(args)
+    codeowners_parse()
 
-    for path in glob.iglob(f"{args.aports}/device/main/*/APKBUILD"):
-        if '/firmware-' in path:
+    for path in pkgrepo_iglob("device/main/*/APKBUILD"):
+        if 'firmware-' in path.parent.name:
             continue
         maintainers = pmb.parse._apkbuild.maintainers(path)
         assert maintainers and len(maintainers) >= 2, \
             f"{path} in main needs at least 1 Maintainer and 1 Co-Maintainer"
-        require_enough_codeowners_entries(args, path, maintainers)
+        require_enough_codeowners_entries(path, maintainers)
 
-    for path in glob.iglob(f"{args.aports}/device/community/*/APKBUILD"):
-        if '/firmware-' in path:
+    for path in pkgrepo_iglob("device/community/*/APKBUILD"):
+        if 'firmware-' in path.parent.name:
             continue
         maintainers = pmb.parse._apkbuild.maintainers(path)
         assert maintainers, f"{path} in community needs at least 1 Maintainer"
-        require_enough_codeowners_entries(args, path, maintainers)
+        require_enough_codeowners_entries(path, maintainers)
 
 
-def test_aports_unmaintained(args):
+def test_aports_unmaintained():
     """
     Ensure that aports in /device/unmaintained have an "Unmaintained:" comment
     that describes why the aport is unmaintained.
     """
-    for path in glob.iglob(f"{args.aports}/device/unmaintained/*/APKBUILD"):
+
+    for path in pkgrepo_iglob("device/unmaintained/*/APKBUILD"):
         unmaintained = pmb.parse._apkbuild.unmaintained(path)
         assert unmaintained, f"{path} should have an Unmaintained: " +\
             "comment that describes why the package is unmaintained"

.ci/testcases/test_deviceinfo.py

@@ -10,6 +10,7 @@ import sys
 
 import add_pmbootstrap_to_import_path
 import pmb.parse
+from pmb.core.pkgrepo import pkgrepo_iglob
 
 
 def deviceinfo_obsolete(info):
@@ -22,13 +23,13 @@ def deviceinfo_obsolete(info):
         "weston_pixman_type",
     ]
     for option in obsolete_options:
-        if option in info and info[option]:
+        if getattr(info, option, None):
             raise RuntimeError(f"option {option} is obsolete, please rename"
                                " or remove it (see reasons for removal of at"
                                " https://postmarketos.org/deviceinfo)")
 
 
-def test_deviceinfo(args):
+def test_deviceinfo():
     """
     Parse all deviceinfo files successfully and run checks on the parsed data.
     """
@@ -37,10 +38,10 @@ def test_deviceinfo(args):
     count = 0
     pattern = re.compile("^deviceinfo_[a-zA-Z0-9_]*=\".*\"$")
 
-    for folder in glob.glob(args.aports + "/device/*/device-*"):
-        device = folder[len(args.aports):].split("-", 1)[1]
+    for folder in pkgrepo_iglob("device/*/device-*"):
+        device = folder.name.split("-", 1)[1]
 
-        f = open(folder[len(args.aports):][1:] + "/deviceinfo")
+        f = open(folder / "deviceinfo")
         lines = f.read().split("\n")
         f.close()
 
@@ -66,12 +67,12 @@ def test_deviceinfo(args):
                                        f" to line instead of above? {line}")
 
             # Successful deviceinfo parsing / obsolete options
-            info = pmb.parse.deviceinfo(args, device)
+            info = pmb.parse.deviceinfo(device)
             deviceinfo_obsolete(info)
 
             # deviceinfo_name must start with manufacturer
-            name = info["name"]
-            manufacturer = info["manufacturer"]
+            name = info.name
+            manufacturer = info.manufacturer
             if not name.startswith(manufacturer) and \
                     not name.startswith("Google"):
                 raise RuntimeError("Please add the manufacturer in front of"

.ci/testcases/test_firmware.py

@@ -7,9 +7,10 @@ import os
 
 import add_pmbootstrap_to_import_path
 import pmb.parse
+from pmb.core.pkgrepo import pkgrepo_default_path, pkgrepo_iglob
 
 
-def test_aports_firmware(args):
+def test_aports_firmware():
     """
     Various tests performed on the /**/firmware-* aports.
     """
@@ -26,9 +27,9 @@ def test_aports_firmware(args):
         "firmware-xiaomi-willow",  # Doesn't build, source link is dead (pma#1212)
     ]
 
-    for path in glob.iglob(f"{args.aports}/**/firmware-*/APKBUILD", recursive=True):
+    for path in pkgrepo_iglob("**/firmware-*/APKBUILD", recursive=True):
         apkbuild = pmb.parse.apkbuild(path)
-        aport_name = os.path.basename(os.path.dirname(path))
+        aport_name = os.path.basename(path.parent)
 
         if aport_name not in excluded:
             if "pmb:cross-native" not in apkbuild["options"]:

.ci/testcases/test_framework_versions.py

@@ -15,9 +15,10 @@ import sys
 import add_pmbootstrap_to_import_path
 import pmb.config
 import pmb.parse
+from pmb.core.pkgrepo import pkgrepo_iter_package_dirs
 
 
-def get_categorized_packages(args):
+def get_categorized_packages():
     """
     Parse all aports and categorize them.
 
@@ -28,7 +29,7 @@ def get_categorized_packages(args):
     """
     ret = {}
 
-    for path in glob.glob(args.aports + "/*/*/APKBUILD"):
+    for path in pkgrepo_iter_package_dirs():
         # Parse APKBUILD
         apkbuild = pmb.parse.apkbuild(path)
         url = apkbuild["url"]
@@ -109,10 +110,10 @@ def check_categories(categories):
     return ret
 
 
-def test_framework_versions(args):
+def test_framework_versions():
     """
     Make sure that packages of the same framework have the same version.
     """
-    categories = get_categorized_packages(args)
+    categories = get_categorized_packages()
     if not check_categories(categories):
         raise RuntimeError("Framework version check failed!")

.ci/testcases/test_kernel.py

@@ -11,14 +11,15 @@ from pathlib import Path
 
 import add_pmbootstrap_to_import_path
 import pmb.parse
+from pmb.core.pkgrepo import pkgrepo_iglob, pkgrepo_relative_path
 
 
-def test_aports_kernel(args):
+def test_aports_kernel():
     """
     Various tests performed on the /**/linux-* aports.
     """
 
-    for path in glob.iglob(f"{args.aports}/**/linux-*/APKBUILD", recursive=True):
+    for path in pkgrepo_iglob("**/linux-*/APKBUILD", recursive=True):
         apkbuild = pmb.parse.apkbuild(path)
         aport_name = os.path.basename(os.path.dirname(path))
 
@@ -37,14 +38,15 @@ def test_aports_kernel(args):
                                    " automatically.")
 
         # check some options only for main and community devices
-        for dir in ["main", "device/main", "device/community"]:
-            if path.startswith(f"{args.aports}/{dir}"):
+        _, relpath = pkgrepo_relative_path(path)
+        for part in ["main", "community"]:
+            if part in relpath.parts:
                 if "pmb:kconfigcheck-community" not in apkbuild["options"]:
                     raise RuntimeError(f"{aport_name}: \"pmb:kconfigcheck-community\" missing in"
                                        " options= line, required for all community/main devices.")
 
         # check for postmarketos-installkernel in makedepends when installing kernel with make
-        if bool(re.search("make z?install", Path(path).read_text(encoding="utf-8"))):
+        if bool(re.search("make z?install", path.read_text(encoding="utf-8"))):
             if "postmarketos-installkernel" not in apkbuild["makedepends"]:
                 raise RuntimeError(f"{aport_name}: \"postmarketos-installkernel\" missing in"
                                    " makedepends, required when using make install/zinstall.")

.ci/testcases/test_provides.py

@@ -10,6 +10,7 @@ import sys
 import add_pmbootstrap_to_import_path
 import pmb.parse
 import pmb.parse._apkbuild
+from pmb.core.pkgrepo import pkgrepo_iter_package_dirs, pkgrepo_relative_path
 
 
 def apkbuild_check_provides(path, apkbuild, version, pkgname, subpkgname=None):
@@ -65,13 +66,14 @@ def apkbuild_check_provides(path, apkbuild, version, pkgname, subpkgname=None):
     return ret
 
 
-def test_provides(args):
+def test_provides():
     errors = []
-    for path in glob.iglob(f"{args.aports}/**/APKBUILD", recursive=True):
+    for path in pkgrepo_iter_package_dirs():
+        path = path / "APKBUILD"
         apkbuild = pmb.parse.apkbuild(path)
         pkgname = apkbuild["pkgname"]
         version = f"{apkbuild['pkgver']}-r{apkbuild['pkgrel']}"
-        path_rel = os.path.relpath(path, args.aports)
+        _, path_rel = pkgrepo_relative_path(path)
         errors += apkbuild_check_provides(path_rel, apkbuild, version, pkgname)
 
         for subpkg, subpkg_data in apkbuild["subpackages"].items():

.ci/testcases/test_source.py

@@ -14,9 +14,10 @@ import pmb.parse
 import pmb.parse._apkbuild
 import pmb.parse.apkindex
 import pmb.helpers.repo
+from pmb.core.pkgrepo import pkgrepo_iter_package_dirs, pkgrepo_relative_path
 
 
-def parse_source_from_checksums(args, apkbuild_path):
+def parse_source_from_checksums(apkbuild_path):
     """
     Read the APKBUILD file and parse source files from the checksums at the
     bottom. This has always the same format, even if $source is built with hard
@@ -64,17 +65,20 @@ def parse_source_from_checksums(args, apkbuild_path):
     return ret
 
 
-def test_aports_unreferenced_files(args):
+def test_aports_unreferenced_files():
     """
     Raise an error if an unreferenced file is found
     """
-    for apkbuild_path in glob.iglob(args.aports + "/**/APKBUILD", recursive=True):
+    for apkbuild_path in pkgrepo_iter_package_dirs():
         # pmbootstrap parser has some issues with complicated APKBUILDs, skip those.
-        if apkbuild_path.startswith(args.aports + "/cross/"):
+        _, relpath = pkgrepo_relative_path(apkbuild_path)
+        if relpath.parts[0] == "cross":
             continue
 
+        apkbuild_path = apkbuild_path / "APKBUILD"
+
         apkbuild = pmb.parse.apkbuild(apkbuild_path)
-        sources_chk = parse_source_from_checksums(args, apkbuild_path)
+        sources_chk = parse_source_from_checksums(apkbuild_path)
 
         # Collect files from subpackages
         subpackage_installs = []
@@ -105,7 +109,7 @@ def test_aports_unreferenced_files(args):
                 raise RuntimeError(f"{apkbuild_path}: found unreferenced file: {rel_file_path}")
 
 
-def test_distfiles_conflict(args):
+def test_distfiles_conflict():
     """
     Make sure that each filename mentioned in any source= of any APKBUILD
     always has the same checksum. This is important because apk caches
@@ -115,10 +119,11 @@ def test_distfiles_conflict(args):
     with a checksum error.
     """
     source_all = {}
-    for apkbuild_path in glob.iglob(f"{args.aports}/**/APKBUILD", recursive=True):
-        source = parse_source_from_checksums(args, apkbuild_path)
+    for apkbuild_path in pkgrepo_iter_package_dirs():
+        apkbuild_path = apkbuild_path / "APKBUILD"
+        source = parse_source_from_checksums(apkbuild_path)
         dir_path = os.path.dirname(apkbuild_path)
-        apkbuild_rel = os.path.relpath(apkbuild_path, args.aports)
+        _, apkbuild_rel = pkgrepo_relative_path(apkbuild_path)
         for filename, checksum in source.items():
             # Files bundled with the APKBUILD don't get copied to the distfiles
             # cache, so not relevant for this check. Use glob.glob here and not

.ci/testcases/test_ui.py

@@ -9,25 +9,26 @@ import os
 
 import add_pmbootstrap_to_import_path
 import pmb.parse
+from pmb.core.pkgrepo import pkgrepo_iglob
 
 
-def test_aports_ui(args):
+def test_aports_ui():
     """
     Raise an error if package in _pmb_recommends is not found
     """
-    pmaports_cfg = pmb.config.pmaports.read_config(args)
+    pmaports_cfg = pmb.config.pmaports.read_config()
 
     for arch in pmaports_cfg["supported_arches"].split(","):
-        for path in glob.iglob(args.aports + "/main/postmarketos-ui-*/APKBUILD"):
+        for path in pkgrepo_iglob("main/postmarketos-ui-*/APKBUILD"):
             apkbuild = pmb.parse.apkbuild(path)
             # Skip if arch isn't enabled
-            if not pmb.helpers.package.check_arch(args, apkbuild["pkgname"], arch, False):
+            if not pmb.helpers.package.check_arch(apkbuild["pkgname"], arch, False):
                 continue
 
             for package in apkbuild["_pmb_recommends"]:
-                depend = pmb.helpers.package.get(args, package,
+                depend = pmb.helpers.package.get(package,
                                                  arch, must_exist=False)
-                if depend is None or not pmb.helpers.package.check_arch(args, package, arch):
+                if depend is None or not pmb.helpers.package.check_arch(package, arch):
                     raise RuntimeError(f"{path}: package '{package}' from"
                                        f" _pmb_recommends not found for arch '{arch}'")
 
@@ -35,8 +36,8 @@ def test_aports_ui(args):
             if f"{apkbuild['pkgname']}-extras" in apkbuild["subpackages"]:
                 apkbuild = apkbuild["subpackages"][f"{apkbuild['pkgname']}-extras"]
                 for package in apkbuild["_pmb_recommends"]:
-                    depend = pmb.helpers.package.get(args, package,
+                    depend = pmb.helpers.package.get(package,
                                                      arch, must_exist=False)
-                    if depend is None or not pmb.helpers.package.check_arch(args, package, arch):
+                    if depend is None or not pmb.helpers.package.check_arch(package, arch):
                         raise RuntimeError(f"{path}: package '{package}' from _pmb_recommends "
                                            f"of -extras subpackage is not found for arch '{arch}'")

.gitlab-ci.yml

@@ -125,8 +125,6 @@ mr-settings:
 # build changed aports
 .build:
   stage: build
-  tags:
-    - saas-linux-large-amd64
   rules:
     - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
   before_script:
@@ -152,8 +150,6 @@ build-x86:
 
 build-aarch64:
   extends: .build
-  tags:
-    - saas-linux-large-arm64
   script:
     - .ci/build-aarch64.sh
 

.gitlab/issue_templates/Change_Kernel_Config.md

@@ -0,0 +1,31 @@
+<!-- Use this template to kick off the discussion for changing one or more
+     related kernel config options.
+-->
+
+### Read the fine manual, please :)
+
+- [ ] I have read https://postmarketos.org/kconfig-adjust-multiple
+
+### What benefit does the change have?
+
+### Which option(s) would you like to change?
+
+<!-- Make sure to specify if you would like to enable/disable/set a value. -->
+
+### Did you already test that this works as expected?
+
+<!-- Not required, but recommended. If you did test it, please list which
+     device you have tested it with. -->
+
+### For which kernel configs would you do the change?
+
+<!-- If it makes sense, we encourage to adjust all kernels used by devices in
+     the main and community categories, so devices behave consistently. -->
+
+- [ ] all in main and community
+- [ ] certain SoC(s):
+- [ ] other (please specify):
+
+
+<!-- leave this, so it applies the correct label in gitlab -->
+/label ~"change-kernel-config"

.gitlab/issue_templates/Default.md

@@ -28,7 +28,6 @@
 -->
 * [ ] edge (`master` branch)
 * [ ] `v24.06`
-* [ ] `v23.12` (supported until 2024-07-16)
 
 * [ ] I confirm that the issue still is present after running `sudo apk upgrade -a`
 

CODEOWNERS

@@ -31,6 +31,7 @@ device/*/*-pine64-pinephonepro/			@PsychoGame
 device/*/*-pine64-rockpro64/			@PureTryOut
 device/*/*-purism-librem5/			@craftyguy @alistair23 @Newbyte
 device/*/*-qcom-msm8916/			@Minecrell @TravMurav
+device/*/*-qcom-sdm670/				@flamingradian
 device/*/*-qcom-sdm845/				@sdm845-mainline
 device/*/*-qcom-sm6350/				@z3ntu
 device/*/*-samsung-a3/				@Mis012 @TravMurav @Minecrell
@@ -57,12 +58,14 @@ device/*/*-xiaomi-vince/			@M0Rf30
 device/*/*-xiaomi-wt88047/			@Minecrell
 device/*/*-xiaomi-ysl/				@barni2000
 device/*/alsa-ucm-conf-cros/			@WeirdTreeThing
+device/*/alsa-ucm-conf-qcom-sdm670/		@flamingradian
 device/*/device-fairphone-*/			@z3ntu
 device/*/device-generic-x86_64/			@craftyguy @ollieparanoid
 device/*/device-google-nyan-big/		@jenneron
 device/*/device-google-nyan-blaze/		@jenneron
 device/*/device-google-peach-pi/		@jenneron
 device/*/device-google-peach-pit/		@jenneron
+device/*/device-google-sargo/			@flamingradian
 device/*/device-google-snow/			@jenneron
 device/*/device-huawei-plank/			@gtrxAC
 device/*/device-lg-judyln/			@Newbyte
@@ -78,6 +81,7 @@ device/*/device-qemu-aarch64/			@Minecrell @ollieparanoid
 device/*/device-qemu-amd64/			@Minecrell @ollieparanoid
 device/*/device-qemu-riscv64/			@Minecrell @z3ntu
 device/*/device-qualcomm-sdm845/		@calebccff
+device/*/device-raspberry-pi3/			@fossdd
 device/*/device-samsung-chagallwifi/		@Grimler
 device/*/device-samsung-coreprimevelte/		@legolivesmatter @balejk
 device/*/device-samsung-j5y17lte/	@andrisas
@@ -86,6 +90,7 @@ device/*/device-samsung-lt01/			@knuxify
 device/*/device-samsung-m0/			@Newbyte
 device/*/device-samsung-manta/			@jenneron @alexmrqt
 device/*/device-shift-axolotl/			@amartinz @calebccff @dylanvanassche
+device/*/firmware-google-sargo/			@flamingradian
 device/*/firmware-google-veyron-brcm/		@jenneron
 device/*/firmware-odroid-xu4/			@Grimler
 device/*/firmware-oneplus-sdm845/		@calebccff
@@ -94,6 +99,7 @@ device/*/kobo-epdc-extractor/			@akemnade
 device/*/linux-google-nyan/			@jenneron
 device/*/linux-google-veyron/			@jenneron
 device/*/linux-huawei-plank/			@gtrxAC
+device/*/linux-next/				@calebccff
 device/*/linux-postmarketos-allwinner/		@Arnavion @PsychoGame
 device/*/linux-postmarketos-amlogic/		@funderscore @exkc
 device/*/linux-postmarketos-exynos4/		@Newbyte @Grimler @knuxify

cross/busybox-static-aarch64/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=busybox-static-aarch64
 pkgver=1.36.1
-pkgrel=31
+pkgrel=32
 
 _arch="aarch64"
 _mirror="http://dl-4.alpinelinux.org/alpine/"
@@ -32,5 +32,5 @@ package() {
 }
 
 sha512sums="
-c34906bb0a5d7e268ab43ca1e3e2f9c75c06f3f5de8d41671396bcd7d585a79a66e25ad43e80a3e107a1de0ecaf83ac7198163d3e775edbd6d626ef014307ec5  busybox-static-1.36.1-r31-aarch64-edge.apk
+88f07677919711bb577f60e1861f4fa555168a8703a0a3b904550e24d4045135bb0296e00464899fc6231df07db09bb11f1bc81cdf593a71a8f74dfc3333c29e  busybox-static-1.36.1-r32-aarch64-edge.apk
 "

cross/busybox-static-armhf/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=busybox-static-armhf
 pkgver=1.36.1
-pkgrel=31
+pkgrel=32
 
 _arch="armhf"
 _mirror="http://dl-4.alpinelinux.org/alpine/"
@@ -32,5 +32,5 @@ package() {
 }
 
 sha512sums="
-7e6a961a0adcbc2912f5b261ce84a62b9189dce49c5dd3d2bcbdae407645dec72c27af8804c1d5446d50e78ea938a4d812c477db199ed83cac7c647c4b41f3fe  busybox-static-1.36.1-r31-armhf-edge.apk
+b0985e2f62df8f1d4e1b7a1206dc3e462df1e6b2a8aae662e57cc497ca3f474f37cc952de0d3bbaad6532d569bf540f17ad4eccc9cabfdc3c9f95f8feaf08049  busybox-static-1.36.1-r32-armhf-edge.apk
 "

cross/busybox-static-armv7/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=busybox-static-armv7
 pkgver=1.36.1
-pkgrel=31
+pkgrel=32
 
 _arch="armv7"
 _mirror="http://dl-4.alpinelinux.org/alpine/"
@@ -32,5 +32,5 @@ package() {
 }
 
 sha512sums="
-b9736dc7df4230196bf05de3bd76b61fc689c56861bc7c5194cd310e23f513cec649c1b3e3f338266b8d58540468d97e8525948a3efc2d1af53e288cd525e836  busybox-static-1.36.1-r31-armv7-edge.apk
+f383286e58183232b41a0d299528734cb29b11e51112eab1fe513322a269a2cdf90a1341d7e329ed7cd58e2d158e3a80bc3a5290ef93de2b28aaf7a25b78bfd7  busybox-static-1.36.1-r32-armv7-edge.apk
 "

cross/gcc-aarch64/0026-ada-musl-support-fixes.patch

@@ -4,17 +4,17 @@ Date: Fri, 21 Aug 2020 07:07:48 +0000
 Subject: [PATCH 26/35] ada: musl support fixes
 
 ---
- gcc/ada/Makefile.rtl | 10 +++++-----
+ gcc/ada/Makefile.rtl | 16 ++++++++--------
  gcc/ada/adaint.c     | 34 +++++++++++++++++++---------------
  gcc/ada/adaint.h     | 10 ++++------
  gcc/ada/terminals.c  |  8 ++++----
- 4 files changed, 32 insertions(+), 30 deletions(-)
+ 4 files changed, 35 insertions(+), 33 deletions(-)
 
 diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
-index 96306f8cc9a..090b6770ae5 100644
+index 32cbdb692..463028fbe 100644
 --- a/gcc/ada/Makefile.rtl
 +++ b/gcc/ada/Makefile.rtl
-@@ -1549,7 +1549,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
+@@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
    s-intman.adb<libgnarl/s-intman__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -23,7 +23,16 @@ index 96306f8cc9a..090b6770ae5 100644
    a-exetim.adb<libgnarl/a-exetim__posix.adb \
    a-exetim.ads<libgnarl/a-exetim__default.ads \
    s-linux.ads<libgnarl/s-linux.ads \
-@@ -2174,7 +2174,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2144,7 +2144,7 @@ ifeq ($(strip $(filter-out loongarch% linux%,$(target_cpu) $(target_os))),)
+   g-sercom.adb<libgnat/g-sercom__linux.adb \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+   $(GNATRTL_128BIT_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(ATOMICS_BUILTINS_TARGET_PAIRS) \
+   system.ads<libgnat/system-linux-loongarch.ads
+@@ -2232,7 +2232,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -32,7 +41,7 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-ppc.ads
-@@ -2205,7 +2205,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2267,7 +2267,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
  endif
  
  # ARM linux, GNU eabi
@@ -50,7 +59,7 @@ index 96306f8cc9a..090b6770ae5 100644
    s-mudido.adb<libgnarl/s-mudido__affinity.adb \
    s-osinte.ads<libgnarl/s-osinte__linux.ads \
    s-osinte.adb<libgnarl/s-osinte__posix.adb \
-@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
+@@ -2488,7 +2488,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -59,7 +68,16 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    $(GNATRTL_128BIT_PAIRS) \
-@@ -2524,7 +2524,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+@@ -2592,7 +2592,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
+   s-taspri.ads<libgnarl/s-taspri__posix.ads \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(X86_64_TARGET_PAIRS) \
+   $(SIMD_PATH_TARGET_PAIRS) \
+@@ -2637,7 +2637,7 @@ ifeq ($(strip $(filter-out %x32 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -69,10 +87,10 @@ index 96306f8cc9a..090b6770ae5 100644
    $(X86_64_TARGET_PAIRS) \
    $(SIMD_PATH_TARGET_PAIRS) \
 diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
-index 8522094164e..92b230a462b 100644
+index 74aa3c412..ef6118f37 100644
 --- a/gcc/ada/adaint.c
 +++ b/gcc/ada/adaint.c
-@@ -91,6 +91,11 @@
+@@ -94,6 +94,11 @@
  #include <sys/param.h>
  #include <sys/pstat.h>
  #endif
@@ -84,7 +102,7 @@ index 8522094164e..92b230a462b 100644
  
  #ifdef __PikeOS__
  #define __BSD_VISIBLE 1
-@@ -3438,7 +3443,6 @@ __gnat_lwp_self (void)
+@@ -3465,7 +3470,6 @@ __gnat_lwp_self (void)
  #endif
  
  #if defined (__linux__)
@@ -92,7 +110,7 @@ index 8522094164e..92b230a462b 100644
  
  /* glibc versions earlier than 2.7 do not define the routines to handle
     dynamically allocated CPU sets. For these targets, we use the static
-@@ -3448,7 +3452,7 @@ __gnat_lwp_self (void)
+@@ -3475,7 +3479,7 @@ __gnat_lwp_self (void)
  
  /* Dynamic cpu sets */
  
@@ -101,7 +119,7 @@ index 8522094164e..92b230a462b 100644
  __gnat_cpu_alloc (size_t count)
  {
    return CPU_ALLOC (count);
-@@ -3461,33 +3465,33 @@ __gnat_cpu_alloc_size (size_t count)
+@@ -3488,33 +3492,33 @@ __gnat_cpu_alloc_size (size_t count)
  }
  
  void
@@ -143,7 +161,7 @@ index 8522094164e..92b230a462b 100644
  }
  
  size_t
-@@ -3497,23 +3501,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
+@@ -3524,23 +3528,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
  }
  
  void
@@ -173,7 +191,7 @@ index 8522094164e..92b230a462b 100644
  #endif /* !CPU_ALLOC */
  #endif /* __linux__ */
 diff --git a/gcc/ada/adaint.h b/gcc/ada/adaint.h
-index 987432c9307..4d782f07de9 100644
+index 0cbfd0e15..f97ed905b 100644
 --- a/gcc/ada/adaint.h
 +++ b/gcc/ada/adaint.h
 @@ -319,13 +319,11 @@ extern void   *__gnat_lwp_self			   (void);
@@ -195,10 +213,10 @@ index 987432c9307..4d782f07de9 100644
  
  #if defined (_WIN32)
 diff --git a/gcc/ada/terminals.c b/gcc/ada/terminals.c
-index c0ee4a16bb1..ed796a48c1b 100644
+index 05af82c27..626ac35bc 100644
 --- a/gcc/ada/terminals.c
 +++ b/gcc/ada/terminals.c
-@@ -1127,7 +1127,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1134,7 +1134,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  /* POSIX does not specify how to open the master side of a terminal.Several
     methods are available (system specific):
        1- using a cloning device (USE_CLONE_DEVICE)
@@ -207,7 +225,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
        3- openpty                (USE_OPENPTY)
  
     When using the cloning device method, the macro USE_CLONE_DEVICE should
-@@ -1141,7 +1141,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1148,7 +1148,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  #if defined (__APPLE__) || defined (BSD)
  #define USE_OPENPTY
  #elif defined (__linux__)
@@ -216,7 +234,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (__sun__)
  #define USE_CLONE_DEVICE "/dev/ptmx"
  #elif defined (_AIX)
-@@ -1190,8 +1190,8 @@ allocate_pty_desc (pty_desc **desc) {
+@@ -1197,8 +1197,8 @@ allocate_pty_desc (pty_desc **desc) {
     int  master_fd   = -1;
     char *slave_name = NULL;
  
@@ -227,6 +245,3 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (USE_OPENPTY)
    status = openpty (&master_fd, &slave_fd, NULL, NULL, NULL);
  #elif defined (USE_CLONE_DEVICE)
--- 
-2.41.0
-

cross/gcc-aarch64/0036-libphobos-add-riscv64-and-loongarch64-support.patch

@@ -0,0 +1,87 @@
+From: Celeste <cielesti@protonmail.com>
+Date: Mon, 2 Sep 2024 02:54:17 +0000
+Subject: [PATCH] libphobos: add riscv64 and loongarch64 support
+
+Add musl support for these 2 architectures based on fenv.h and signal.h from:
+
+https://git.musl-libc.org/cgit/musl/tree/arch/riscv64/bits?h=v1.2.5
+
+https://git.musl-libc.org/cgit/musl/tree/arch/loongarch64/bits?h=v1.2.5
+---
+ libphobos/libdruntime/core/stdc/fenv.d        | 13 +++++++++++++
+ libphobos/libdruntime/core/sys/posix/signal.d | 10 ++++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/libphobos/libdruntime/core/stdc/fenv.d b/libphobos/libdruntime/core/stdc/fenv.d
+index a7364c0a..5b327e4a 100644
+--- a/libphobos/libdruntime/core/stdc/fenv.d
++++ b/libphobos/libdruntime/core/stdc/fenv.d
+@@ -436,20 +436,33 @@ else version (CRuntime_Musl)
+             ushort __cs_selector;
+             ushort __opcode;
+             uint   __data_offset;
+             ushort __data_selector;
+             ushort __unused5;
+             version (X86_64)
+                 uint __mxcsr;
+         }
+         alias ushort fexcept_t;
+     }
++    else version (RISCV64)
++    {
++        alias uint fenv_t;
++        alias uint fexcept_t;
++    }
++    else version (LoongArch64)
++    {
++        struct fenv_t
++        {
++            uint __cw;
++        }
++        alias uint fexcept_t;
++    }
+     else
+     {
+         static assert(false, "Architecture not supported.");
+     }
+ }
+ else version (CRuntime_Newlib)
+ {
+     version (AArch64)
+     {
+         alias fenv_t = ulong;
+diff --git a/libphobos/libdruntime/core/sys/posix/signal.d b/libphobos/libdruntime/core/sys/posix/signal.d
+index a8b7f751..78d8b3cd 100644
+--- a/libphobos/libdruntime/core/sys/posix/signal.d
++++ b/libphobos/libdruntime/core/sys/posix/signal.d
+@@ -2751,20 +2751,30 @@ else version (CRuntime_Musl)
+     else version (PPC_Any)
+     {
+         enum MINSIGSTKSZ = 4096;
+         enum SIGSTKSZ    = 10240;
+     }
+     else version (X86_Any)
+     {
+         enum MINSIGSTKSZ = 2048;
+         enum SIGSTKSZ    = 8192;
+     }
++    else version (RISCV64)
++    {
++        enum MINSIGSTKSZ = 2048;
++        enum SIGSTKSZ    = 8192;
++    }
++    else version (LoongArch64)
++    {
++        enum MINSIGSTKSZ = 4096;
++        enum SIGSTKSZ    = 16384;
++    }
+     else
+         static assert(0, "unimplemented");
+ 
+     //ucontext_t (defined in core.sys.posix.ucontext)
+     //mcontext_t (defined in core.sys.posix.ucontext)
+ 
+     version (MIPS_Any)
+     {
+         struct stack_t
+         {

cross/gcc-aarch64/APKBUILD

@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
 
 pkgname=gcc-aarch64
-pkgrel=0
+pkgrel=3
 pkgdesc="Stage2 cross-compiler for aarch64"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -64,6 +64,7 @@ _libitm=true
 if [ "$CHOST" != "$CTARGET" ]; then
 	if [ "$BOOTSTRAP" = nolibc ]; then
 		LANG_CXX=false
+		LANG_D=false
 		LANG_ADA=false
 		_libgcc=false
 		_builddir="$srcdir/build-cross-pass2"
@@ -73,7 +74,6 @@ if [ "$CHOST" != "$CTARGET" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 	_libgomp=false
 	_libatomic=false
@@ -115,7 +115,6 @@ elif [ "$CBUILD" != "$CHOST" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 
 	STRIP_FOR_TARGET=${CROSS_COMPILE}strip
@@ -140,11 +139,11 @@ else
 	export BOOT_LDFLAGS="$LDFLAGS"
 fi
 
-case "$CARCH" in
+case "$CTARGET_ARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -171,7 +170,7 @@ esac
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac
 
@@ -184,13 +183,8 @@ if $_libgomp; then
 	subpackages="$subpackages libgomp::$CTARGET_ARCH"
 fi
 
-case "$CARCH" in
-riscv64)
-LANG_ADA=false;;
-esac
-
 case "$CTARGET_ARCH" in
-loongarch64)
+riscv64|loongarch64)
 LANG_ADA=false;;
 esac
 
@@ -199,9 +193,17 @@ if $LANG_CXX; then
 	_languages="$_languages,c++"
 fi
 if $LANG_D; then
-	subpackages="$subpackages libgphobos::$CTARGET_ARCH gcc-gdc$_target:gdc"
+	subpackages="$subpackages gcc-gdc$_target:gdc"
 	_languages="$_languages,d"
-	makedepends_build="$makedepends_build libucontext-dev gcc-gdc-bootstrap"
+	makedepends_build="$makedepends_build libucontext-dev"
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		makedepends_build="$makedepends_build gcc-gdc-bootstrap"
+		subpackages="$subpackages libgphobos::$CTARGET_ARCH"
+	else
+		# shared libgphobos is for D programs to link against, so
+		# skip building that while cross-compiling the GDC compiler
+		makedepends_build="$makedepends_build gcc-gdc gcc-gdc$_cross"
+	fi
 fi
 if $LANG_OBJC; then
 	subpackages="$subpackages libobjc::$CTARGET_ARCH gcc-objc$_target:objc"
@@ -278,6 +280,9 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
 	0035-loongarch-disable-multilib-support.patch
+	0036-libphobos-add-riscv64-and-loongarch64-support.patch
+	fix-arm64.patch
+	ppc64le-quadmath.patch
 	"
 
 # secfixes:
@@ -359,20 +364,23 @@ build() {
 
 	case "$BOOTSTRAP" in
 	nolibc)	_bootstrap_configure="--with-newlib --disable-shared --enable-threads=no" ;;
-	*)	_bootstrap_configure="--enable-shared --enable-threads --enable-tls" ;;
+	*)
+		# cross-bootstrap GDC with a static libphobos: due to GCC's
+		# ./configure not having a --disable-shared=libphobos option,
+		# we have to use --enable-shared with everything else instead.
+		if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+			_bootstrap_configure="--enable-shared=libgcc,libstdc++,libffi,zlib,boehm-gc,ada,libada,libgo,libobjc,libatomic,libgomp,libitm,libgfortran,libquadmath"
+		else
+			_bootstrap_configure="--enable-shared"
+		fi
+		_bootstrap_configure="$_bootstrap_configure --enable-threads --enable-tls"
+		;;
 	esac
 
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"
 
 	msg "Building the following:"
 	echo ""
@@ -426,6 +434,10 @@ build() {
 		--with-pkgversion="$version"
 
 	msg "building gcc"
+	if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+		# cross-compiling libphobos with parallel make fails
+		make all-target-libphobos
+	fi
 	make
 
 	# we build gccjit separate to not build all of gcc with --enable-host-shared
@@ -666,9 +678,9 @@ libgphobos() {
 
 gdc() {
 	pkgdesc="GCC-based D language compiler"
-	depends="gcc=$_gccrel libgphobos=$_gccrel musl-dev"
-	depends="$depends libucontext-dev"
-	provides="gcc-gdc-bootstrap=$_gccrel"
+	depends="gcc$_target=$_gccrel musl-dev libucontext-dev"
+	[ "$CBUILD" = "$CTARGET" ] && depends="$depends libgphobos=$_gccrel"
+	[ "$CHOST" = "$CTARGET" ] && provides="gcc-gdc-bootstrap=$_gccrel"
 
 	mkdir -p "$subpkgdir/$_gcclibexec" \
 		"$subpkgdir"/$_gcclibdir/include/d/ \
@@ -679,13 +691,25 @@ gdc() {
 	# without installing the compiler
 	mv "$pkgdir/$_gcclibexec/d21" "$subpkgdir/$_gcclibexec/"
 	mv "$pkgdir"/$_gcclibdir/include/d/* "$subpkgdir"/$_gcclibdir/include/d/
-	mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
+	fi
+	if [ "$CHOST" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
+	else
+		mkdir -p "$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgdruntime.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.spec \
+			"$subpkgdir"/usr/$CTARGET/lib/
+	fi
 	mv "$pkgdir"/usr/bin/$CTARGET-gdc "$subpkgdir"/usr/bin/
-	mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
 }
 
 libgo() {
@@ -827,7 +851,7 @@ f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8
 abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+684bf2db12aa45e8db7a895ab0f227b4e4351f611b4fcc6e1745d7ad94d31b3554f39d8cf9e2203520b3c6ee35cf309b417d4a842e7a8cd55a2b2accb23f2f24  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,4 +861,7 @@ b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
+06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453  0036-libphobos-add-riscv64-and-loongarch64-support.patch
+00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9  ppc64le-quadmath.patch
 "

cross/gcc-aarch64/fix-arm64.patch

@@ -0,0 +1,544 @@
+From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 13 Jun 2024 12:48:21 +0100
+Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
+
+The testcase extracts one arm_neon.h vector from a pair (one subreg)
+and then reinterprets the result as an SVE vector (another subreg).
+Each subreg makes sense individually, but we can't fold them together
+into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
+but the interpretation of 32 bytes -> 16*N bytes depends on
+whether N==1 or N>1.
+
+Since the second subreg makes sense individually, simplify_subreg
+should bail out rather than ICE on it.  simplify_gen_subreg will
+then do the same (because it already checks validate_subreg).
+This leaves simplify_gen_subreg returning null, requiring the
+caller to take appropriate action.
+
+I think this is relatively likely to occur elsewhere, so the patch
+adds a helper for forcing a subreg, allowing a temporary pseudo to
+be created where necessary.
+
+I'll follow up by using force_subreg in more places.  This patch
+is intended to be a minimal backportable fix for the PR.
+
+gcc/
+	PR target/115464
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
+	to fold two subregs together if their relationship isn't known
+	at compile time.
+	* explow.h (force_subreg): Declare.
+	* explow.cc (force_subreg): New function.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
+
+(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
+---
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
+ gcc/explow.cc                                     | 15 +++++++++++++++
+ gcc/explow.h                                      |  2 ++
+ gcc/simplify-rtx.cc                               |  5 +++++
+ .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
+ 5 files changed, 36 insertions(+), 1 deletion(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 0d2edf3f19e..c9182594bc1 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1174,7 +1174,7 @@ public:
+        Advanced SIMD argument as an SVE vector.  */
+     if (!BYTES_BIG_ENDIAN
+ 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
+-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
++      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
+ 
+     rtx_vector_builder builder (VNx16BImode, 16, 2);
+     for (unsigned int i = 0; i < 16; i++)
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index 8e5f6b8e680..f6843398c4b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
+   return temp;
+ }
+ 
++/* Like simplify_gen_subreg, but force OP into a new register if the
++   subreg cannot be formed directly.  */
++
++rtx
++force_subreg (machine_mode outermode, rtx op,
++	      machine_mode innermode, poly_uint64 byte)
++{
++  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
++  if (x)
++    return x;
++
++  op = copy_to_mode_reg (innermode, op);
++  return simplify_gen_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index 16aa02cfb68..cbd1fcb7eb3 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+    Args are mode (in case value is a constant) and the value.  */
+ extern rtx force_reg (machine_mode, rtx);
+ 
++extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+ 
+diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
+index dceaa13333c..729d408aa55 100644
+--- a/gcc/simplify-rtx.cc
++++ b/gcc/simplify-rtx.cc
+@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
+       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
+       rtx newx;
+ 
++      /* Make sure that the relationship between the two subregs is
++	 known at compile time.  */
++      if (!ordered_p (outersize, innermostsize))
++	return NULL_RTX;
++
+       if (outermode == innermostmode
+ 	  && known_eq (byte, 0U)
+ 	  && known_eq (SUBREG_BYTE (op), 0))
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+new file mode 100644
+index 00000000000..d728d1325ed
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+@@ -0,0 +1,13 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl)
++{
++    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
++}
++
++/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
+-- 
+2.46.0
+
+
+From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:30 +0100
+Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
+
+This patch makes the aarch64 code use force_subreg instead of
+simplify_gen_subreg in more places.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+(3) The offset wasn't a simple lowpart or highpart calculation;
+    a later patch will deal with those.
+
+gcc/
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
+	Use force_subreg instead of simplify_gen_subreg.
+	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svget_impl::expand): Likewise.
+	(svget_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-functions.h
+	(multireg_permute::expand): Likewise.
+
+(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
+---
+ gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
+ gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
+ gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
+ 4 files changed, 10 insertions(+), 12 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index 75d21de1401..b2e46a073a8 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+       rtx temp2 = gen_reg_rtx (DImode);
+       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+ 				   subreg_lowpart_offset (d->mode, quadmode));
+-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
++      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+       else
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
+-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
++      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
+ 
+       /* And recalculate the index.  */
+       lane -= nunits / 4;
+diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
+index 33ab0741e87..5b9efe0b165 100644
+--- a/gcc/config/aarch64/aarch64-simd.md
++++ b/gcc/config/aarch64/aarch64-simd.md
+@@ -412,8 +412,8 @@
+   "TARGET_SIMD"
+   {
+      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
+-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
+-					     <MODE>mode, 0);
++     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
++				       <MODE>mode, 0);
+      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
+      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+      DONE;
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index c9182594bc1..2c95da79572 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1121,9 +1121,8 @@ public:
+   expand (function_expander &e) const override
+   {
+     /* Fold the access into a subreg rvalue.  */
+-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
+-				GET_MODE (e.args[0]),
+-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
++    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
++			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
+   }
+ };
+ 
+@@ -1157,8 +1156,7 @@ public:
+ 	e.add_fixed_operand (indices);
+ 	return e.generate_insn (icode);
+       }
+-    return simplify_gen_subreg (e.result_mode (), e.args[0],
+-				GET_MODE (e.args[0]), 0);
++    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
+   }
+ };
+ 
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+index 3b8e575e98e..7d06a57ff83 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
++++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+@@ -639,9 +639,9 @@ public:
+       {
+ 	machine_mode elt_mode = e.vector_mode (0);
+ 	rtx arg = e.args[0];
+-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
+-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
+-					       GET_MODE_SIZE (elt_mode)));
++	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
++	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
++					GET_MODE_SIZE (elt_mode)));
+       }
+     return e.use_exact_insn (icode);
+   }
+-- 
+2.46.0
+
+
+From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
+
+This patch makes more use of force_lowpart_subreg, similarly
+to the recent patch for force_subreg.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+gcc/
+	PR target/115464
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
+	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
+	simplify_gen_subreg and lowpart_subreg.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-sme.cc
+	(add_load_store_slice_operand): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
+	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
+
+(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
+---
+ gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
+ gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
+ gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
+ .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
+ 5 files changed, 23 insertions(+), 17 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index b2e46a073a8..264b9560709 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+   int lane = INTVAL (lane_idx);
+ 
+   if (lane < nunits / 4)
+-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
+-			       subreg_lowpart_offset (d->mode, quadmode));
++    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
+   else
+     {
+       /* Select the upper 64 bits, either a V2SF or V4HF, this however
+@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+ 	 gen_highpart_mode generates code that isn't optimal.  */
+       rtx temp1 = gen_reg_rtx (d->mode);
+       rtx temp2 = gen_reg_rtx (DImode);
+-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+-				   subreg_lowpart_offset (d->mode, quadmode));
++      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
+       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+ 	case AARCH64_WSR64:
+ 	case AARCH64_WSRF64:
+ 	case AARCH64_WSR128:
+-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
++	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
+ 	  break;
+ 	case AARCH64_WSRF:
+ 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
+@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+     case AARCH64_RSR64:
+     case AARCH64_RSRF64:
+     case AARCH64_RSR128:
+-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
++      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
++				   target, sysreg_mode);
+     case AARCH64_RSRF:
+       subreg = gen_lowpart_SUBREG (SImode, target);
+       return gen_lowpart_SUBREG (SFmode, subreg);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 2c95da79572..3c970e9c5f8 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1183,7 +1183,7 @@ public:
+     if (BYTES_BIG_ENDIAN)
+       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
+     insn_code icode = code_for_vcond_mask (mode, mode);
+-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
++    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
+     e.add_output_operand (icode);
+     e.add_input_operand (icode, e.args[1]);
+     e.add_input_operand (icode, e.args[0]);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+index f4c91bcbb95..b66b35ae60b 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
+   rtx base = e.args[argno];
+   if (e.mode_suffix_id == MODE_vnum)
+     {
+-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
++      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
+       base = simplify_gen_binary (PLUS, SImode, base, vnum);
+     }
+   e.add_input_operand (icode, base);
+diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
+index 1beec94629d..a064aeecbc0 100644
+--- a/gcc/config/aarch64/aarch64.cc
++++ b/gcc/config/aarch64/aarch64.cc
+@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
+   /* can_change_mode_class must only return true if subregs and svreinterprets
+      have the same semantics.  */
+   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
+-    return lowpart_subreg (mode, x, GET_MODE (x));
++    return force_lowpart_subreg (mode, x, GET_MODE (x));
+ 
+   rtx res = gen_reg_rtx (mode);
+   x = force_reg (GET_MODE (x), x);
+@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			    rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = gen_lowpart (DImode, op1);
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+   *high_in1 = gen_highpart (DImode, op1);
+   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
+@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			     rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
+-
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+ 
+   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+new file mode 100644
+index 00000000000..f561c34f732
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
++{
++    return svset_neonq_u16 (a, permute_tbl.val[1]);
++}
+-- 
+2.46.0
+
+
+From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 4/4] Add force_lowpart_subreg
+
+optabs had a local function called lowpart_subreg_maybe_copy
+that is very similar to the lowpart version of force_subreg.
+This patch adds a force_lowpart_subreg wrapper around
+force_subreg and uses it in optabs.cc.
+
+The only difference between the old and new functions is that
+the old one asserted success while the new one doesn't.
+It's common not to assert elsewhere when taking subregs;
+normally a null result is enough.
+
+Later patches will make more use of the new function.
+
+gcc/
+	* explow.h (force_lowpart_subreg): Declare.
+	* explow.cc (force_lowpart_subreg): New function.
+	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
+	(expand_absneg_bit): Use force_lowpart_subreg instead of
+	lowpart_subreg_maybe_copy.
+	(expand_copysign_bit): Likewise.
+
+(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
+---
+ gcc/explow.cc | 14 ++++++++++++++
+ gcc/explow.h  |  1 +
+ gcc/optabs.cc | 24 ++----------------------
+ 3 files changed, 17 insertions(+), 22 deletions(-)
+
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index f6843398c4b..5fdfa81f69b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
+   return simplify_gen_subreg (outermode, op, innermode, byte);
+ }
+ 
++/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
++   which has mode INNERMODE.  Allow OP to be forced into a new register
++   if necessary.
++
++   Return null on failure.  */
++
++rtx
++force_lowpart_subreg (machine_mode outermode, rtx op,
++		      machine_mode innermode)
++{
++  auto byte = subreg_lowpart_offset (outermode, innermode);
++  return force_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index cbd1fcb7eb3..dd654649b06 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+ extern rtx force_reg (machine_mode, rtx);
+ 
+ extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
+ 
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+diff --git a/gcc/optabs.cc b/gcc/optabs.cc
+index ce91f94ed43..804c0dc73ba 100644
+--- a/gcc/optabs.cc
++++ b/gcc/optabs.cc
+@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
+   return 0;
+ }
+ 
+-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
+-   conditions, VAL may already be a SUBREG against which we cannot generate
+-   a further SUBREG.  In this case, we expect forcing the value into a
+-   register will work around the situation.  */
+-
+-static rtx
+-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+-			   machine_mode imode)
+-{
+-  rtx ret;
+-  ret = lowpart_subreg (omode, val, imode);
+-  if (ret == NULL)
+-    {
+-      val = force_reg (imode, val);
+-      ret = lowpart_subreg (omode, val, imode);
+-      gcc_assert (ret != NULL);
+-    }
+-  return ret;
+-}
+-
+ /* Expand a floating point absolute value or negation operation via a
+    logical operation on the sign bit.  */
+ 
+@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
+ 			   gen_lowpart (imode, op0),
+ 			   immed_wide_int_const (mask, imode),
+ 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+ 
+       set_dst_reg_note (get_last_insn (), REG_EQUAL,
+ 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
+@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
+ 
+       temp = expand_binop (imode, ior_optab, op0, op1,
+ 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+     }
+ 
+   return target;
+-- 
+2.46.0
+

cross/gcc-aarch64/ppc64le-quadmath.patch

@@ -0,0 +1,56 @@
+Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=3fe5720430a9ba61ed7562aac4d758cc77d49a28
+--
+From 3fe5720430a9ba61ed7562aac4d758cc77d49a28 Mon Sep 17 00:00:00 2001
+From: Jakub Jelinek <jakub@redhat.com>
+Date: Sat, 3 Aug 2024 20:37:54 +0200
+Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in
+ some powerpc* configurations [PR116007]
+
+My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation.
+Unfortunately, that seems to fail building in some powerpc* configurations, where
+TFmode isn't available.
+quad.h has:
+ #ifndef TFtype
+ typedef float TFtype __attribute__ ((mode (TF)));
+ #endif
+and uses TFtype.  quad.h has:
+ /* Define the complex type corresponding to __float128
+    ("_Complex __float128" is not allowed) */
+ #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__)
+ typedef _Complex float __attribute__((mode(TC))) __complex128;
+ #else
+ typedef _Complex float __attribute__((mode(KC))) __complex128;
+ #endif
+with the conditional and KCmode use added during porting of libquadmath
+to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__
+isn't defined; I could define it to float __attribute__ ((mode (KF))) but it
+seemed easier to just define it to __float128 which should do the same thing.
+
+2024-08-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/116007
+	* math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__
+	define to __float128 before including soft-fp.h and quad.h.
+
+(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b)
+---
+ libquadmath/math/sqrtq.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c
+index 8ca2828d42ce..a58998a06670 100644
+--- a/libquadmath/math/sqrtq.c
++++ b/libquadmath/math/sqrtq.c
+@@ -9,6 +9,9 @@
+     && defined(FE_TOWARDZERO) \
+     && defined(FE_INEXACT)
+ #define USE_SOFT_FP 1
++#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__)
++#define TFtype __float128
++#endif
+ #include "../../libgcc/soft-fp/soft-fp.h"
+ #include "../../libgcc/soft-fp/quad.h"
+ #endif
+-- 
+2.43.5
+

cross/gcc-armhf/0026-ada-musl-support-fixes.patch

@@ -4,17 +4,17 @@ Date: Fri, 21 Aug 2020 07:07:48 +0000
 Subject: [PATCH 26/35] ada: musl support fixes
 
 ---
- gcc/ada/Makefile.rtl | 10 +++++-----
+ gcc/ada/Makefile.rtl | 16 ++++++++--------
  gcc/ada/adaint.c     | 34 +++++++++++++++++++---------------
  gcc/ada/adaint.h     | 10 ++++------
  gcc/ada/terminals.c  |  8 ++++----
- 4 files changed, 32 insertions(+), 30 deletions(-)
+ 4 files changed, 35 insertions(+), 33 deletions(-)
 
 diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
-index 96306f8cc9a..090b6770ae5 100644
+index 32cbdb692..463028fbe 100644
 --- a/gcc/ada/Makefile.rtl
 +++ b/gcc/ada/Makefile.rtl
-@@ -1549,7 +1549,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
+@@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
    s-intman.adb<libgnarl/s-intman__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -23,7 +23,16 @@ index 96306f8cc9a..090b6770ae5 100644
    a-exetim.adb<libgnarl/a-exetim__posix.adb \
    a-exetim.ads<libgnarl/a-exetim__default.ads \
    s-linux.ads<libgnarl/s-linux.ads \
-@@ -2174,7 +2174,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2144,7 +2144,7 @@ ifeq ($(strip $(filter-out loongarch% linux%,$(target_cpu) $(target_os))),)
+   g-sercom.adb<libgnat/g-sercom__linux.adb \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+   $(GNATRTL_128BIT_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(ATOMICS_BUILTINS_TARGET_PAIRS) \
+   system.ads<libgnat/system-linux-loongarch.ads
+@@ -2232,7 +2232,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -32,7 +41,7 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-ppc.ads
-@@ -2205,7 +2205,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2267,7 +2267,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
  endif
  
  # ARM linux, GNU eabi
@@ -50,7 +59,7 @@ index 96306f8cc9a..090b6770ae5 100644
    s-mudido.adb<libgnarl/s-mudido__affinity.adb \
    s-osinte.ads<libgnarl/s-osinte__linux.ads \
    s-osinte.adb<libgnarl/s-osinte__posix.adb \
-@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
+@@ -2488,7 +2488,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -59,7 +68,16 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    $(GNATRTL_128BIT_PAIRS) \
-@@ -2524,7 +2524,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+@@ -2592,7 +2592,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
+   s-taspri.ads<libgnarl/s-taspri__posix.ads \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(X86_64_TARGET_PAIRS) \
+   $(SIMD_PATH_TARGET_PAIRS) \
+@@ -2637,7 +2637,7 @@ ifeq ($(strip $(filter-out %x32 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -69,10 +87,10 @@ index 96306f8cc9a..090b6770ae5 100644
    $(X86_64_TARGET_PAIRS) \
    $(SIMD_PATH_TARGET_PAIRS) \
 diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
-index 8522094164e..92b230a462b 100644
+index 74aa3c412..ef6118f37 100644
 --- a/gcc/ada/adaint.c
 +++ b/gcc/ada/adaint.c
-@@ -91,6 +91,11 @@
+@@ -94,6 +94,11 @@
  #include <sys/param.h>
  #include <sys/pstat.h>
  #endif
@@ -84,7 +102,7 @@ index 8522094164e..92b230a462b 100644
  
  #ifdef __PikeOS__
  #define __BSD_VISIBLE 1
-@@ -3438,7 +3443,6 @@ __gnat_lwp_self (void)
+@@ -3465,7 +3470,6 @@ __gnat_lwp_self (void)
  #endif
  
  #if defined (__linux__)
@@ -92,7 +110,7 @@ index 8522094164e..92b230a462b 100644
  
  /* glibc versions earlier than 2.7 do not define the routines to handle
     dynamically allocated CPU sets. For these targets, we use the static
-@@ -3448,7 +3452,7 @@ __gnat_lwp_self (void)
+@@ -3475,7 +3479,7 @@ __gnat_lwp_self (void)
  
  /* Dynamic cpu sets */
  
@@ -101,7 +119,7 @@ index 8522094164e..92b230a462b 100644
  __gnat_cpu_alloc (size_t count)
  {
    return CPU_ALLOC (count);
-@@ -3461,33 +3465,33 @@ __gnat_cpu_alloc_size (size_t count)
+@@ -3488,33 +3492,33 @@ __gnat_cpu_alloc_size (size_t count)
  }
  
  void
@@ -143,7 +161,7 @@ index 8522094164e..92b230a462b 100644
  }
  
  size_t
-@@ -3497,23 +3501,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
+@@ -3524,23 +3528,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
  }
  
  void
@@ -173,7 +191,7 @@ index 8522094164e..92b230a462b 100644
  #endif /* !CPU_ALLOC */
  #endif /* __linux__ */
 diff --git a/gcc/ada/adaint.h b/gcc/ada/adaint.h
-index 987432c9307..4d782f07de9 100644
+index 0cbfd0e15..f97ed905b 100644
 --- a/gcc/ada/adaint.h
 +++ b/gcc/ada/adaint.h
 @@ -319,13 +319,11 @@ extern void   *__gnat_lwp_self			   (void);
@@ -195,10 +213,10 @@ index 987432c9307..4d782f07de9 100644
  
  #if defined (_WIN32)
 diff --git a/gcc/ada/terminals.c b/gcc/ada/terminals.c
-index c0ee4a16bb1..ed796a48c1b 100644
+index 05af82c27..626ac35bc 100644
 --- a/gcc/ada/terminals.c
 +++ b/gcc/ada/terminals.c
-@@ -1127,7 +1127,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1134,7 +1134,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  /* POSIX does not specify how to open the master side of a terminal.Several
     methods are available (system specific):
        1- using a cloning device (USE_CLONE_DEVICE)
@@ -207,7 +225,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
        3- openpty                (USE_OPENPTY)
  
     When using the cloning device method, the macro USE_CLONE_DEVICE should
-@@ -1141,7 +1141,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1148,7 +1148,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  #if defined (__APPLE__) || defined (BSD)
  #define USE_OPENPTY
  #elif defined (__linux__)
@@ -216,7 +234,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (__sun__)
  #define USE_CLONE_DEVICE "/dev/ptmx"
  #elif defined (_AIX)
-@@ -1190,8 +1190,8 @@ allocate_pty_desc (pty_desc **desc) {
+@@ -1197,8 +1197,8 @@ allocate_pty_desc (pty_desc **desc) {
     int  master_fd   = -1;
     char *slave_name = NULL;
  
@@ -227,6 +245,3 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (USE_OPENPTY)
    status = openpty (&master_fd, &slave_fd, NULL, NULL, NULL);
  #elif defined (USE_CLONE_DEVICE)
--- 
-2.41.0
-

cross/gcc-armhf/0036-libphobos-add-riscv64-and-loongarch64-support.patch

@@ -0,0 +1,87 @@
+From: Celeste <cielesti@protonmail.com>
+Date: Mon, 2 Sep 2024 02:54:17 +0000
+Subject: [PATCH] libphobos: add riscv64 and loongarch64 support
+
+Add musl support for these 2 architectures based on fenv.h and signal.h from:
+
+https://git.musl-libc.org/cgit/musl/tree/arch/riscv64/bits?h=v1.2.5
+
+https://git.musl-libc.org/cgit/musl/tree/arch/loongarch64/bits?h=v1.2.5
+---
+ libphobos/libdruntime/core/stdc/fenv.d        | 13 +++++++++++++
+ libphobos/libdruntime/core/sys/posix/signal.d | 10 ++++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/libphobos/libdruntime/core/stdc/fenv.d b/libphobos/libdruntime/core/stdc/fenv.d
+index a7364c0a..5b327e4a 100644
+--- a/libphobos/libdruntime/core/stdc/fenv.d
++++ b/libphobos/libdruntime/core/stdc/fenv.d
+@@ -436,20 +436,33 @@ else version (CRuntime_Musl)
+             ushort __cs_selector;
+             ushort __opcode;
+             uint   __data_offset;
+             ushort __data_selector;
+             ushort __unused5;
+             version (X86_64)
+                 uint __mxcsr;
+         }
+         alias ushort fexcept_t;
+     }
++    else version (RISCV64)
++    {
++        alias uint fenv_t;
++        alias uint fexcept_t;
++    }
++    else version (LoongArch64)
++    {
++        struct fenv_t
++        {
++            uint __cw;
++        }
++        alias uint fexcept_t;
++    }
+     else
+     {
+         static assert(false, "Architecture not supported.");
+     }
+ }
+ else version (CRuntime_Newlib)
+ {
+     version (AArch64)
+     {
+         alias fenv_t = ulong;
+diff --git a/libphobos/libdruntime/core/sys/posix/signal.d b/libphobos/libdruntime/core/sys/posix/signal.d
+index a8b7f751..78d8b3cd 100644
+--- a/libphobos/libdruntime/core/sys/posix/signal.d
++++ b/libphobos/libdruntime/core/sys/posix/signal.d
+@@ -2751,20 +2751,30 @@ else version (CRuntime_Musl)
+     else version (PPC_Any)
+     {
+         enum MINSIGSTKSZ = 4096;
+         enum SIGSTKSZ    = 10240;
+     }
+     else version (X86_Any)
+     {
+         enum MINSIGSTKSZ = 2048;
+         enum SIGSTKSZ    = 8192;
+     }
++    else version (RISCV64)
++    {
++        enum MINSIGSTKSZ = 2048;
++        enum SIGSTKSZ    = 8192;
++    }
++    else version (LoongArch64)
++    {
++        enum MINSIGSTKSZ = 4096;
++        enum SIGSTKSZ    = 16384;
++    }
+     else
+         static assert(0, "unimplemented");
+ 
+     //ucontext_t (defined in core.sys.posix.ucontext)
+     //mcontext_t (defined in core.sys.posix.ucontext)
+ 
+     version (MIPS_Any)
+     {
+         struct stack_t
+         {

cross/gcc-armhf/APKBUILD

@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
 
 pkgname=gcc-armhf
-pkgrel=0
+pkgrel=3
 pkgdesc="Stage2 cross-compiler for armhf"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -64,6 +64,7 @@ _libitm=true
 if [ "$CHOST" != "$CTARGET" ]; then
 	if [ "$BOOTSTRAP" = nolibc ]; then
 		LANG_CXX=false
+		LANG_D=false
 		LANG_ADA=false
 		_libgcc=false
 		_builddir="$srcdir/build-cross-pass2"
@@ -73,7 +74,6 @@ if [ "$CHOST" != "$CTARGET" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 	_libgomp=false
 	_libatomic=false
@@ -115,7 +115,6 @@ elif [ "$CBUILD" != "$CHOST" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 
 	STRIP_FOR_TARGET=${CROSS_COMPILE}strip
@@ -140,11 +139,11 @@ else
 	export BOOT_LDFLAGS="$LDFLAGS"
 fi
 
-case "$CARCH" in
+case "$CTARGET_ARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -171,7 +170,7 @@ esac
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac
 
@@ -184,13 +183,8 @@ if $_libgomp; then
 	subpackages="$subpackages libgomp::$CTARGET_ARCH"
 fi
 
-case "$CARCH" in
-riscv64)
-LANG_ADA=false;;
-esac
-
 case "$CTARGET_ARCH" in
-loongarch64)
+riscv64|loongarch64)
 LANG_ADA=false;;
 esac
 
@@ -199,9 +193,17 @@ if $LANG_CXX; then
 	_languages="$_languages,c++"
 fi
 if $LANG_D; then
-	subpackages="$subpackages libgphobos::$CTARGET_ARCH gcc-gdc$_target:gdc"
+	subpackages="$subpackages gcc-gdc$_target:gdc"
 	_languages="$_languages,d"
-	makedepends_build="$makedepends_build libucontext-dev gcc-gdc-bootstrap"
+	makedepends_build="$makedepends_build libucontext-dev"
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		makedepends_build="$makedepends_build gcc-gdc-bootstrap"
+		subpackages="$subpackages libgphobos::$CTARGET_ARCH"
+	else
+		# shared libgphobos is for D programs to link against, so
+		# skip building that while cross-compiling the GDC compiler
+		makedepends_build="$makedepends_build gcc-gdc gcc-gdc$_cross"
+	fi
 fi
 if $LANG_OBJC; then
 	subpackages="$subpackages libobjc::$CTARGET_ARCH gcc-objc$_target:objc"
@@ -278,6 +280,9 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
 	0035-loongarch-disable-multilib-support.patch
+	0036-libphobos-add-riscv64-and-loongarch64-support.patch
+	fix-arm64.patch
+	ppc64le-quadmath.patch
 	"
 
 # secfixes:
@@ -359,20 +364,23 @@ build() {
 
 	case "$BOOTSTRAP" in
 	nolibc)	_bootstrap_configure="--with-newlib --disable-shared --enable-threads=no" ;;
-	*)	_bootstrap_configure="--enable-shared --enable-threads --enable-tls" ;;
+	*)
+		# cross-bootstrap GDC with a static libphobos: due to GCC's
+		# ./configure not having a --disable-shared=libphobos option,
+		# we have to use --enable-shared with everything else instead.
+		if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+			_bootstrap_configure="--enable-shared=libgcc,libstdc++,libffi,zlib,boehm-gc,ada,libada,libgo,libobjc,libatomic,libgomp,libitm,libgfortran,libquadmath"
+		else
+			_bootstrap_configure="--enable-shared"
+		fi
+		_bootstrap_configure="$_bootstrap_configure --enable-threads --enable-tls"
+		;;
 	esac
 
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"
 
 	msg "Building the following:"
 	echo ""
@@ -426,6 +434,10 @@ build() {
 		--with-pkgversion="$version"
 
 	msg "building gcc"
+	if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+		# cross-compiling libphobos with parallel make fails
+		make all-target-libphobos
+	fi
 	make
 
 	# we build gccjit separate to not build all of gcc with --enable-host-shared
@@ -666,9 +678,9 @@ libgphobos() {
 
 gdc() {
 	pkgdesc="GCC-based D language compiler"
-	depends="gcc=$_gccrel libgphobos=$_gccrel musl-dev"
-	depends="$depends libucontext-dev"
-	provides="gcc-gdc-bootstrap=$_gccrel"
+	depends="gcc$_target=$_gccrel musl-dev libucontext-dev"
+	[ "$CBUILD" = "$CTARGET" ] && depends="$depends libgphobos=$_gccrel"
+	[ "$CHOST" = "$CTARGET" ] && provides="gcc-gdc-bootstrap=$_gccrel"
 
 	mkdir -p "$subpkgdir/$_gcclibexec" \
 		"$subpkgdir"/$_gcclibdir/include/d/ \
@@ -679,13 +691,25 @@ gdc() {
 	# without installing the compiler
 	mv "$pkgdir/$_gcclibexec/d21" "$subpkgdir/$_gcclibexec/"
 	mv "$pkgdir"/$_gcclibdir/include/d/* "$subpkgdir"/$_gcclibdir/include/d/
-	mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
+	fi
+	if [ "$CHOST" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
+	else
+		mkdir -p "$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgdruntime.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.spec \
+			"$subpkgdir"/usr/$CTARGET/lib/
+	fi
 	mv "$pkgdir"/usr/bin/$CTARGET-gdc "$subpkgdir"/usr/bin/
-	mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
 }
 
 libgo() {
@@ -827,7 +851,7 @@ f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8
 abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+684bf2db12aa45e8db7a895ab0f227b4e4351f611b4fcc6e1745d7ad94d31b3554f39d8cf9e2203520b3c6ee35cf309b417d4a842e7a8cd55a2b2accb23f2f24  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,4 +861,7 @@ b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
+06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453  0036-libphobos-add-riscv64-and-loongarch64-support.patch
+00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9  ppc64le-quadmath.patch
 "

cross/gcc-armhf/fix-arm64.patch

@@ -0,0 +1,544 @@
+From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 13 Jun 2024 12:48:21 +0100
+Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
+
+The testcase extracts one arm_neon.h vector from a pair (one subreg)
+and then reinterprets the result as an SVE vector (another subreg).
+Each subreg makes sense individually, but we can't fold them together
+into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
+but the interpretation of 32 bytes -> 16*N bytes depends on
+whether N==1 or N>1.
+
+Since the second subreg makes sense individually, simplify_subreg
+should bail out rather than ICE on it.  simplify_gen_subreg will
+then do the same (because it already checks validate_subreg).
+This leaves simplify_gen_subreg returning null, requiring the
+caller to take appropriate action.
+
+I think this is relatively likely to occur elsewhere, so the patch
+adds a helper for forcing a subreg, allowing a temporary pseudo to
+be created where necessary.
+
+I'll follow up by using force_subreg in more places.  This patch
+is intended to be a minimal backportable fix for the PR.
+
+gcc/
+	PR target/115464
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
+	to fold two subregs together if their relationship isn't known
+	at compile time.
+	* explow.h (force_subreg): Declare.
+	* explow.cc (force_subreg): New function.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
+
+(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
+---
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
+ gcc/explow.cc                                     | 15 +++++++++++++++
+ gcc/explow.h                                      |  2 ++
+ gcc/simplify-rtx.cc                               |  5 +++++
+ .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
+ 5 files changed, 36 insertions(+), 1 deletion(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 0d2edf3f19e..c9182594bc1 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1174,7 +1174,7 @@ public:
+        Advanced SIMD argument as an SVE vector.  */
+     if (!BYTES_BIG_ENDIAN
+ 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
+-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
++      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
+ 
+     rtx_vector_builder builder (VNx16BImode, 16, 2);
+     for (unsigned int i = 0; i < 16; i++)
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index 8e5f6b8e680..f6843398c4b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
+   return temp;
+ }
+ 
++/* Like simplify_gen_subreg, but force OP into a new register if the
++   subreg cannot be formed directly.  */
++
++rtx
++force_subreg (machine_mode outermode, rtx op,
++	      machine_mode innermode, poly_uint64 byte)
++{
++  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
++  if (x)
++    return x;
++
++  op = copy_to_mode_reg (innermode, op);
++  return simplify_gen_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index 16aa02cfb68..cbd1fcb7eb3 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+    Args are mode (in case value is a constant) and the value.  */
+ extern rtx force_reg (machine_mode, rtx);
+ 
++extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+ 
+diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
+index dceaa13333c..729d408aa55 100644
+--- a/gcc/simplify-rtx.cc
++++ b/gcc/simplify-rtx.cc
+@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
+       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
+       rtx newx;
+ 
++      /* Make sure that the relationship between the two subregs is
++	 known at compile time.  */
++      if (!ordered_p (outersize, innermostsize))
++	return NULL_RTX;
++
+       if (outermode == innermostmode
+ 	  && known_eq (byte, 0U)
+ 	  && known_eq (SUBREG_BYTE (op), 0))
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+new file mode 100644
+index 00000000000..d728d1325ed
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+@@ -0,0 +1,13 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl)
++{
++    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
++}
++
++/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
+-- 
+2.46.0
+
+
+From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:30 +0100
+Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
+
+This patch makes the aarch64 code use force_subreg instead of
+simplify_gen_subreg in more places.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+(3) The offset wasn't a simple lowpart or highpart calculation;
+    a later patch will deal with those.
+
+gcc/
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
+	Use force_subreg instead of simplify_gen_subreg.
+	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svget_impl::expand): Likewise.
+	(svget_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-functions.h
+	(multireg_permute::expand): Likewise.
+
+(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
+---
+ gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
+ gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
+ gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
+ 4 files changed, 10 insertions(+), 12 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index 75d21de1401..b2e46a073a8 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+       rtx temp2 = gen_reg_rtx (DImode);
+       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+ 				   subreg_lowpart_offset (d->mode, quadmode));
+-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
++      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+       else
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
+-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
++      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
+ 
+       /* And recalculate the index.  */
+       lane -= nunits / 4;
+diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
+index 33ab0741e87..5b9efe0b165 100644
+--- a/gcc/config/aarch64/aarch64-simd.md
++++ b/gcc/config/aarch64/aarch64-simd.md
+@@ -412,8 +412,8 @@
+   "TARGET_SIMD"
+   {
+      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
+-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
+-					     <MODE>mode, 0);
++     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
++				       <MODE>mode, 0);
+      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
+      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+      DONE;
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index c9182594bc1..2c95da79572 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1121,9 +1121,8 @@ public:
+   expand (function_expander &e) const override
+   {
+     /* Fold the access into a subreg rvalue.  */
+-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
+-				GET_MODE (e.args[0]),
+-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
++    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
++			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
+   }
+ };
+ 
+@@ -1157,8 +1156,7 @@ public:
+ 	e.add_fixed_operand (indices);
+ 	return e.generate_insn (icode);
+       }
+-    return simplify_gen_subreg (e.result_mode (), e.args[0],
+-				GET_MODE (e.args[0]), 0);
++    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
+   }
+ };
+ 
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+index 3b8e575e98e..7d06a57ff83 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
++++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+@@ -639,9 +639,9 @@ public:
+       {
+ 	machine_mode elt_mode = e.vector_mode (0);
+ 	rtx arg = e.args[0];
+-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
+-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
+-					       GET_MODE_SIZE (elt_mode)));
++	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
++	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
++					GET_MODE_SIZE (elt_mode)));
+       }
+     return e.use_exact_insn (icode);
+   }
+-- 
+2.46.0
+
+
+From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
+
+This patch makes more use of force_lowpart_subreg, similarly
+to the recent patch for force_subreg.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+gcc/
+	PR target/115464
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
+	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
+	simplify_gen_subreg and lowpart_subreg.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-sme.cc
+	(add_load_store_slice_operand): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
+	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
+
+(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
+---
+ gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
+ gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
+ gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
+ .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
+ 5 files changed, 23 insertions(+), 17 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index b2e46a073a8..264b9560709 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+   int lane = INTVAL (lane_idx);
+ 
+   if (lane < nunits / 4)
+-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
+-			       subreg_lowpart_offset (d->mode, quadmode));
++    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
+   else
+     {
+       /* Select the upper 64 bits, either a V2SF or V4HF, this however
+@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+ 	 gen_highpart_mode generates code that isn't optimal.  */
+       rtx temp1 = gen_reg_rtx (d->mode);
+       rtx temp2 = gen_reg_rtx (DImode);
+-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+-				   subreg_lowpart_offset (d->mode, quadmode));
++      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
+       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+ 	case AARCH64_WSR64:
+ 	case AARCH64_WSRF64:
+ 	case AARCH64_WSR128:
+-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
++	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
+ 	  break;
+ 	case AARCH64_WSRF:
+ 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
+@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+     case AARCH64_RSR64:
+     case AARCH64_RSRF64:
+     case AARCH64_RSR128:
+-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
++      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
++				   target, sysreg_mode);
+     case AARCH64_RSRF:
+       subreg = gen_lowpart_SUBREG (SImode, target);
+       return gen_lowpart_SUBREG (SFmode, subreg);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 2c95da79572..3c970e9c5f8 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1183,7 +1183,7 @@ public:
+     if (BYTES_BIG_ENDIAN)
+       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
+     insn_code icode = code_for_vcond_mask (mode, mode);
+-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
++    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
+     e.add_output_operand (icode);
+     e.add_input_operand (icode, e.args[1]);
+     e.add_input_operand (icode, e.args[0]);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+index f4c91bcbb95..b66b35ae60b 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
+   rtx base = e.args[argno];
+   if (e.mode_suffix_id == MODE_vnum)
+     {
+-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
++      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
+       base = simplify_gen_binary (PLUS, SImode, base, vnum);
+     }
+   e.add_input_operand (icode, base);
+diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
+index 1beec94629d..a064aeecbc0 100644
+--- a/gcc/config/aarch64/aarch64.cc
++++ b/gcc/config/aarch64/aarch64.cc
+@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
+   /* can_change_mode_class must only return true if subregs and svreinterprets
+      have the same semantics.  */
+   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
+-    return lowpart_subreg (mode, x, GET_MODE (x));
++    return force_lowpart_subreg (mode, x, GET_MODE (x));
+ 
+   rtx res = gen_reg_rtx (mode);
+   x = force_reg (GET_MODE (x), x);
+@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			    rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = gen_lowpart (DImode, op1);
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+   *high_in1 = gen_highpart (DImode, op1);
+   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
+@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			     rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
+-
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+ 
+   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+new file mode 100644
+index 00000000000..f561c34f732
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
++{
++    return svset_neonq_u16 (a, permute_tbl.val[1]);
++}
+-- 
+2.46.0
+
+
+From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 4/4] Add force_lowpart_subreg
+
+optabs had a local function called lowpart_subreg_maybe_copy
+that is very similar to the lowpart version of force_subreg.
+This patch adds a force_lowpart_subreg wrapper around
+force_subreg and uses it in optabs.cc.
+
+The only difference between the old and new functions is that
+the old one asserted success while the new one doesn't.
+It's common not to assert elsewhere when taking subregs;
+normally a null result is enough.
+
+Later patches will make more use of the new function.
+
+gcc/
+	* explow.h (force_lowpart_subreg): Declare.
+	* explow.cc (force_lowpart_subreg): New function.
+	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
+	(expand_absneg_bit): Use force_lowpart_subreg instead of
+	lowpart_subreg_maybe_copy.
+	(expand_copysign_bit): Likewise.
+
+(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
+---
+ gcc/explow.cc | 14 ++++++++++++++
+ gcc/explow.h  |  1 +
+ gcc/optabs.cc | 24 ++----------------------
+ 3 files changed, 17 insertions(+), 22 deletions(-)
+
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index f6843398c4b..5fdfa81f69b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
+   return simplify_gen_subreg (outermode, op, innermode, byte);
+ }
+ 
++/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
++   which has mode INNERMODE.  Allow OP to be forced into a new register
++   if necessary.
++
++   Return null on failure.  */
++
++rtx
++force_lowpart_subreg (machine_mode outermode, rtx op,
++		      machine_mode innermode)
++{
++  auto byte = subreg_lowpart_offset (outermode, innermode);
++  return force_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index cbd1fcb7eb3..dd654649b06 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+ extern rtx force_reg (machine_mode, rtx);
+ 
+ extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
+ 
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+diff --git a/gcc/optabs.cc b/gcc/optabs.cc
+index ce91f94ed43..804c0dc73ba 100644
+--- a/gcc/optabs.cc
++++ b/gcc/optabs.cc
+@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
+   return 0;
+ }
+ 
+-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
+-   conditions, VAL may already be a SUBREG against which we cannot generate
+-   a further SUBREG.  In this case, we expect forcing the value into a
+-   register will work around the situation.  */
+-
+-static rtx
+-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+-			   machine_mode imode)
+-{
+-  rtx ret;
+-  ret = lowpart_subreg (omode, val, imode);
+-  if (ret == NULL)
+-    {
+-      val = force_reg (imode, val);
+-      ret = lowpart_subreg (omode, val, imode);
+-      gcc_assert (ret != NULL);
+-    }
+-  return ret;
+-}
+-
+ /* Expand a floating point absolute value or negation operation via a
+    logical operation on the sign bit.  */
+ 
+@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
+ 			   gen_lowpart (imode, op0),
+ 			   immed_wide_int_const (mask, imode),
+ 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+ 
+       set_dst_reg_note (get_last_insn (), REG_EQUAL,
+ 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
+@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
+ 
+       temp = expand_binop (imode, ior_optab, op0, op1,
+ 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+     }
+ 
+   return target;
+-- 
+2.46.0
+

cross/gcc-armhf/ppc64le-quadmath.patch

@@ -0,0 +1,56 @@
+Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=3fe5720430a9ba61ed7562aac4d758cc77d49a28
+--
+From 3fe5720430a9ba61ed7562aac4d758cc77d49a28 Mon Sep 17 00:00:00 2001
+From: Jakub Jelinek <jakub@redhat.com>
+Date: Sat, 3 Aug 2024 20:37:54 +0200
+Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in
+ some powerpc* configurations [PR116007]
+
+My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation.
+Unfortunately, that seems to fail building in some powerpc* configurations, where
+TFmode isn't available.
+quad.h has:
+ #ifndef TFtype
+ typedef float TFtype __attribute__ ((mode (TF)));
+ #endif
+and uses TFtype.  quad.h has:
+ /* Define the complex type corresponding to __float128
+    ("_Complex __float128" is not allowed) */
+ #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__)
+ typedef _Complex float __attribute__((mode(TC))) __complex128;
+ #else
+ typedef _Complex float __attribute__((mode(KC))) __complex128;
+ #endif
+with the conditional and KCmode use added during porting of libquadmath
+to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__
+isn't defined; I could define it to float __attribute__ ((mode (KF))) but it
+seemed easier to just define it to __float128 which should do the same thing.
+
+2024-08-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/116007
+	* math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__
+	define to __float128 before including soft-fp.h and quad.h.
+
+(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b)
+---
+ libquadmath/math/sqrtq.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c
+index 8ca2828d42ce..a58998a06670 100644
+--- a/libquadmath/math/sqrtq.c
++++ b/libquadmath/math/sqrtq.c
+@@ -9,6 +9,9 @@
+     && defined(FE_TOWARDZERO) \
+     && defined(FE_INEXACT)
+ #define USE_SOFT_FP 1
++#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__)
++#define TFtype __float128
++#endif
+ #include "../../libgcc/soft-fp/soft-fp.h"
+ #include "../../libgcc/soft-fp/quad.h"
+ #endif
+-- 
+2.43.5
+

cross/gcc-armv7/0026-ada-musl-support-fixes.patch

@@ -4,17 +4,17 @@ Date: Fri, 21 Aug 2020 07:07:48 +0000
 Subject: [PATCH 26/35] ada: musl support fixes
 
 ---
- gcc/ada/Makefile.rtl | 10 +++++-----
+ gcc/ada/Makefile.rtl | 16 ++++++++--------
  gcc/ada/adaint.c     | 34 +++++++++++++++++++---------------
  gcc/ada/adaint.h     | 10 ++++------
  gcc/ada/terminals.c  |  8 ++++----
- 4 files changed, 32 insertions(+), 30 deletions(-)
+ 4 files changed, 35 insertions(+), 33 deletions(-)
 
 diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
-index 96306f8cc9a..090b6770ae5 100644
+index 32cbdb692..463028fbe 100644
 --- a/gcc/ada/Makefile.rtl
 +++ b/gcc/ada/Makefile.rtl
-@@ -1549,7 +1549,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
+@@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
    s-intman.adb<libgnarl/s-intman__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -23,7 +23,16 @@ index 96306f8cc9a..090b6770ae5 100644
    a-exetim.adb<libgnarl/a-exetim__posix.adb \
    a-exetim.ads<libgnarl/a-exetim__default.ads \
    s-linux.ads<libgnarl/s-linux.ads \
-@@ -2174,7 +2174,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2144,7 +2144,7 @@ ifeq ($(strip $(filter-out loongarch% linux%,$(target_cpu) $(target_os))),)
+   g-sercom.adb<libgnat/g-sercom__linux.adb \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+   $(GNATRTL_128BIT_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(ATOMICS_BUILTINS_TARGET_PAIRS) \
+   system.ads<libgnat/system-linux-loongarch.ads
+@@ -2232,7 +2232,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -32,7 +41,7 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-ppc.ads
-@@ -2205,7 +2205,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2267,7 +2267,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
  endif
  
  # ARM linux, GNU eabi
@@ -50,7 +59,7 @@ index 96306f8cc9a..090b6770ae5 100644
    s-mudido.adb<libgnarl/s-mudido__affinity.adb \
    s-osinte.ads<libgnarl/s-osinte__linux.ads \
    s-osinte.adb<libgnarl/s-osinte__posix.adb \
-@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
+@@ -2488,7 +2488,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -59,7 +68,16 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    $(GNATRTL_128BIT_PAIRS) \
-@@ -2524,7 +2524,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+@@ -2592,7 +2592,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
+   s-taspri.ads<libgnarl/s-taspri__posix.ads \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(X86_64_TARGET_PAIRS) \
+   $(SIMD_PATH_TARGET_PAIRS) \
+@@ -2637,7 +2637,7 @@ ifeq ($(strip $(filter-out %x32 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -69,10 +87,10 @@ index 96306f8cc9a..090b6770ae5 100644
    $(X86_64_TARGET_PAIRS) \
    $(SIMD_PATH_TARGET_PAIRS) \
 diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
-index 8522094164e..92b230a462b 100644
+index 74aa3c412..ef6118f37 100644
 --- a/gcc/ada/adaint.c
 +++ b/gcc/ada/adaint.c
-@@ -91,6 +91,11 @@
+@@ -94,6 +94,11 @@
  #include <sys/param.h>
  #include <sys/pstat.h>
  #endif
@@ -84,7 +102,7 @@ index 8522094164e..92b230a462b 100644
  
  #ifdef __PikeOS__
  #define __BSD_VISIBLE 1
-@@ -3438,7 +3443,6 @@ __gnat_lwp_self (void)
+@@ -3465,7 +3470,6 @@ __gnat_lwp_self (void)
  #endif
  
  #if defined (__linux__)
@@ -92,7 +110,7 @@ index 8522094164e..92b230a462b 100644
  
  /* glibc versions earlier than 2.7 do not define the routines to handle
     dynamically allocated CPU sets. For these targets, we use the static
-@@ -3448,7 +3452,7 @@ __gnat_lwp_self (void)
+@@ -3475,7 +3479,7 @@ __gnat_lwp_self (void)
  
  /* Dynamic cpu sets */
  
@@ -101,7 +119,7 @@ index 8522094164e..92b230a462b 100644
  __gnat_cpu_alloc (size_t count)
  {
    return CPU_ALLOC (count);
-@@ -3461,33 +3465,33 @@ __gnat_cpu_alloc_size (size_t count)
+@@ -3488,33 +3492,33 @@ __gnat_cpu_alloc_size (size_t count)
  }
  
  void
@@ -143,7 +161,7 @@ index 8522094164e..92b230a462b 100644
  }
  
  size_t
-@@ -3497,23 +3501,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
+@@ -3524,23 +3528,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
  }
  
  void
@@ -173,7 +191,7 @@ index 8522094164e..92b230a462b 100644
  #endif /* !CPU_ALLOC */
  #endif /* __linux__ */
 diff --git a/gcc/ada/adaint.h b/gcc/ada/adaint.h
-index 987432c9307..4d782f07de9 100644
+index 0cbfd0e15..f97ed905b 100644
 --- a/gcc/ada/adaint.h
 +++ b/gcc/ada/adaint.h
 @@ -319,13 +319,11 @@ extern void   *__gnat_lwp_self			   (void);
@@ -195,10 +213,10 @@ index 987432c9307..4d782f07de9 100644
  
  #if defined (_WIN32)
 diff --git a/gcc/ada/terminals.c b/gcc/ada/terminals.c
-index c0ee4a16bb1..ed796a48c1b 100644
+index 05af82c27..626ac35bc 100644
 --- a/gcc/ada/terminals.c
 +++ b/gcc/ada/terminals.c
-@@ -1127,7 +1127,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1134,7 +1134,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  /* POSIX does not specify how to open the master side of a terminal.Several
     methods are available (system specific):
        1- using a cloning device (USE_CLONE_DEVICE)
@@ -207,7 +225,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
        3- openpty                (USE_OPENPTY)
  
     When using the cloning device method, the macro USE_CLONE_DEVICE should
-@@ -1141,7 +1141,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1148,7 +1148,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  #if defined (__APPLE__) || defined (BSD)
  #define USE_OPENPTY
  #elif defined (__linux__)
@@ -216,7 +234,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (__sun__)
  #define USE_CLONE_DEVICE "/dev/ptmx"
  #elif defined (_AIX)
-@@ -1190,8 +1190,8 @@ allocate_pty_desc (pty_desc **desc) {
+@@ -1197,8 +1197,8 @@ allocate_pty_desc (pty_desc **desc) {
     int  master_fd   = -1;
     char *slave_name = NULL;
  
@@ -227,6 +245,3 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (USE_OPENPTY)
    status = openpty (&master_fd, &slave_fd, NULL, NULL, NULL);
  #elif defined (USE_CLONE_DEVICE)
--- 
-2.41.0
-

cross/gcc-armv7/0036-libphobos-add-riscv64-and-loongarch64-support.patch

@@ -0,0 +1,87 @@
+From: Celeste <cielesti@protonmail.com>
+Date: Mon, 2 Sep 2024 02:54:17 +0000
+Subject: [PATCH] libphobos: add riscv64 and loongarch64 support
+
+Add musl support for these 2 architectures based on fenv.h and signal.h from:
+
+https://git.musl-libc.org/cgit/musl/tree/arch/riscv64/bits?h=v1.2.5
+
+https://git.musl-libc.org/cgit/musl/tree/arch/loongarch64/bits?h=v1.2.5
+---
+ libphobos/libdruntime/core/stdc/fenv.d        | 13 +++++++++++++
+ libphobos/libdruntime/core/sys/posix/signal.d | 10 ++++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/libphobos/libdruntime/core/stdc/fenv.d b/libphobos/libdruntime/core/stdc/fenv.d
+index a7364c0a..5b327e4a 100644
+--- a/libphobos/libdruntime/core/stdc/fenv.d
++++ b/libphobos/libdruntime/core/stdc/fenv.d
+@@ -436,20 +436,33 @@ else version (CRuntime_Musl)
+             ushort __cs_selector;
+             ushort __opcode;
+             uint   __data_offset;
+             ushort __data_selector;
+             ushort __unused5;
+             version (X86_64)
+                 uint __mxcsr;
+         }
+         alias ushort fexcept_t;
+     }
++    else version (RISCV64)
++    {
++        alias uint fenv_t;
++        alias uint fexcept_t;
++    }
++    else version (LoongArch64)
++    {
++        struct fenv_t
++        {
++            uint __cw;
++        }
++        alias uint fexcept_t;
++    }
+     else
+     {
+         static assert(false, "Architecture not supported.");
+     }
+ }
+ else version (CRuntime_Newlib)
+ {
+     version (AArch64)
+     {
+         alias fenv_t = ulong;
+diff --git a/libphobos/libdruntime/core/sys/posix/signal.d b/libphobos/libdruntime/core/sys/posix/signal.d
+index a8b7f751..78d8b3cd 100644
+--- a/libphobos/libdruntime/core/sys/posix/signal.d
++++ b/libphobos/libdruntime/core/sys/posix/signal.d
+@@ -2751,20 +2751,30 @@ else version (CRuntime_Musl)
+     else version (PPC_Any)
+     {
+         enum MINSIGSTKSZ = 4096;
+         enum SIGSTKSZ    = 10240;
+     }
+     else version (X86_Any)
+     {
+         enum MINSIGSTKSZ = 2048;
+         enum SIGSTKSZ    = 8192;
+     }
++    else version (RISCV64)
++    {
++        enum MINSIGSTKSZ = 2048;
++        enum SIGSTKSZ    = 8192;
++    }
++    else version (LoongArch64)
++    {
++        enum MINSIGSTKSZ = 4096;
++        enum SIGSTKSZ    = 16384;
++    }
+     else
+         static assert(0, "unimplemented");
+ 
+     //ucontext_t (defined in core.sys.posix.ucontext)
+     //mcontext_t (defined in core.sys.posix.ucontext)
+ 
+     version (MIPS_Any)
+     {
+         struct stack_t
+         {

cross/gcc-armv7/APKBUILD

@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
 
 pkgname=gcc-armv7
-pkgrel=0
+pkgrel=3
 pkgdesc="Stage2 cross-compiler for armv7"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -64,6 +64,7 @@ _libitm=true
 if [ "$CHOST" != "$CTARGET" ]; then
 	if [ "$BOOTSTRAP" = nolibc ]; then
 		LANG_CXX=false
+		LANG_D=false
 		LANG_ADA=false
 		_libgcc=false
 		_builddir="$srcdir/build-cross-pass2"
@@ -73,7 +74,6 @@ if [ "$CHOST" != "$CTARGET" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 	_libgomp=false
 	_libatomic=false
@@ -115,7 +115,6 @@ elif [ "$CBUILD" != "$CHOST" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 
 	STRIP_FOR_TARGET=${CROSS_COMPILE}strip
@@ -140,11 +139,11 @@ else
 	export BOOT_LDFLAGS="$LDFLAGS"
 fi
 
-case "$CARCH" in
+case "$CTARGET_ARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -171,7 +170,7 @@ esac
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac
 
@@ -184,13 +183,8 @@ if $_libgomp; then
 	subpackages="$subpackages libgomp::$CTARGET_ARCH"
 fi
 
-case "$CARCH" in
-riscv64)
-LANG_ADA=false;;
-esac
-
 case "$CTARGET_ARCH" in
-loongarch64)
+riscv64|loongarch64)
 LANG_ADA=false;;
 esac
 
@@ -199,9 +193,17 @@ if $LANG_CXX; then
 	_languages="$_languages,c++"
 fi
 if $LANG_D; then
-	subpackages="$subpackages libgphobos::$CTARGET_ARCH gcc-gdc$_target:gdc"
+	subpackages="$subpackages gcc-gdc$_target:gdc"
 	_languages="$_languages,d"
-	makedepends_build="$makedepends_build libucontext-dev gcc-gdc-bootstrap"
+	makedepends_build="$makedepends_build libucontext-dev"
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		makedepends_build="$makedepends_build gcc-gdc-bootstrap"
+		subpackages="$subpackages libgphobos::$CTARGET_ARCH"
+	else
+		# shared libgphobos is for D programs to link against, so
+		# skip building that while cross-compiling the GDC compiler
+		makedepends_build="$makedepends_build gcc-gdc gcc-gdc$_cross"
+	fi
 fi
 if $LANG_OBJC; then
 	subpackages="$subpackages libobjc::$CTARGET_ARCH gcc-objc$_target:objc"
@@ -278,6 +280,9 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
 	0035-loongarch-disable-multilib-support.patch
+	0036-libphobos-add-riscv64-and-loongarch64-support.patch
+	fix-arm64.patch
+	ppc64le-quadmath.patch
 	"
 
 # secfixes:
@@ -359,20 +364,23 @@ build() {
 
 	case "$BOOTSTRAP" in
 	nolibc)	_bootstrap_configure="--with-newlib --disable-shared --enable-threads=no" ;;
-	*)	_bootstrap_configure="--enable-shared --enable-threads --enable-tls" ;;
+	*)
+		# cross-bootstrap GDC with a static libphobos: due to GCC's
+		# ./configure not having a --disable-shared=libphobos option,
+		# we have to use --enable-shared with everything else instead.
+		if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+			_bootstrap_configure="--enable-shared=libgcc,libstdc++,libffi,zlib,boehm-gc,ada,libada,libgo,libobjc,libatomic,libgomp,libitm,libgfortran,libquadmath"
+		else
+			_bootstrap_configure="--enable-shared"
+		fi
+		_bootstrap_configure="$_bootstrap_configure --enable-threads --enable-tls"
+		;;
 	esac
 
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"
 
 	msg "Building the following:"
 	echo ""
@@ -426,6 +434,10 @@ build() {
 		--with-pkgversion="$version"
 
 	msg "building gcc"
+	if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+		# cross-compiling libphobos with parallel make fails
+		make all-target-libphobos
+	fi
 	make
 
 	# we build gccjit separate to not build all of gcc with --enable-host-shared
@@ -666,9 +678,9 @@ libgphobos() {
 
 gdc() {
 	pkgdesc="GCC-based D language compiler"
-	depends="gcc=$_gccrel libgphobos=$_gccrel musl-dev"
-	depends="$depends libucontext-dev"
-	provides="gcc-gdc-bootstrap=$_gccrel"
+	depends="gcc$_target=$_gccrel musl-dev libucontext-dev"
+	[ "$CBUILD" = "$CTARGET" ] && depends="$depends libgphobos=$_gccrel"
+	[ "$CHOST" = "$CTARGET" ] && provides="gcc-gdc-bootstrap=$_gccrel"
 
 	mkdir -p "$subpkgdir/$_gcclibexec" \
 		"$subpkgdir"/$_gcclibdir/include/d/ \
@@ -679,13 +691,25 @@ gdc() {
 	# without installing the compiler
 	mv "$pkgdir/$_gcclibexec/d21" "$subpkgdir/$_gcclibexec/"
 	mv "$pkgdir"/$_gcclibdir/include/d/* "$subpkgdir"/$_gcclibdir/include/d/
-	mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
+	fi
+	if [ "$CHOST" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
+	else
+		mkdir -p "$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgdruntime.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.spec \
+			"$subpkgdir"/usr/$CTARGET/lib/
+	fi
 	mv "$pkgdir"/usr/bin/$CTARGET-gdc "$subpkgdir"/usr/bin/
-	mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
 }
 
 libgo() {
@@ -827,7 +851,7 @@ f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8
 abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+684bf2db12aa45e8db7a895ab0f227b4e4351f611b4fcc6e1745d7ad94d31b3554f39d8cf9e2203520b3c6ee35cf309b417d4a842e7a8cd55a2b2accb23f2f24  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,4 +861,7 @@ b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
+06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453  0036-libphobos-add-riscv64-and-loongarch64-support.patch
+00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9  ppc64le-quadmath.patch
 "

cross/gcc-armv7/fix-arm64.patch

@@ -0,0 +1,544 @@
+From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 13 Jun 2024 12:48:21 +0100
+Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
+
+The testcase extracts one arm_neon.h vector from a pair (one subreg)
+and then reinterprets the result as an SVE vector (another subreg).
+Each subreg makes sense individually, but we can't fold them together
+into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
+but the interpretation of 32 bytes -> 16*N bytes depends on
+whether N==1 or N>1.
+
+Since the second subreg makes sense individually, simplify_subreg
+should bail out rather than ICE on it.  simplify_gen_subreg will
+then do the same (because it already checks validate_subreg).
+This leaves simplify_gen_subreg returning null, requiring the
+caller to take appropriate action.
+
+I think this is relatively likely to occur elsewhere, so the patch
+adds a helper for forcing a subreg, allowing a temporary pseudo to
+be created where necessary.
+
+I'll follow up by using force_subreg in more places.  This patch
+is intended to be a minimal backportable fix for the PR.
+
+gcc/
+	PR target/115464
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
+	to fold two subregs together if their relationship isn't known
+	at compile time.
+	* explow.h (force_subreg): Declare.
+	* explow.cc (force_subreg): New function.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
+
+(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
+---
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
+ gcc/explow.cc                                     | 15 +++++++++++++++
+ gcc/explow.h                                      |  2 ++
+ gcc/simplify-rtx.cc                               |  5 +++++
+ .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
+ 5 files changed, 36 insertions(+), 1 deletion(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 0d2edf3f19e..c9182594bc1 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1174,7 +1174,7 @@ public:
+        Advanced SIMD argument as an SVE vector.  */
+     if (!BYTES_BIG_ENDIAN
+ 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
+-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
++      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
+ 
+     rtx_vector_builder builder (VNx16BImode, 16, 2);
+     for (unsigned int i = 0; i < 16; i++)
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index 8e5f6b8e680..f6843398c4b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
+   return temp;
+ }
+ 
++/* Like simplify_gen_subreg, but force OP into a new register if the
++   subreg cannot be formed directly.  */
++
++rtx
++force_subreg (machine_mode outermode, rtx op,
++	      machine_mode innermode, poly_uint64 byte)
++{
++  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
++  if (x)
++    return x;
++
++  op = copy_to_mode_reg (innermode, op);
++  return simplify_gen_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index 16aa02cfb68..cbd1fcb7eb3 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+    Args are mode (in case value is a constant) and the value.  */
+ extern rtx force_reg (machine_mode, rtx);
+ 
++extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+ 
+diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
+index dceaa13333c..729d408aa55 100644
+--- a/gcc/simplify-rtx.cc
++++ b/gcc/simplify-rtx.cc
+@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
+       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
+       rtx newx;
+ 
++      /* Make sure that the relationship between the two subregs is
++	 known at compile time.  */
++      if (!ordered_p (outersize, innermostsize))
++	return NULL_RTX;
++
+       if (outermode == innermostmode
+ 	  && known_eq (byte, 0U)
+ 	  && known_eq (SUBREG_BYTE (op), 0))
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+new file mode 100644
+index 00000000000..d728d1325ed
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+@@ -0,0 +1,13 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl)
++{
++    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
++}
++
++/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
+-- 
+2.46.0
+
+
+From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:30 +0100
+Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
+
+This patch makes the aarch64 code use force_subreg instead of
+simplify_gen_subreg in more places.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+(3) The offset wasn't a simple lowpart or highpart calculation;
+    a later patch will deal with those.
+
+gcc/
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
+	Use force_subreg instead of simplify_gen_subreg.
+	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svget_impl::expand): Likewise.
+	(svget_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-functions.h
+	(multireg_permute::expand): Likewise.
+
+(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
+---
+ gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
+ gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
+ gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
+ 4 files changed, 10 insertions(+), 12 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index 75d21de1401..b2e46a073a8 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+       rtx temp2 = gen_reg_rtx (DImode);
+       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+ 				   subreg_lowpart_offset (d->mode, quadmode));
+-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
++      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+       else
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
+-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
++      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
+ 
+       /* And recalculate the index.  */
+       lane -= nunits / 4;
+diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
+index 33ab0741e87..5b9efe0b165 100644
+--- a/gcc/config/aarch64/aarch64-simd.md
++++ b/gcc/config/aarch64/aarch64-simd.md
+@@ -412,8 +412,8 @@
+   "TARGET_SIMD"
+   {
+      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
+-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
+-					     <MODE>mode, 0);
++     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
++				       <MODE>mode, 0);
+      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
+      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+      DONE;
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index c9182594bc1..2c95da79572 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1121,9 +1121,8 @@ public:
+   expand (function_expander &e) const override
+   {
+     /* Fold the access into a subreg rvalue.  */
+-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
+-				GET_MODE (e.args[0]),
+-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
++    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
++			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
+   }
+ };
+ 
+@@ -1157,8 +1156,7 @@ public:
+ 	e.add_fixed_operand (indices);
+ 	return e.generate_insn (icode);
+       }
+-    return simplify_gen_subreg (e.result_mode (), e.args[0],
+-				GET_MODE (e.args[0]), 0);
++    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
+   }
+ };
+ 
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+index 3b8e575e98e..7d06a57ff83 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
++++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+@@ -639,9 +639,9 @@ public:
+       {
+ 	machine_mode elt_mode = e.vector_mode (0);
+ 	rtx arg = e.args[0];
+-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
+-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
+-					       GET_MODE_SIZE (elt_mode)));
++	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
++	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
++					GET_MODE_SIZE (elt_mode)));
+       }
+     return e.use_exact_insn (icode);
+   }
+-- 
+2.46.0
+
+
+From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
+
+This patch makes more use of force_lowpart_subreg, similarly
+to the recent patch for force_subreg.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+gcc/
+	PR target/115464
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
+	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
+	simplify_gen_subreg and lowpart_subreg.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-sme.cc
+	(add_load_store_slice_operand): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
+	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
+
+(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
+---
+ gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
+ gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
+ gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
+ .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
+ 5 files changed, 23 insertions(+), 17 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index b2e46a073a8..264b9560709 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+   int lane = INTVAL (lane_idx);
+ 
+   if (lane < nunits / 4)
+-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
+-			       subreg_lowpart_offset (d->mode, quadmode));
++    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
+   else
+     {
+       /* Select the upper 64 bits, either a V2SF or V4HF, this however
+@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+ 	 gen_highpart_mode generates code that isn't optimal.  */
+       rtx temp1 = gen_reg_rtx (d->mode);
+       rtx temp2 = gen_reg_rtx (DImode);
+-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+-				   subreg_lowpart_offset (d->mode, quadmode));
++      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
+       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+ 	case AARCH64_WSR64:
+ 	case AARCH64_WSRF64:
+ 	case AARCH64_WSR128:
+-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
++	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
+ 	  break;
+ 	case AARCH64_WSRF:
+ 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
+@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+     case AARCH64_RSR64:
+     case AARCH64_RSRF64:
+     case AARCH64_RSR128:
+-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
++      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
++				   target, sysreg_mode);
+     case AARCH64_RSRF:
+       subreg = gen_lowpart_SUBREG (SImode, target);
+       return gen_lowpart_SUBREG (SFmode, subreg);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 2c95da79572..3c970e9c5f8 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1183,7 +1183,7 @@ public:
+     if (BYTES_BIG_ENDIAN)
+       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
+     insn_code icode = code_for_vcond_mask (mode, mode);
+-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
++    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
+     e.add_output_operand (icode);
+     e.add_input_operand (icode, e.args[1]);
+     e.add_input_operand (icode, e.args[0]);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+index f4c91bcbb95..b66b35ae60b 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
+   rtx base = e.args[argno];
+   if (e.mode_suffix_id == MODE_vnum)
+     {
+-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
++      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
+       base = simplify_gen_binary (PLUS, SImode, base, vnum);
+     }
+   e.add_input_operand (icode, base);
+diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
+index 1beec94629d..a064aeecbc0 100644
+--- a/gcc/config/aarch64/aarch64.cc
++++ b/gcc/config/aarch64/aarch64.cc
+@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
+   /* can_change_mode_class must only return true if subregs and svreinterprets
+      have the same semantics.  */
+   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
+-    return lowpart_subreg (mode, x, GET_MODE (x));
++    return force_lowpart_subreg (mode, x, GET_MODE (x));
+ 
+   rtx res = gen_reg_rtx (mode);
+   x = force_reg (GET_MODE (x), x);
+@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			    rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = gen_lowpart (DImode, op1);
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+   *high_in1 = gen_highpart (DImode, op1);
+   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
+@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			     rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
+-
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+ 
+   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+new file mode 100644
+index 00000000000..f561c34f732
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
++{
++    return svset_neonq_u16 (a, permute_tbl.val[1]);
++}
+-- 
+2.46.0
+
+
+From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 4/4] Add force_lowpart_subreg
+
+optabs had a local function called lowpart_subreg_maybe_copy
+that is very similar to the lowpart version of force_subreg.
+This patch adds a force_lowpart_subreg wrapper around
+force_subreg and uses it in optabs.cc.
+
+The only difference between the old and new functions is that
+the old one asserted success while the new one doesn't.
+It's common not to assert elsewhere when taking subregs;
+normally a null result is enough.
+
+Later patches will make more use of the new function.
+
+gcc/
+	* explow.h (force_lowpart_subreg): Declare.
+	* explow.cc (force_lowpart_subreg): New function.
+	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
+	(expand_absneg_bit): Use force_lowpart_subreg instead of
+	lowpart_subreg_maybe_copy.
+	(expand_copysign_bit): Likewise.
+
+(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
+---
+ gcc/explow.cc | 14 ++++++++++++++
+ gcc/explow.h  |  1 +
+ gcc/optabs.cc | 24 ++----------------------
+ 3 files changed, 17 insertions(+), 22 deletions(-)
+
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index f6843398c4b..5fdfa81f69b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
+   return simplify_gen_subreg (outermode, op, innermode, byte);
+ }
+ 
++/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
++   which has mode INNERMODE.  Allow OP to be forced into a new register
++   if necessary.
++
++   Return null on failure.  */
++
++rtx
++force_lowpart_subreg (machine_mode outermode, rtx op,
++		      machine_mode innermode)
++{
++  auto byte = subreg_lowpart_offset (outermode, innermode);
++  return force_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index cbd1fcb7eb3..dd654649b06 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+ extern rtx force_reg (machine_mode, rtx);
+ 
+ extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
+ 
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+diff --git a/gcc/optabs.cc b/gcc/optabs.cc
+index ce91f94ed43..804c0dc73ba 100644
+--- a/gcc/optabs.cc
++++ b/gcc/optabs.cc
+@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
+   return 0;
+ }
+ 
+-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
+-   conditions, VAL may already be a SUBREG against which we cannot generate
+-   a further SUBREG.  In this case, we expect forcing the value into a
+-   register will work around the situation.  */
+-
+-static rtx
+-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+-			   machine_mode imode)
+-{
+-  rtx ret;
+-  ret = lowpart_subreg (omode, val, imode);
+-  if (ret == NULL)
+-    {
+-      val = force_reg (imode, val);
+-      ret = lowpart_subreg (omode, val, imode);
+-      gcc_assert (ret != NULL);
+-    }
+-  return ret;
+-}
+-
+ /* Expand a floating point absolute value or negation operation via a
+    logical operation on the sign bit.  */
+ 
+@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
+ 			   gen_lowpart (imode, op0),
+ 			   immed_wide_int_const (mask, imode),
+ 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+ 
+       set_dst_reg_note (get_last_insn (), REG_EQUAL,
+ 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
+@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
+ 
+       temp = expand_binop (imode, ior_optab, op0, op1,
+ 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+     }
+ 
+   return target;
+-- 
+2.46.0
+

cross/gcc-armv7/ppc64le-quadmath.patch

@@ -0,0 +1,56 @@
+Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=3fe5720430a9ba61ed7562aac4d758cc77d49a28
+--
+From 3fe5720430a9ba61ed7562aac4d758cc77d49a28 Mon Sep 17 00:00:00 2001
+From: Jakub Jelinek <jakub@redhat.com>
+Date: Sat, 3 Aug 2024 20:37:54 +0200
+Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in
+ some powerpc* configurations [PR116007]
+
+My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation.
+Unfortunately, that seems to fail building in some powerpc* configurations, where
+TFmode isn't available.
+quad.h has:
+ #ifndef TFtype
+ typedef float TFtype __attribute__ ((mode (TF)));
+ #endif
+and uses TFtype.  quad.h has:
+ /* Define the complex type corresponding to __float128
+    ("_Complex __float128" is not allowed) */
+ #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__)
+ typedef _Complex float __attribute__((mode(TC))) __complex128;
+ #else
+ typedef _Complex float __attribute__((mode(KC))) __complex128;
+ #endif
+with the conditional and KCmode use added during porting of libquadmath
+to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__
+isn't defined; I could define it to float __attribute__ ((mode (KF))) but it
+seemed easier to just define it to __float128 which should do the same thing.
+
+2024-08-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/116007
+	* math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__
+	define to __float128 before including soft-fp.h and quad.h.
+
+(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b)
+---
+ libquadmath/math/sqrtq.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c
+index 8ca2828d42ce..a58998a06670 100644
+--- a/libquadmath/math/sqrtq.c
++++ b/libquadmath/math/sqrtq.c
+@@ -9,6 +9,9 @@
+     && defined(FE_TOWARDZERO) \
+     && defined(FE_INEXACT)
+ #define USE_SOFT_FP 1
++#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__)
++#define TFtype __float128
++#endif
+ #include "../../libgcc/soft-fp/soft-fp.h"
+ #include "../../libgcc/soft-fp/quad.h"
+ #endif
+-- 
+2.43.5
+

cross/gcc-riscv64/0026-ada-musl-support-fixes.patch

@@ -4,17 +4,17 @@ Date: Fri, 21 Aug 2020 07:07:48 +0000
 Subject: [PATCH 26/35] ada: musl support fixes
 
 ---
- gcc/ada/Makefile.rtl | 10 +++++-----
+ gcc/ada/Makefile.rtl | 16 ++++++++--------
  gcc/ada/adaint.c     | 34 +++++++++++++++++++---------------
  gcc/ada/adaint.h     | 10 ++++------
  gcc/ada/terminals.c  |  8 ++++----
- 4 files changed, 32 insertions(+), 30 deletions(-)
+ 4 files changed, 35 insertions(+), 33 deletions(-)
 
 diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
-index 96306f8cc9a..090b6770ae5 100644
+index 32cbdb692..463028fbe 100644
 --- a/gcc/ada/Makefile.rtl
 +++ b/gcc/ada/Makefile.rtl
-@@ -1549,7 +1549,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
+@@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
    s-intman.adb<libgnarl/s-intman__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -23,7 +23,16 @@ index 96306f8cc9a..090b6770ae5 100644
    a-exetim.adb<libgnarl/a-exetim__posix.adb \
    a-exetim.ads<libgnarl/a-exetim__default.ads \
    s-linux.ads<libgnarl/s-linux.ads \
-@@ -2174,7 +2174,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2144,7 +2144,7 @@ ifeq ($(strip $(filter-out loongarch% linux%,$(target_cpu) $(target_os))),)
+   g-sercom.adb<libgnat/g-sercom__linux.adb \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+   $(GNATRTL_128BIT_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(ATOMICS_BUILTINS_TARGET_PAIRS) \
+   system.ads<libgnat/system-linux-loongarch.ads
+@@ -2232,7 +2232,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -32,7 +41,7 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-ppc.ads
-@@ -2205,7 +2205,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2267,7 +2267,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
  endif
  
  # ARM linux, GNU eabi
@@ -50,7 +59,7 @@ index 96306f8cc9a..090b6770ae5 100644
    s-mudido.adb<libgnarl/s-mudido__affinity.adb \
    s-osinte.ads<libgnarl/s-osinte__linux.ads \
    s-osinte.adb<libgnarl/s-osinte__posix.adb \
-@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
+@@ -2488,7 +2488,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -59,7 +68,16 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    $(GNATRTL_128BIT_PAIRS) \
-@@ -2524,7 +2524,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+@@ -2592,7 +2592,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
+   s-taspri.ads<libgnarl/s-taspri__posix.ads \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(X86_64_TARGET_PAIRS) \
+   $(SIMD_PATH_TARGET_PAIRS) \
+@@ -2637,7 +2637,7 @@ ifeq ($(strip $(filter-out %x32 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -69,10 +87,10 @@ index 96306f8cc9a..090b6770ae5 100644
    $(X86_64_TARGET_PAIRS) \
    $(SIMD_PATH_TARGET_PAIRS) \
 diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
-index 8522094164e..92b230a462b 100644
+index 74aa3c412..ef6118f37 100644
 --- a/gcc/ada/adaint.c
 +++ b/gcc/ada/adaint.c
-@@ -91,6 +91,11 @@
+@@ -94,6 +94,11 @@
  #include <sys/param.h>
  #include <sys/pstat.h>
  #endif
@@ -84,7 +102,7 @@ index 8522094164e..92b230a462b 100644
  
  #ifdef __PikeOS__
  #define __BSD_VISIBLE 1
-@@ -3438,7 +3443,6 @@ __gnat_lwp_self (void)
+@@ -3465,7 +3470,6 @@ __gnat_lwp_self (void)
  #endif
  
  #if defined (__linux__)
@@ -92,7 +110,7 @@ index 8522094164e..92b230a462b 100644
  
  /* glibc versions earlier than 2.7 do not define the routines to handle
     dynamically allocated CPU sets. For these targets, we use the static
-@@ -3448,7 +3452,7 @@ __gnat_lwp_self (void)
+@@ -3475,7 +3479,7 @@ __gnat_lwp_self (void)
  
  /* Dynamic cpu sets */
  
@@ -101,7 +119,7 @@ index 8522094164e..92b230a462b 100644
  __gnat_cpu_alloc (size_t count)
  {
    return CPU_ALLOC (count);
-@@ -3461,33 +3465,33 @@ __gnat_cpu_alloc_size (size_t count)
+@@ -3488,33 +3492,33 @@ __gnat_cpu_alloc_size (size_t count)
  }
  
  void
@@ -143,7 +161,7 @@ index 8522094164e..92b230a462b 100644
  }
  
  size_t
-@@ -3497,23 +3501,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
+@@ -3524,23 +3528,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
  }
  
  void
@@ -173,7 +191,7 @@ index 8522094164e..92b230a462b 100644
  #endif /* !CPU_ALLOC */
  #endif /* __linux__ */
 diff --git a/gcc/ada/adaint.h b/gcc/ada/adaint.h
-index 987432c9307..4d782f07de9 100644
+index 0cbfd0e15..f97ed905b 100644
 --- a/gcc/ada/adaint.h
 +++ b/gcc/ada/adaint.h
 @@ -319,13 +319,11 @@ extern void   *__gnat_lwp_self			   (void);
@@ -195,10 +213,10 @@ index 987432c9307..4d782f07de9 100644
  
  #if defined (_WIN32)
 diff --git a/gcc/ada/terminals.c b/gcc/ada/terminals.c
-index c0ee4a16bb1..ed796a48c1b 100644
+index 05af82c27..626ac35bc 100644
 --- a/gcc/ada/terminals.c
 +++ b/gcc/ada/terminals.c
-@@ -1127,7 +1127,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1134,7 +1134,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  /* POSIX does not specify how to open the master side of a terminal.Several
     methods are available (system specific):
        1- using a cloning device (USE_CLONE_DEVICE)
@@ -207,7 +225,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
        3- openpty                (USE_OPENPTY)
  
     When using the cloning device method, the macro USE_CLONE_DEVICE should
-@@ -1141,7 +1141,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1148,7 +1148,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  #if defined (__APPLE__) || defined (BSD)
  #define USE_OPENPTY
  #elif defined (__linux__)
@@ -216,7 +234,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (__sun__)
  #define USE_CLONE_DEVICE "/dev/ptmx"
  #elif defined (_AIX)
-@@ -1190,8 +1190,8 @@ allocate_pty_desc (pty_desc **desc) {
+@@ -1197,8 +1197,8 @@ allocate_pty_desc (pty_desc **desc) {
     int  master_fd   = -1;
     char *slave_name = NULL;
  
@@ -227,6 +245,3 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (USE_OPENPTY)
    status = openpty (&master_fd, &slave_fd, NULL, NULL, NULL);
  #elif defined (USE_CLONE_DEVICE)
--- 
-2.41.0
-

cross/gcc-riscv64/0036-libphobos-add-riscv64-and-loongarch64-support.patch

@@ -0,0 +1,87 @@
+From: Celeste <cielesti@protonmail.com>
+Date: Mon, 2 Sep 2024 02:54:17 +0000
+Subject: [PATCH] libphobos: add riscv64 and loongarch64 support
+
+Add musl support for these 2 architectures based on fenv.h and signal.h from:
+
+https://git.musl-libc.org/cgit/musl/tree/arch/riscv64/bits?h=v1.2.5
+
+https://git.musl-libc.org/cgit/musl/tree/arch/loongarch64/bits?h=v1.2.5
+---
+ libphobos/libdruntime/core/stdc/fenv.d        | 13 +++++++++++++
+ libphobos/libdruntime/core/sys/posix/signal.d | 10 ++++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/libphobos/libdruntime/core/stdc/fenv.d b/libphobos/libdruntime/core/stdc/fenv.d
+index a7364c0a..5b327e4a 100644
+--- a/libphobos/libdruntime/core/stdc/fenv.d
++++ b/libphobos/libdruntime/core/stdc/fenv.d
+@@ -436,20 +436,33 @@ else version (CRuntime_Musl)
+             ushort __cs_selector;
+             ushort __opcode;
+             uint   __data_offset;
+             ushort __data_selector;
+             ushort __unused5;
+             version (X86_64)
+                 uint __mxcsr;
+         }
+         alias ushort fexcept_t;
+     }
++    else version (RISCV64)
++    {
++        alias uint fenv_t;
++        alias uint fexcept_t;
++    }
++    else version (LoongArch64)
++    {
++        struct fenv_t
++        {
++            uint __cw;
++        }
++        alias uint fexcept_t;
++    }
+     else
+     {
+         static assert(false, "Architecture not supported.");
+     }
+ }
+ else version (CRuntime_Newlib)
+ {
+     version (AArch64)
+     {
+         alias fenv_t = ulong;
+diff --git a/libphobos/libdruntime/core/sys/posix/signal.d b/libphobos/libdruntime/core/sys/posix/signal.d
+index a8b7f751..78d8b3cd 100644
+--- a/libphobos/libdruntime/core/sys/posix/signal.d
++++ b/libphobos/libdruntime/core/sys/posix/signal.d
+@@ -2751,20 +2751,30 @@ else version (CRuntime_Musl)
+     else version (PPC_Any)
+     {
+         enum MINSIGSTKSZ = 4096;
+         enum SIGSTKSZ    = 10240;
+     }
+     else version (X86_Any)
+     {
+         enum MINSIGSTKSZ = 2048;
+         enum SIGSTKSZ    = 8192;
+     }
++    else version (RISCV64)
++    {
++        enum MINSIGSTKSZ = 2048;
++        enum SIGSTKSZ    = 8192;
++    }
++    else version (LoongArch64)
++    {
++        enum MINSIGSTKSZ = 4096;
++        enum SIGSTKSZ    = 16384;
++    }
+     else
+         static assert(0, "unimplemented");
+ 
+     //ucontext_t (defined in core.sys.posix.ucontext)
+     //mcontext_t (defined in core.sys.posix.ucontext)
+ 
+     version (MIPS_Any)
+     {
+         struct stack_t
+         {

cross/gcc-riscv64/APKBUILD

@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
 
 pkgname=gcc-riscv64
-pkgrel=0
+pkgrel=3
 pkgdesc="Stage2 cross-compiler for riscv64"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -64,6 +64,7 @@ _libitm=true
 if [ "$CHOST" != "$CTARGET" ]; then
 	if [ "$BOOTSTRAP" = nolibc ]; then
 		LANG_CXX=false
+		LANG_D=false
 		LANG_ADA=false
 		_libgcc=false
 		_builddir="$srcdir/build-cross-pass2"
@@ -73,7 +74,6 @@ if [ "$CHOST" != "$CTARGET" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 	_libgomp=false
 	_libatomic=false
@@ -115,7 +115,6 @@ elif [ "$CBUILD" != "$CHOST" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 
 	STRIP_FOR_TARGET=${CROSS_COMPILE}strip
@@ -140,11 +139,11 @@ else
 	export BOOT_LDFLAGS="$LDFLAGS"
 fi
 
-case "$CARCH" in
+case "$CTARGET_ARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -171,7 +170,7 @@ esac
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac
 
@@ -184,13 +183,8 @@ if $_libgomp; then
 	subpackages="$subpackages libgomp::$CTARGET_ARCH"
 fi
 
-case "$CARCH" in
-riscv64)
-LANG_ADA=false;;
-esac
-
 case "$CTARGET_ARCH" in
-loongarch64)
+riscv64|loongarch64)
 LANG_ADA=false;;
 esac
 
@@ -199,9 +193,17 @@ if $LANG_CXX; then
 	_languages="$_languages,c++"
 fi
 if $LANG_D; then
-	subpackages="$subpackages libgphobos::$CTARGET_ARCH gcc-gdc$_target:gdc"
+	subpackages="$subpackages gcc-gdc$_target:gdc"
 	_languages="$_languages,d"
-	makedepends_build="$makedepends_build libucontext-dev gcc-gdc-bootstrap"
+	makedepends_build="$makedepends_build libucontext-dev"
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		makedepends_build="$makedepends_build gcc-gdc-bootstrap"
+		subpackages="$subpackages libgphobos::$CTARGET_ARCH"
+	else
+		# shared libgphobos is for D programs to link against, so
+		# skip building that while cross-compiling the GDC compiler
+		makedepends_build="$makedepends_build gcc-gdc gcc-gdc$_cross"
+	fi
 fi
 if $LANG_OBJC; then
 	subpackages="$subpackages libobjc::$CTARGET_ARCH gcc-objc$_target:objc"
@@ -278,6 +280,9 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
 	0035-loongarch-disable-multilib-support.patch
+	0036-libphobos-add-riscv64-and-loongarch64-support.patch
+	fix-arm64.patch
+	ppc64le-quadmath.patch
 	"
 
 # secfixes:
@@ -359,20 +364,23 @@ build() {
 
 	case "$BOOTSTRAP" in
 	nolibc)	_bootstrap_configure="--with-newlib --disable-shared --enable-threads=no" ;;
-	*)	_bootstrap_configure="--enable-shared --enable-threads --enable-tls" ;;
+	*)
+		# cross-bootstrap GDC with a static libphobos: due to GCC's
+		# ./configure not having a --disable-shared=libphobos option,
+		# we have to use --enable-shared with everything else instead.
+		if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+			_bootstrap_configure="--enable-shared=libgcc,libstdc++,libffi,zlib,boehm-gc,ada,libada,libgo,libobjc,libatomic,libgomp,libitm,libgfortran,libquadmath"
+		else
+			_bootstrap_configure="--enable-shared"
+		fi
+		_bootstrap_configure="$_bootstrap_configure --enable-threads --enable-tls"
+		;;
 	esac
 
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"
 
 	msg "Building the following:"
 	echo ""
@@ -426,6 +434,10 @@ build() {
 		--with-pkgversion="$version"
 
 	msg "building gcc"
+	if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+		# cross-compiling libphobos with parallel make fails
+		make all-target-libphobos
+	fi
 	make
 
 	# we build gccjit separate to not build all of gcc with --enable-host-shared
@@ -666,9 +678,9 @@ libgphobos() {
 
 gdc() {
 	pkgdesc="GCC-based D language compiler"
-	depends="gcc=$_gccrel libgphobos=$_gccrel musl-dev"
-	depends="$depends libucontext-dev"
-	provides="gcc-gdc-bootstrap=$_gccrel"
+	depends="gcc$_target=$_gccrel musl-dev libucontext-dev"
+	[ "$CBUILD" = "$CTARGET" ] && depends="$depends libgphobos=$_gccrel"
+	[ "$CHOST" = "$CTARGET" ] && provides="gcc-gdc-bootstrap=$_gccrel"
 
 	mkdir -p "$subpkgdir/$_gcclibexec" \
 		"$subpkgdir"/$_gcclibdir/include/d/ \
@@ -679,13 +691,25 @@ gdc() {
 	# without installing the compiler
 	mv "$pkgdir/$_gcclibexec/d21" "$subpkgdir/$_gcclibexec/"
 	mv "$pkgdir"/$_gcclibdir/include/d/* "$subpkgdir"/$_gcclibdir/include/d/
-	mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
+	fi
+	if [ "$CHOST" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
+	else
+		mkdir -p "$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgdruntime.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.spec \
+			"$subpkgdir"/usr/$CTARGET/lib/
+	fi
 	mv "$pkgdir"/usr/bin/$CTARGET-gdc "$subpkgdir"/usr/bin/
-	mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
 }
 
 libgo() {
@@ -827,7 +851,7 @@ f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8
 abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+684bf2db12aa45e8db7a895ab0f227b4e4351f611b4fcc6e1745d7ad94d31b3554f39d8cf9e2203520b3c6ee35cf309b417d4a842e7a8cd55a2b2accb23f2f24  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,4 +861,7 @@ b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
+06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453  0036-libphobos-add-riscv64-and-loongarch64-support.patch
+00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9  ppc64le-quadmath.patch
 "

cross/gcc-riscv64/fix-arm64.patch

@@ -0,0 +1,544 @@
+From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 13 Jun 2024 12:48:21 +0100
+Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
+
+The testcase extracts one arm_neon.h vector from a pair (one subreg)
+and then reinterprets the result as an SVE vector (another subreg).
+Each subreg makes sense individually, but we can't fold them together
+into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
+but the interpretation of 32 bytes -> 16*N bytes depends on
+whether N==1 or N>1.
+
+Since the second subreg makes sense individually, simplify_subreg
+should bail out rather than ICE on it.  simplify_gen_subreg will
+then do the same (because it already checks validate_subreg).
+This leaves simplify_gen_subreg returning null, requiring the
+caller to take appropriate action.
+
+I think this is relatively likely to occur elsewhere, so the patch
+adds a helper for forcing a subreg, allowing a temporary pseudo to
+be created where necessary.
+
+I'll follow up by using force_subreg in more places.  This patch
+is intended to be a minimal backportable fix for the PR.
+
+gcc/
+	PR target/115464
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
+	to fold two subregs together if their relationship isn't known
+	at compile time.
+	* explow.h (force_subreg): Declare.
+	* explow.cc (force_subreg): New function.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
+
+(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
+---
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
+ gcc/explow.cc                                     | 15 +++++++++++++++
+ gcc/explow.h                                      |  2 ++
+ gcc/simplify-rtx.cc                               |  5 +++++
+ .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
+ 5 files changed, 36 insertions(+), 1 deletion(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 0d2edf3f19e..c9182594bc1 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1174,7 +1174,7 @@ public:
+        Advanced SIMD argument as an SVE vector.  */
+     if (!BYTES_BIG_ENDIAN
+ 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
+-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
++      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
+ 
+     rtx_vector_builder builder (VNx16BImode, 16, 2);
+     for (unsigned int i = 0; i < 16; i++)
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index 8e5f6b8e680..f6843398c4b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
+   return temp;
+ }
+ 
++/* Like simplify_gen_subreg, but force OP into a new register if the
++   subreg cannot be formed directly.  */
++
++rtx
++force_subreg (machine_mode outermode, rtx op,
++	      machine_mode innermode, poly_uint64 byte)
++{
++  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
++  if (x)
++    return x;
++
++  op = copy_to_mode_reg (innermode, op);
++  return simplify_gen_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index 16aa02cfb68..cbd1fcb7eb3 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+    Args are mode (in case value is a constant) and the value.  */
+ extern rtx force_reg (machine_mode, rtx);
+ 
++extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+ 
+diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
+index dceaa13333c..729d408aa55 100644
+--- a/gcc/simplify-rtx.cc
++++ b/gcc/simplify-rtx.cc
+@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
+       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
+       rtx newx;
+ 
++      /* Make sure that the relationship between the two subregs is
++	 known at compile time.  */
++      if (!ordered_p (outersize, innermostsize))
++	return NULL_RTX;
++
+       if (outermode == innermostmode
+ 	  && known_eq (byte, 0U)
+ 	  && known_eq (SUBREG_BYTE (op), 0))
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+new file mode 100644
+index 00000000000..d728d1325ed
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+@@ -0,0 +1,13 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl)
++{
++    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
++}
++
++/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
+-- 
+2.46.0
+
+
+From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:30 +0100
+Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
+
+This patch makes the aarch64 code use force_subreg instead of
+simplify_gen_subreg in more places.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+(3) The offset wasn't a simple lowpart or highpart calculation;
+    a later patch will deal with those.
+
+gcc/
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
+	Use force_subreg instead of simplify_gen_subreg.
+	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svget_impl::expand): Likewise.
+	(svget_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-functions.h
+	(multireg_permute::expand): Likewise.
+
+(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
+---
+ gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
+ gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
+ gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
+ 4 files changed, 10 insertions(+), 12 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index 75d21de1401..b2e46a073a8 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+       rtx temp2 = gen_reg_rtx (DImode);
+       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+ 				   subreg_lowpart_offset (d->mode, quadmode));
+-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
++      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+       else
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
+-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
++      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
+ 
+       /* And recalculate the index.  */
+       lane -= nunits / 4;
+diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
+index 33ab0741e87..5b9efe0b165 100644
+--- a/gcc/config/aarch64/aarch64-simd.md
++++ b/gcc/config/aarch64/aarch64-simd.md
+@@ -412,8 +412,8 @@
+   "TARGET_SIMD"
+   {
+      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
+-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
+-					     <MODE>mode, 0);
++     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
++				       <MODE>mode, 0);
+      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
+      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+      DONE;
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index c9182594bc1..2c95da79572 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1121,9 +1121,8 @@ public:
+   expand (function_expander &e) const override
+   {
+     /* Fold the access into a subreg rvalue.  */
+-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
+-				GET_MODE (e.args[0]),
+-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
++    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
++			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
+   }
+ };
+ 
+@@ -1157,8 +1156,7 @@ public:
+ 	e.add_fixed_operand (indices);
+ 	return e.generate_insn (icode);
+       }
+-    return simplify_gen_subreg (e.result_mode (), e.args[0],
+-				GET_MODE (e.args[0]), 0);
++    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
+   }
+ };
+ 
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+index 3b8e575e98e..7d06a57ff83 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
++++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+@@ -639,9 +639,9 @@ public:
+       {
+ 	machine_mode elt_mode = e.vector_mode (0);
+ 	rtx arg = e.args[0];
+-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
+-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
+-					       GET_MODE_SIZE (elt_mode)));
++	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
++	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
++					GET_MODE_SIZE (elt_mode)));
+       }
+     return e.use_exact_insn (icode);
+   }
+-- 
+2.46.0
+
+
+From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
+
+This patch makes more use of force_lowpart_subreg, similarly
+to the recent patch for force_subreg.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+gcc/
+	PR target/115464
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
+	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
+	simplify_gen_subreg and lowpart_subreg.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-sme.cc
+	(add_load_store_slice_operand): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
+	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
+
+(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
+---
+ gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
+ gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
+ gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
+ .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
+ 5 files changed, 23 insertions(+), 17 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index b2e46a073a8..264b9560709 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+   int lane = INTVAL (lane_idx);
+ 
+   if (lane < nunits / 4)
+-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
+-			       subreg_lowpart_offset (d->mode, quadmode));
++    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
+   else
+     {
+       /* Select the upper 64 bits, either a V2SF or V4HF, this however
+@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+ 	 gen_highpart_mode generates code that isn't optimal.  */
+       rtx temp1 = gen_reg_rtx (d->mode);
+       rtx temp2 = gen_reg_rtx (DImode);
+-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+-				   subreg_lowpart_offset (d->mode, quadmode));
++      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
+       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+ 	case AARCH64_WSR64:
+ 	case AARCH64_WSRF64:
+ 	case AARCH64_WSR128:
+-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
++	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
+ 	  break;
+ 	case AARCH64_WSRF:
+ 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
+@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+     case AARCH64_RSR64:
+     case AARCH64_RSRF64:
+     case AARCH64_RSR128:
+-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
++      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
++				   target, sysreg_mode);
+     case AARCH64_RSRF:
+       subreg = gen_lowpart_SUBREG (SImode, target);
+       return gen_lowpart_SUBREG (SFmode, subreg);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 2c95da79572..3c970e9c5f8 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1183,7 +1183,7 @@ public:
+     if (BYTES_BIG_ENDIAN)
+       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
+     insn_code icode = code_for_vcond_mask (mode, mode);
+-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
++    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
+     e.add_output_operand (icode);
+     e.add_input_operand (icode, e.args[1]);
+     e.add_input_operand (icode, e.args[0]);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+index f4c91bcbb95..b66b35ae60b 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
+   rtx base = e.args[argno];
+   if (e.mode_suffix_id == MODE_vnum)
+     {
+-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
++      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
+       base = simplify_gen_binary (PLUS, SImode, base, vnum);
+     }
+   e.add_input_operand (icode, base);
+diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
+index 1beec94629d..a064aeecbc0 100644
+--- a/gcc/config/aarch64/aarch64.cc
++++ b/gcc/config/aarch64/aarch64.cc
+@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
+   /* can_change_mode_class must only return true if subregs and svreinterprets
+      have the same semantics.  */
+   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
+-    return lowpart_subreg (mode, x, GET_MODE (x));
++    return force_lowpart_subreg (mode, x, GET_MODE (x));
+ 
+   rtx res = gen_reg_rtx (mode);
+   x = force_reg (GET_MODE (x), x);
+@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			    rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = gen_lowpart (DImode, op1);
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+   *high_in1 = gen_highpart (DImode, op1);
+   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
+@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			     rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
+-
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+ 
+   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+new file mode 100644
+index 00000000000..f561c34f732
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
++{
++    return svset_neonq_u16 (a, permute_tbl.val[1]);
++}
+-- 
+2.46.0
+
+
+From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 4/4] Add force_lowpart_subreg
+
+optabs had a local function called lowpart_subreg_maybe_copy
+that is very similar to the lowpart version of force_subreg.
+This patch adds a force_lowpart_subreg wrapper around
+force_subreg and uses it in optabs.cc.
+
+The only difference between the old and new functions is that
+the old one asserted success while the new one doesn't.
+It's common not to assert elsewhere when taking subregs;
+normally a null result is enough.
+
+Later patches will make more use of the new function.
+
+gcc/
+	* explow.h (force_lowpart_subreg): Declare.
+	* explow.cc (force_lowpart_subreg): New function.
+	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
+	(expand_absneg_bit): Use force_lowpart_subreg instead of
+	lowpart_subreg_maybe_copy.
+	(expand_copysign_bit): Likewise.
+
+(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
+---
+ gcc/explow.cc | 14 ++++++++++++++
+ gcc/explow.h  |  1 +
+ gcc/optabs.cc | 24 ++----------------------
+ 3 files changed, 17 insertions(+), 22 deletions(-)
+
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index f6843398c4b..5fdfa81f69b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
+   return simplify_gen_subreg (outermode, op, innermode, byte);
+ }
+ 
++/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
++   which has mode INNERMODE.  Allow OP to be forced into a new register
++   if necessary.
++
++   Return null on failure.  */
++
++rtx
++force_lowpart_subreg (machine_mode outermode, rtx op,
++		      machine_mode innermode)
++{
++  auto byte = subreg_lowpart_offset (outermode, innermode);
++  return force_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index cbd1fcb7eb3..dd654649b06 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+ extern rtx force_reg (machine_mode, rtx);
+ 
+ extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
+ 
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+diff --git a/gcc/optabs.cc b/gcc/optabs.cc
+index ce91f94ed43..804c0dc73ba 100644
+--- a/gcc/optabs.cc
++++ b/gcc/optabs.cc
+@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
+   return 0;
+ }
+ 
+-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
+-   conditions, VAL may already be a SUBREG against which we cannot generate
+-   a further SUBREG.  In this case, we expect forcing the value into a
+-   register will work around the situation.  */
+-
+-static rtx
+-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+-			   machine_mode imode)
+-{
+-  rtx ret;
+-  ret = lowpart_subreg (omode, val, imode);
+-  if (ret == NULL)
+-    {
+-      val = force_reg (imode, val);
+-      ret = lowpart_subreg (omode, val, imode);
+-      gcc_assert (ret != NULL);
+-    }
+-  return ret;
+-}
+-
+ /* Expand a floating point absolute value or negation operation via a
+    logical operation on the sign bit.  */
+ 
+@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
+ 			   gen_lowpart (imode, op0),
+ 			   immed_wide_int_const (mask, imode),
+ 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+ 
+       set_dst_reg_note (get_last_insn (), REG_EQUAL,
+ 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
+@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
+ 
+       temp = expand_binop (imode, ior_optab, op0, op1,
+ 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+     }
+ 
+   return target;
+-- 
+2.46.0
+

cross/gcc-riscv64/ppc64le-quadmath.patch

@@ -0,0 +1,56 @@
+Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=3fe5720430a9ba61ed7562aac4d758cc77d49a28
+--
+From 3fe5720430a9ba61ed7562aac4d758cc77d49a28 Mon Sep 17 00:00:00 2001
+From: Jakub Jelinek <jakub@redhat.com>
+Date: Sat, 3 Aug 2024 20:37:54 +0200
+Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in
+ some powerpc* configurations [PR116007]
+
+My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation.
+Unfortunately, that seems to fail building in some powerpc* configurations, where
+TFmode isn't available.
+quad.h has:
+ #ifndef TFtype
+ typedef float TFtype __attribute__ ((mode (TF)));
+ #endif
+and uses TFtype.  quad.h has:
+ /* Define the complex type corresponding to __float128
+    ("_Complex __float128" is not allowed) */
+ #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__)
+ typedef _Complex float __attribute__((mode(TC))) __complex128;
+ #else
+ typedef _Complex float __attribute__((mode(KC))) __complex128;
+ #endif
+with the conditional and KCmode use added during porting of libquadmath
+to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__
+isn't defined; I could define it to float __attribute__ ((mode (KF))) but it
+seemed easier to just define it to __float128 which should do the same thing.
+
+2024-08-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/116007
+	* math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__
+	define to __float128 before including soft-fp.h and quad.h.
+
+(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b)
+---
+ libquadmath/math/sqrtq.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c
+index 8ca2828d42ce..a58998a06670 100644
+--- a/libquadmath/math/sqrtq.c
++++ b/libquadmath/math/sqrtq.c
+@@ -9,6 +9,9 @@
+     && defined(FE_TOWARDZERO) \
+     && defined(FE_INEXACT)
+ #define USE_SOFT_FP 1
++#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__)
++#define TFtype __float128
++#endif
+ #include "../../libgcc/soft-fp/soft-fp.h"
+ #include "../../libgcc/soft-fp/quad.h"
+ #endif
+-- 
+2.43.5
+

cross/gcc-x86/0026-ada-musl-support-fixes.patch

@@ -4,17 +4,17 @@ Date: Fri, 21 Aug 2020 07:07:48 +0000
 Subject: [PATCH 26/35] ada: musl support fixes
 
 ---
- gcc/ada/Makefile.rtl | 10 +++++-----
+ gcc/ada/Makefile.rtl | 16 ++++++++--------
  gcc/ada/adaint.c     | 34 +++++++++++++++++++---------------
  gcc/ada/adaint.h     | 10 ++++------
  gcc/ada/terminals.c  |  8 ++++----
- 4 files changed, 32 insertions(+), 30 deletions(-)
+ 4 files changed, 35 insertions(+), 33 deletions(-)
 
 diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
-index 96306f8cc9a..090b6770ae5 100644
+index 32cbdb692..463028fbe 100644
 --- a/gcc/ada/Makefile.rtl
 +++ b/gcc/ada/Makefile.rtl
-@@ -1549,7 +1549,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
+@@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
    s-intman.adb<libgnarl/s-intman__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -23,7 +23,16 @@ index 96306f8cc9a..090b6770ae5 100644
    a-exetim.adb<libgnarl/a-exetim__posix.adb \
    a-exetim.ads<libgnarl/a-exetim__default.ads \
    s-linux.ads<libgnarl/s-linux.ads \
-@@ -2174,7 +2174,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2144,7 +2144,7 @@ ifeq ($(strip $(filter-out loongarch% linux%,$(target_cpu) $(target_os))),)
+   g-sercom.adb<libgnat/g-sercom__linux.adb \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+   $(GNATRTL_128BIT_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(ATOMICS_BUILTINS_TARGET_PAIRS) \
+   system.ads<libgnat/system-linux-loongarch.ads
+@@ -2232,7 +2232,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -32,7 +41,7 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-ppc.ads
-@@ -2205,7 +2205,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2267,7 +2267,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
  endif
  
  # ARM linux, GNU eabi
@@ -50,7 +59,7 @@ index 96306f8cc9a..090b6770ae5 100644
    s-mudido.adb<libgnarl/s-mudido__affinity.adb \
    s-osinte.ads<libgnarl/s-osinte__linux.ads \
    s-osinte.adb<libgnarl/s-osinte__posix.adb \
-@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
+@@ -2488,7 +2488,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -59,7 +68,16 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    $(GNATRTL_128BIT_PAIRS) \
-@@ -2524,7 +2524,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+@@ -2592,7 +2592,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
+   s-taspri.ads<libgnarl/s-taspri__posix.ads \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(X86_64_TARGET_PAIRS) \
+   $(SIMD_PATH_TARGET_PAIRS) \
+@@ -2637,7 +2637,7 @@ ifeq ($(strip $(filter-out %x32 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -69,10 +87,10 @@ index 96306f8cc9a..090b6770ae5 100644
    $(X86_64_TARGET_PAIRS) \
    $(SIMD_PATH_TARGET_PAIRS) \
 diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
-index 8522094164e..92b230a462b 100644
+index 74aa3c412..ef6118f37 100644
 --- a/gcc/ada/adaint.c
 +++ b/gcc/ada/adaint.c
-@@ -91,6 +91,11 @@
+@@ -94,6 +94,11 @@
  #include <sys/param.h>
  #include <sys/pstat.h>
  #endif
@@ -84,7 +102,7 @@ index 8522094164e..92b230a462b 100644
  
  #ifdef __PikeOS__
  #define __BSD_VISIBLE 1
-@@ -3438,7 +3443,6 @@ __gnat_lwp_self (void)
+@@ -3465,7 +3470,6 @@ __gnat_lwp_self (void)
  #endif
  
  #if defined (__linux__)
@@ -92,7 +110,7 @@ index 8522094164e..92b230a462b 100644
  
  /* glibc versions earlier than 2.7 do not define the routines to handle
     dynamically allocated CPU sets. For these targets, we use the static
-@@ -3448,7 +3452,7 @@ __gnat_lwp_self (void)
+@@ -3475,7 +3479,7 @@ __gnat_lwp_self (void)
  
  /* Dynamic cpu sets */
  
@@ -101,7 +119,7 @@ index 8522094164e..92b230a462b 100644
  __gnat_cpu_alloc (size_t count)
  {
    return CPU_ALLOC (count);
-@@ -3461,33 +3465,33 @@ __gnat_cpu_alloc_size (size_t count)
+@@ -3488,33 +3492,33 @@ __gnat_cpu_alloc_size (size_t count)
  }
  
  void
@@ -143,7 +161,7 @@ index 8522094164e..92b230a462b 100644
  }
  
  size_t
-@@ -3497,23 +3501,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
+@@ -3524,23 +3528,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
  }
  
  void
@@ -173,7 +191,7 @@ index 8522094164e..92b230a462b 100644
  #endif /* !CPU_ALLOC */
  #endif /* __linux__ */
 diff --git a/gcc/ada/adaint.h b/gcc/ada/adaint.h
-index 987432c9307..4d782f07de9 100644
+index 0cbfd0e15..f97ed905b 100644
 --- a/gcc/ada/adaint.h
 +++ b/gcc/ada/adaint.h
 @@ -319,13 +319,11 @@ extern void   *__gnat_lwp_self			   (void);
@@ -195,10 +213,10 @@ index 987432c9307..4d782f07de9 100644
  
  #if defined (_WIN32)
 diff --git a/gcc/ada/terminals.c b/gcc/ada/terminals.c
-index c0ee4a16bb1..ed796a48c1b 100644
+index 05af82c27..626ac35bc 100644
 --- a/gcc/ada/terminals.c
 +++ b/gcc/ada/terminals.c
-@@ -1127,7 +1127,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1134,7 +1134,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  /* POSIX does not specify how to open the master side of a terminal.Several
     methods are available (system specific):
        1- using a cloning device (USE_CLONE_DEVICE)
@@ -207,7 +225,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
        3- openpty                (USE_OPENPTY)
  
     When using the cloning device method, the macro USE_CLONE_DEVICE should
-@@ -1141,7 +1141,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1148,7 +1148,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  #if defined (__APPLE__) || defined (BSD)
  #define USE_OPENPTY
  #elif defined (__linux__)
@@ -216,7 +234,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (__sun__)
  #define USE_CLONE_DEVICE "/dev/ptmx"
  #elif defined (_AIX)
-@@ -1190,8 +1190,8 @@ allocate_pty_desc (pty_desc **desc) {
+@@ -1197,8 +1197,8 @@ allocate_pty_desc (pty_desc **desc) {
     int  master_fd   = -1;
     char *slave_name = NULL;
  
@@ -227,6 +245,3 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (USE_OPENPTY)
    status = openpty (&master_fd, &slave_fd, NULL, NULL, NULL);
  #elif defined (USE_CLONE_DEVICE)
--- 
-2.41.0
-

cross/gcc-x86/0036-libphobos-add-riscv64-and-loongarch64-support.patch

@@ -0,0 +1,87 @@
+From: Celeste <cielesti@protonmail.com>
+Date: Mon, 2 Sep 2024 02:54:17 +0000
+Subject: [PATCH] libphobos: add riscv64 and loongarch64 support
+
+Add musl support for these 2 architectures based on fenv.h and signal.h from:
+
+https://git.musl-libc.org/cgit/musl/tree/arch/riscv64/bits?h=v1.2.5
+
+https://git.musl-libc.org/cgit/musl/tree/arch/loongarch64/bits?h=v1.2.5
+---
+ libphobos/libdruntime/core/stdc/fenv.d        | 13 +++++++++++++
+ libphobos/libdruntime/core/sys/posix/signal.d | 10 ++++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/libphobos/libdruntime/core/stdc/fenv.d b/libphobos/libdruntime/core/stdc/fenv.d
+index a7364c0a..5b327e4a 100644
+--- a/libphobos/libdruntime/core/stdc/fenv.d
++++ b/libphobos/libdruntime/core/stdc/fenv.d
+@@ -436,20 +436,33 @@ else version (CRuntime_Musl)
+             ushort __cs_selector;
+             ushort __opcode;
+             uint   __data_offset;
+             ushort __data_selector;
+             ushort __unused5;
+             version (X86_64)
+                 uint __mxcsr;
+         }
+         alias ushort fexcept_t;
+     }
++    else version (RISCV64)
++    {
++        alias uint fenv_t;
++        alias uint fexcept_t;
++    }
++    else version (LoongArch64)
++    {
++        struct fenv_t
++        {
++            uint __cw;
++        }
++        alias uint fexcept_t;
++    }
+     else
+     {
+         static assert(false, "Architecture not supported.");
+     }
+ }
+ else version (CRuntime_Newlib)
+ {
+     version (AArch64)
+     {
+         alias fenv_t = ulong;
+diff --git a/libphobos/libdruntime/core/sys/posix/signal.d b/libphobos/libdruntime/core/sys/posix/signal.d
+index a8b7f751..78d8b3cd 100644
+--- a/libphobos/libdruntime/core/sys/posix/signal.d
++++ b/libphobos/libdruntime/core/sys/posix/signal.d
+@@ -2751,20 +2751,30 @@ else version (CRuntime_Musl)
+     else version (PPC_Any)
+     {
+         enum MINSIGSTKSZ = 4096;
+         enum SIGSTKSZ    = 10240;
+     }
+     else version (X86_Any)
+     {
+         enum MINSIGSTKSZ = 2048;
+         enum SIGSTKSZ    = 8192;
+     }
++    else version (RISCV64)
++    {
++        enum MINSIGSTKSZ = 2048;
++        enum SIGSTKSZ    = 8192;
++    }
++    else version (LoongArch64)
++    {
++        enum MINSIGSTKSZ = 4096;
++        enum SIGSTKSZ    = 16384;
++    }
+     else
+         static assert(0, "unimplemented");
+ 
+     //ucontext_t (defined in core.sys.posix.ucontext)
+     //mcontext_t (defined in core.sys.posix.ucontext)
+ 
+     version (MIPS_Any)
+     {
+         struct stack_t
+         {

cross/gcc-x86/APKBUILD

@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
 
 pkgname=gcc-x86
-pkgrel=0
+pkgrel=3
 pkgdesc="Stage2 cross-compiler for x86"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -64,6 +64,7 @@ _libitm=true
 if [ "$CHOST" != "$CTARGET" ]; then
 	if [ "$BOOTSTRAP" = nolibc ]; then
 		LANG_CXX=false
+		LANG_D=false
 		LANG_ADA=false
 		_libgcc=false
 		_builddir="$srcdir/build-cross-pass2"
@@ -73,7 +74,6 @@ if [ "$CHOST" != "$CTARGET" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 	_libgomp=false
 	_libatomic=false
@@ -115,7 +115,6 @@ elif [ "$CBUILD" != "$CHOST" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 
 	STRIP_FOR_TARGET=${CROSS_COMPILE}strip
@@ -140,11 +139,11 @@ else
 	export BOOT_LDFLAGS="$LDFLAGS"
 fi
 
-case "$CARCH" in
+case "$CTARGET_ARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -171,7 +170,7 @@ esac
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac
 
@@ -184,13 +183,8 @@ if $_libgomp; then
 	subpackages="$subpackages libgomp::$CTARGET_ARCH"
 fi
 
-case "$CARCH" in
-riscv64)
-LANG_ADA=false;;
-esac
-
 case "$CTARGET_ARCH" in
-loongarch64)
+riscv64|loongarch64)
 LANG_ADA=false;;
 esac
 
@@ -199,9 +193,17 @@ if $LANG_CXX; then
 	_languages="$_languages,c++"
 fi
 if $LANG_D; then
-	subpackages="$subpackages libgphobos::$CTARGET_ARCH gcc-gdc$_target:gdc"
+	subpackages="$subpackages gcc-gdc$_target:gdc"
 	_languages="$_languages,d"
-	makedepends_build="$makedepends_build libucontext-dev gcc-gdc-bootstrap"
+	makedepends_build="$makedepends_build libucontext-dev"
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		makedepends_build="$makedepends_build gcc-gdc-bootstrap"
+		subpackages="$subpackages libgphobos::$CTARGET_ARCH"
+	else
+		# shared libgphobos is for D programs to link against, so
+		# skip building that while cross-compiling the GDC compiler
+		makedepends_build="$makedepends_build gcc-gdc gcc-gdc$_cross"
+	fi
 fi
 if $LANG_OBJC; then
 	subpackages="$subpackages libobjc::$CTARGET_ARCH gcc-objc$_target:objc"
@@ -278,6 +280,9 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
 	0035-loongarch-disable-multilib-support.patch
+	0036-libphobos-add-riscv64-and-loongarch64-support.patch
+	fix-arm64.patch
+	ppc64le-quadmath.patch
 	"
 
 # secfixes:
@@ -359,20 +364,23 @@ build() {
 
 	case "$BOOTSTRAP" in
 	nolibc)	_bootstrap_configure="--with-newlib --disable-shared --enable-threads=no" ;;
-	*)	_bootstrap_configure="--enable-shared --enable-threads --enable-tls" ;;
+	*)
+		# cross-bootstrap GDC with a static libphobos: due to GCC's
+		# ./configure not having a --disable-shared=libphobos option,
+		# we have to use --enable-shared with everything else instead.
+		if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+			_bootstrap_configure="--enable-shared=libgcc,libstdc++,libffi,zlib,boehm-gc,ada,libada,libgo,libobjc,libatomic,libgomp,libitm,libgfortran,libquadmath"
+		else
+			_bootstrap_configure="--enable-shared"
+		fi
+		_bootstrap_configure="$_bootstrap_configure --enable-threads --enable-tls"
+		;;
 	esac
 
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"
 
 	msg "Building the following:"
 	echo ""
@@ -426,6 +434,10 @@ build() {
 		--with-pkgversion="$version"
 
 	msg "building gcc"
+	if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+		# cross-compiling libphobos with parallel make fails
+		make all-target-libphobos
+	fi
 	make
 
 	# we build gccjit separate to not build all of gcc with --enable-host-shared
@@ -666,9 +678,9 @@ libgphobos() {
 
 gdc() {
 	pkgdesc="GCC-based D language compiler"
-	depends="gcc=$_gccrel libgphobos=$_gccrel musl-dev"
-	depends="$depends libucontext-dev"
-	provides="gcc-gdc-bootstrap=$_gccrel"
+	depends="gcc$_target=$_gccrel musl-dev libucontext-dev"
+	[ "$CBUILD" = "$CTARGET" ] && depends="$depends libgphobos=$_gccrel"
+	[ "$CHOST" = "$CTARGET" ] && provides="gcc-gdc-bootstrap=$_gccrel"
 
 	mkdir -p "$subpkgdir/$_gcclibexec" \
 		"$subpkgdir"/$_gcclibdir/include/d/ \
@@ -679,13 +691,25 @@ gdc() {
 	# without installing the compiler
 	mv "$pkgdir/$_gcclibexec/d21" "$subpkgdir/$_gcclibexec/"
 	mv "$pkgdir"/$_gcclibdir/include/d/* "$subpkgdir"/$_gcclibdir/include/d/
-	mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
+	fi
+	if [ "$CHOST" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
+	else
+		mkdir -p "$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgdruntime.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.spec \
+			"$subpkgdir"/usr/$CTARGET/lib/
+	fi
 	mv "$pkgdir"/usr/bin/$CTARGET-gdc "$subpkgdir"/usr/bin/
-	mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
 }
 
 libgo() {
@@ -827,7 +851,7 @@ f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8
 abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+684bf2db12aa45e8db7a895ab0f227b4e4351f611b4fcc6e1745d7ad94d31b3554f39d8cf9e2203520b3c6ee35cf309b417d4a842e7a8cd55a2b2accb23f2f24  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,4 +861,7 @@ b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
+06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453  0036-libphobos-add-riscv64-and-loongarch64-support.patch
+00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9  ppc64le-quadmath.patch
 "

cross/gcc-x86/fix-arm64.patch

@@ -0,0 +1,544 @@
+From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 13 Jun 2024 12:48:21 +0100
+Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
+
+The testcase extracts one arm_neon.h vector from a pair (one subreg)
+and then reinterprets the result as an SVE vector (another subreg).
+Each subreg makes sense individually, but we can't fold them together
+into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
+but the interpretation of 32 bytes -> 16*N bytes depends on
+whether N==1 or N>1.
+
+Since the second subreg makes sense individually, simplify_subreg
+should bail out rather than ICE on it.  simplify_gen_subreg will
+then do the same (because it already checks validate_subreg).
+This leaves simplify_gen_subreg returning null, requiring the
+caller to take appropriate action.
+
+I think this is relatively likely to occur elsewhere, so the patch
+adds a helper for forcing a subreg, allowing a temporary pseudo to
+be created where necessary.
+
+I'll follow up by using force_subreg in more places.  This patch
+is intended to be a minimal backportable fix for the PR.
+
+gcc/
+	PR target/115464
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
+	to fold two subregs together if their relationship isn't known
+	at compile time.
+	* explow.h (force_subreg): Declare.
+	* explow.cc (force_subreg): New function.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
+
+(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
+---
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
+ gcc/explow.cc                                     | 15 +++++++++++++++
+ gcc/explow.h                                      |  2 ++
+ gcc/simplify-rtx.cc                               |  5 +++++
+ .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
+ 5 files changed, 36 insertions(+), 1 deletion(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 0d2edf3f19e..c9182594bc1 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1174,7 +1174,7 @@ public:
+        Advanced SIMD argument as an SVE vector.  */
+     if (!BYTES_BIG_ENDIAN
+ 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
+-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
++      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
+ 
+     rtx_vector_builder builder (VNx16BImode, 16, 2);
+     for (unsigned int i = 0; i < 16; i++)
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index 8e5f6b8e680..f6843398c4b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
+   return temp;
+ }
+ 
++/* Like simplify_gen_subreg, but force OP into a new register if the
++   subreg cannot be formed directly.  */
++
++rtx
++force_subreg (machine_mode outermode, rtx op,
++	      machine_mode innermode, poly_uint64 byte)
++{
++  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
++  if (x)
++    return x;
++
++  op = copy_to_mode_reg (innermode, op);
++  return simplify_gen_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index 16aa02cfb68..cbd1fcb7eb3 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+    Args are mode (in case value is a constant) and the value.  */
+ extern rtx force_reg (machine_mode, rtx);
+ 
++extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+ 
+diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
+index dceaa13333c..729d408aa55 100644
+--- a/gcc/simplify-rtx.cc
++++ b/gcc/simplify-rtx.cc
+@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
+       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
+       rtx newx;
+ 
++      /* Make sure that the relationship between the two subregs is
++	 known at compile time.  */
++      if (!ordered_p (outersize, innermostsize))
++	return NULL_RTX;
++
+       if (outermode == innermostmode
+ 	  && known_eq (byte, 0U)
+ 	  && known_eq (SUBREG_BYTE (op), 0))
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+new file mode 100644
+index 00000000000..d728d1325ed
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+@@ -0,0 +1,13 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl)
++{
++    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
++}
++
++/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
+-- 
+2.46.0
+
+
+From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:30 +0100
+Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
+
+This patch makes the aarch64 code use force_subreg instead of
+simplify_gen_subreg in more places.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+(3) The offset wasn't a simple lowpart or highpart calculation;
+    a later patch will deal with those.
+
+gcc/
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
+	Use force_subreg instead of simplify_gen_subreg.
+	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svget_impl::expand): Likewise.
+	(svget_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-functions.h
+	(multireg_permute::expand): Likewise.
+
+(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
+---
+ gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
+ gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
+ gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
+ 4 files changed, 10 insertions(+), 12 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index 75d21de1401..b2e46a073a8 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+       rtx temp2 = gen_reg_rtx (DImode);
+       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+ 				   subreg_lowpart_offset (d->mode, quadmode));
+-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
++      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+       else
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
+-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
++      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
+ 
+       /* And recalculate the index.  */
+       lane -= nunits / 4;
+diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
+index 33ab0741e87..5b9efe0b165 100644
+--- a/gcc/config/aarch64/aarch64-simd.md
++++ b/gcc/config/aarch64/aarch64-simd.md
+@@ -412,8 +412,8 @@
+   "TARGET_SIMD"
+   {
+      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
+-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
+-					     <MODE>mode, 0);
++     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
++				       <MODE>mode, 0);
+      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
+      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+      DONE;
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index c9182594bc1..2c95da79572 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1121,9 +1121,8 @@ public:
+   expand (function_expander &e) const override
+   {
+     /* Fold the access into a subreg rvalue.  */
+-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
+-				GET_MODE (e.args[0]),
+-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
++    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
++			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
+   }
+ };
+ 
+@@ -1157,8 +1156,7 @@ public:
+ 	e.add_fixed_operand (indices);
+ 	return e.generate_insn (icode);
+       }
+-    return simplify_gen_subreg (e.result_mode (), e.args[0],
+-				GET_MODE (e.args[0]), 0);
++    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
+   }
+ };
+ 
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+index 3b8e575e98e..7d06a57ff83 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
++++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+@@ -639,9 +639,9 @@ public:
+       {
+ 	machine_mode elt_mode = e.vector_mode (0);
+ 	rtx arg = e.args[0];
+-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
+-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
+-					       GET_MODE_SIZE (elt_mode)));
++	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
++	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
++					GET_MODE_SIZE (elt_mode)));
+       }
+     return e.use_exact_insn (icode);
+   }
+-- 
+2.46.0
+
+
+From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
+
+This patch makes more use of force_lowpart_subreg, similarly
+to the recent patch for force_subreg.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+gcc/
+	PR target/115464
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
+	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
+	simplify_gen_subreg and lowpart_subreg.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-sme.cc
+	(add_load_store_slice_operand): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
+	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
+
+(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
+---
+ gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
+ gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
+ gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
+ .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
+ 5 files changed, 23 insertions(+), 17 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index b2e46a073a8..264b9560709 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+   int lane = INTVAL (lane_idx);
+ 
+   if (lane < nunits / 4)
+-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
+-			       subreg_lowpart_offset (d->mode, quadmode));
++    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
+   else
+     {
+       /* Select the upper 64 bits, either a V2SF or V4HF, this however
+@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+ 	 gen_highpart_mode generates code that isn't optimal.  */
+       rtx temp1 = gen_reg_rtx (d->mode);
+       rtx temp2 = gen_reg_rtx (DImode);
+-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+-				   subreg_lowpart_offset (d->mode, quadmode));
++      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
+       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+ 	case AARCH64_WSR64:
+ 	case AARCH64_WSRF64:
+ 	case AARCH64_WSR128:
+-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
++	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
+ 	  break;
+ 	case AARCH64_WSRF:
+ 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
+@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+     case AARCH64_RSR64:
+     case AARCH64_RSRF64:
+     case AARCH64_RSR128:
+-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
++      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
++				   target, sysreg_mode);
+     case AARCH64_RSRF:
+       subreg = gen_lowpart_SUBREG (SImode, target);
+       return gen_lowpart_SUBREG (SFmode, subreg);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 2c95da79572..3c970e9c5f8 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1183,7 +1183,7 @@ public:
+     if (BYTES_BIG_ENDIAN)
+       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
+     insn_code icode = code_for_vcond_mask (mode, mode);
+-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
++    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
+     e.add_output_operand (icode);
+     e.add_input_operand (icode, e.args[1]);
+     e.add_input_operand (icode, e.args[0]);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+index f4c91bcbb95..b66b35ae60b 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
+   rtx base = e.args[argno];
+   if (e.mode_suffix_id == MODE_vnum)
+     {
+-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
++      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
+       base = simplify_gen_binary (PLUS, SImode, base, vnum);
+     }
+   e.add_input_operand (icode, base);
+diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
+index 1beec94629d..a064aeecbc0 100644
+--- a/gcc/config/aarch64/aarch64.cc
++++ b/gcc/config/aarch64/aarch64.cc
+@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
+   /* can_change_mode_class must only return true if subregs and svreinterprets
+      have the same semantics.  */
+   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
+-    return lowpart_subreg (mode, x, GET_MODE (x));
++    return force_lowpart_subreg (mode, x, GET_MODE (x));
+ 
+   rtx res = gen_reg_rtx (mode);
+   x = force_reg (GET_MODE (x), x);
+@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			    rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = gen_lowpart (DImode, op1);
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+   *high_in1 = gen_highpart (DImode, op1);
+   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
+@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			     rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
+-
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+ 
+   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+new file mode 100644
+index 00000000000..f561c34f732
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
++{
++    return svset_neonq_u16 (a, permute_tbl.val[1]);
++}
+-- 
+2.46.0
+
+
+From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 4/4] Add force_lowpart_subreg
+
+optabs had a local function called lowpart_subreg_maybe_copy
+that is very similar to the lowpart version of force_subreg.
+This patch adds a force_lowpart_subreg wrapper around
+force_subreg and uses it in optabs.cc.
+
+The only difference between the old and new functions is that
+the old one asserted success while the new one doesn't.
+It's common not to assert elsewhere when taking subregs;
+normally a null result is enough.
+
+Later patches will make more use of the new function.
+
+gcc/
+	* explow.h (force_lowpart_subreg): Declare.
+	* explow.cc (force_lowpart_subreg): New function.
+	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
+	(expand_absneg_bit): Use force_lowpart_subreg instead of
+	lowpart_subreg_maybe_copy.
+	(expand_copysign_bit): Likewise.
+
+(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
+---
+ gcc/explow.cc | 14 ++++++++++++++
+ gcc/explow.h  |  1 +
+ gcc/optabs.cc | 24 ++----------------------
+ 3 files changed, 17 insertions(+), 22 deletions(-)
+
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index f6843398c4b..5fdfa81f69b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
+   return simplify_gen_subreg (outermode, op, innermode, byte);
+ }
+ 
++/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
++   which has mode INNERMODE.  Allow OP to be forced into a new register
++   if necessary.
++
++   Return null on failure.  */
++
++rtx
++force_lowpart_subreg (machine_mode outermode, rtx op,
++		      machine_mode innermode)
++{
++  auto byte = subreg_lowpart_offset (outermode, innermode);
++  return force_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index cbd1fcb7eb3..dd654649b06 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+ extern rtx force_reg (machine_mode, rtx);
+ 
+ extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
+ 
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+diff --git a/gcc/optabs.cc b/gcc/optabs.cc
+index ce91f94ed43..804c0dc73ba 100644
+--- a/gcc/optabs.cc
++++ b/gcc/optabs.cc
+@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
+   return 0;
+ }
+ 
+-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
+-   conditions, VAL may already be a SUBREG against which we cannot generate
+-   a further SUBREG.  In this case, we expect forcing the value into a
+-   register will work around the situation.  */
+-
+-static rtx
+-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+-			   machine_mode imode)
+-{
+-  rtx ret;
+-  ret = lowpart_subreg (omode, val, imode);
+-  if (ret == NULL)
+-    {
+-      val = force_reg (imode, val);
+-      ret = lowpart_subreg (omode, val, imode);
+-      gcc_assert (ret != NULL);
+-    }
+-  return ret;
+-}
+-
+ /* Expand a floating point absolute value or negation operation via a
+    logical operation on the sign bit.  */
+ 
+@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
+ 			   gen_lowpart (imode, op0),
+ 			   immed_wide_int_const (mask, imode),
+ 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+ 
+       set_dst_reg_note (get_last_insn (), REG_EQUAL,
+ 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
+@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
+ 
+       temp = expand_binop (imode, ior_optab, op0, op1,
+ 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+     }
+ 
+   return target;
+-- 
+2.46.0
+

cross/gcc-x86/ppc64le-quadmath.patch

@@ -0,0 +1,56 @@
+Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=3fe5720430a9ba61ed7562aac4d758cc77d49a28
+--
+From 3fe5720430a9ba61ed7562aac4d758cc77d49a28 Mon Sep 17 00:00:00 2001
+From: Jakub Jelinek <jakub@redhat.com>
+Date: Sat, 3 Aug 2024 20:37:54 +0200
+Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in
+ some powerpc* configurations [PR116007]
+
+My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation.
+Unfortunately, that seems to fail building in some powerpc* configurations, where
+TFmode isn't available.
+quad.h has:
+ #ifndef TFtype
+ typedef float TFtype __attribute__ ((mode (TF)));
+ #endif
+and uses TFtype.  quad.h has:
+ /* Define the complex type corresponding to __float128
+    ("_Complex __float128" is not allowed) */
+ #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__)
+ typedef _Complex float __attribute__((mode(TC))) __complex128;
+ #else
+ typedef _Complex float __attribute__((mode(KC))) __complex128;
+ #endif
+with the conditional and KCmode use added during porting of libquadmath
+to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__
+isn't defined; I could define it to float __attribute__ ((mode (KF))) but it
+seemed easier to just define it to __float128 which should do the same thing.
+
+2024-08-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/116007
+	* math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__
+	define to __float128 before including soft-fp.h and quad.h.
+
+(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b)
+---
+ libquadmath/math/sqrtq.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c
+index 8ca2828d42ce..a58998a06670 100644
+--- a/libquadmath/math/sqrtq.c
++++ b/libquadmath/math/sqrtq.c
+@@ -9,6 +9,9 @@
+     && defined(FE_TOWARDZERO) \
+     && defined(FE_INEXACT)
+ #define USE_SOFT_FP 1
++#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__)
++#define TFtype __float128
++#endif
+ #include "../../libgcc/soft-fp/soft-fp.h"
+ #include "../../libgcc/soft-fp/quad.h"
+ #endif
+-- 
+2.43.5
+

cross/gcc-x86_64/0026-ada-musl-support-fixes.patch

@@ -4,17 +4,17 @@ Date: Fri, 21 Aug 2020 07:07:48 +0000
 Subject: [PATCH 26/35] ada: musl support fixes
 
 ---
- gcc/ada/Makefile.rtl | 10 +++++-----
+ gcc/ada/Makefile.rtl | 16 ++++++++--------
  gcc/ada/adaint.c     | 34 +++++++++++++++++++---------------
  gcc/ada/adaint.h     | 10 ++++------
  gcc/ada/terminals.c  |  8 ++++----
- 4 files changed, 32 insertions(+), 30 deletions(-)
+ 4 files changed, 35 insertions(+), 33 deletions(-)
 
 diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
-index 96306f8cc9a..090b6770ae5 100644
+index 32cbdb692..463028fbe 100644
 --- a/gcc/ada/Makefile.rtl
 +++ b/gcc/ada/Makefile.rtl
-@@ -1549,7 +1549,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
+@@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),)
    s-intman.adb<libgnarl/s-intman__posix.adb \
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -23,7 +23,16 @@ index 96306f8cc9a..090b6770ae5 100644
    a-exetim.adb<libgnarl/a-exetim__posix.adb \
    a-exetim.ads<libgnarl/a-exetim__default.ads \
    s-linux.ads<libgnarl/s-linux.ads \
-@@ -2174,7 +2174,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2144,7 +2144,7 @@ ifeq ($(strip $(filter-out loongarch% linux%,$(target_cpu) $(target_os))),)
+   g-sercom.adb<libgnat/g-sercom__linux.adb \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+   $(GNATRTL_128BIT_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(ATOMICS_BUILTINS_TARGET_PAIRS) \
+   system.ads<libgnat/system-linux-loongarch.ads
+@@ -2232,7 +2232,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
    s-tasinf.adb<libgnarl/s-tasinf__linux.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -32,7 +41,7 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    system.ads<libgnat/system-linux-ppc.ads
-@@ -2205,7 +2205,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
+@@ -2267,7 +2267,7 @@ ifeq ($(strip $(filter-out powerpc% linux%,$(target_cpu) $(target_os))),)
  endif
  
  # ARM linux, GNU eabi
@@ -50,7 +59,7 @@ index 96306f8cc9a..090b6770ae5 100644
    s-mudido.adb<libgnarl/s-mudido__affinity.adb \
    s-osinte.ads<libgnarl/s-osinte__linux.ads \
    s-osinte.adb<libgnarl/s-osinte__posix.adb \
-@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
+@@ -2488,7 +2488,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -59,7 +68,16 @@ index 96306f8cc9a..090b6770ae5 100644
    $(ATOMICS_TARGET_PAIRS) \
    $(ATOMICS_BUILTINS_TARGET_PAIRS) \
    $(GNATRTL_128BIT_PAIRS) \
-@@ -2524,7 +2524,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+@@ -2592,7 +2592,7 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(target_cpu) $(target_os))),)
+   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
+   s-taspri.ads<libgnarl/s-taspri__posix.ads \
+   $(TRASYM_DWARF_UNIX_PAIRS) \
+-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
++  s-tsmona.adb<libgnat/s-tsmona.adb \
+   $(ATOMICS_TARGET_PAIRS) \
+   $(X86_64_TARGET_PAIRS) \
+   $(SIMD_PATH_TARGET_PAIRS) \
+@@ -2637,7 +2637,7 @@ ifeq ($(strip $(filter-out %x32 linux%,$(target_cpu) $(target_os))),)
    s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
    s-taspri.ads<libgnarl/s-taspri__posix.ads \
    $(TRASYM_DWARF_UNIX_PAIRS) \
@@ -69,10 +87,10 @@ index 96306f8cc9a..090b6770ae5 100644
    $(X86_64_TARGET_PAIRS) \
    $(SIMD_PATH_TARGET_PAIRS) \
 diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
-index 8522094164e..92b230a462b 100644
+index 74aa3c412..ef6118f37 100644
 --- a/gcc/ada/adaint.c
 +++ b/gcc/ada/adaint.c
-@@ -91,6 +91,11 @@
+@@ -94,6 +94,11 @@
  #include <sys/param.h>
  #include <sys/pstat.h>
  #endif
@@ -84,7 +102,7 @@ index 8522094164e..92b230a462b 100644
  
  #ifdef __PikeOS__
  #define __BSD_VISIBLE 1
-@@ -3438,7 +3443,6 @@ __gnat_lwp_self (void)
+@@ -3465,7 +3470,6 @@ __gnat_lwp_self (void)
  #endif
  
  #if defined (__linux__)
@@ -92,7 +110,7 @@ index 8522094164e..92b230a462b 100644
  
  /* glibc versions earlier than 2.7 do not define the routines to handle
     dynamically allocated CPU sets. For these targets, we use the static
-@@ -3448,7 +3452,7 @@ __gnat_lwp_self (void)
+@@ -3475,7 +3479,7 @@ __gnat_lwp_self (void)
  
  /* Dynamic cpu sets */
  
@@ -101,7 +119,7 @@ index 8522094164e..92b230a462b 100644
  __gnat_cpu_alloc (size_t count)
  {
    return CPU_ALLOC (count);
-@@ -3461,33 +3465,33 @@ __gnat_cpu_alloc_size (size_t count)
+@@ -3488,33 +3492,33 @@ __gnat_cpu_alloc_size (size_t count)
  }
  
  void
@@ -143,7 +161,7 @@ index 8522094164e..92b230a462b 100644
  }
  
  size_t
-@@ -3497,23 +3501,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
+@@ -3524,23 +3528,23 @@ __gnat_cpu_alloc_size (size_t count ATTRIBUTE_UNUSED)
  }
  
  void
@@ -173,7 +191,7 @@ index 8522094164e..92b230a462b 100644
  #endif /* !CPU_ALLOC */
  #endif /* __linux__ */
 diff --git a/gcc/ada/adaint.h b/gcc/ada/adaint.h
-index 987432c9307..4d782f07de9 100644
+index 0cbfd0e15..f97ed905b 100644
 --- a/gcc/ada/adaint.h
 +++ b/gcc/ada/adaint.h
 @@ -319,13 +319,11 @@ extern void   *__gnat_lwp_self			   (void);
@@ -195,10 +213,10 @@ index 987432c9307..4d782f07de9 100644
  
  #if defined (_WIN32)
 diff --git a/gcc/ada/terminals.c b/gcc/ada/terminals.c
-index c0ee4a16bb1..ed796a48c1b 100644
+index 05af82c27..626ac35bc 100644
 --- a/gcc/ada/terminals.c
 +++ b/gcc/ada/terminals.c
-@@ -1127,7 +1127,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1134,7 +1134,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  /* POSIX does not specify how to open the master side of a terminal.Several
     methods are available (system specific):
        1- using a cloning device (USE_CLONE_DEVICE)
@@ -207,7 +225,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
        3- openpty                (USE_OPENPTY)
  
     When using the cloning device method, the macro USE_CLONE_DEVICE should
-@@ -1141,7 +1141,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
+@@ -1148,7 +1148,7 @@ __gnat_setup_winsize (void *desc ATTRIBUTE_UNUSED,
  #if defined (__APPLE__) || defined (BSD)
  #define USE_OPENPTY
  #elif defined (__linux__)
@@ -216,7 +234,7 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (__sun__)
  #define USE_CLONE_DEVICE "/dev/ptmx"
  #elif defined (_AIX)
-@@ -1190,8 +1190,8 @@ allocate_pty_desc (pty_desc **desc) {
+@@ -1197,8 +1197,8 @@ allocate_pty_desc (pty_desc **desc) {
     int  master_fd   = -1;
     char *slave_name = NULL;
  
@@ -227,6 +245,3 @@ index c0ee4a16bb1..ed796a48c1b 100644
  #elif defined (USE_OPENPTY)
    status = openpty (&master_fd, &slave_fd, NULL, NULL, NULL);
  #elif defined (USE_CLONE_DEVICE)
--- 
-2.41.0
-

cross/gcc-x86_64/0036-libphobos-add-riscv64-and-loongarch64-support.patch

@@ -0,0 +1,87 @@
+From: Celeste <cielesti@protonmail.com>
+Date: Mon, 2 Sep 2024 02:54:17 +0000
+Subject: [PATCH] libphobos: add riscv64 and loongarch64 support
+
+Add musl support for these 2 architectures based on fenv.h and signal.h from:
+
+https://git.musl-libc.org/cgit/musl/tree/arch/riscv64/bits?h=v1.2.5
+
+https://git.musl-libc.org/cgit/musl/tree/arch/loongarch64/bits?h=v1.2.5
+---
+ libphobos/libdruntime/core/stdc/fenv.d        | 13 +++++++++++++
+ libphobos/libdruntime/core/sys/posix/signal.d | 10 ++++++++++
+ 2 files changed, 23 insertions(+)
+
+diff --git a/libphobos/libdruntime/core/stdc/fenv.d b/libphobos/libdruntime/core/stdc/fenv.d
+index a7364c0a..5b327e4a 100644
+--- a/libphobos/libdruntime/core/stdc/fenv.d
++++ b/libphobos/libdruntime/core/stdc/fenv.d
+@@ -436,20 +436,33 @@ else version (CRuntime_Musl)
+             ushort __cs_selector;
+             ushort __opcode;
+             uint   __data_offset;
+             ushort __data_selector;
+             ushort __unused5;
+             version (X86_64)
+                 uint __mxcsr;
+         }
+         alias ushort fexcept_t;
+     }
++    else version (RISCV64)
++    {
++        alias uint fenv_t;
++        alias uint fexcept_t;
++    }
++    else version (LoongArch64)
++    {
++        struct fenv_t
++        {
++            uint __cw;
++        }
++        alias uint fexcept_t;
++    }
+     else
+     {
+         static assert(false, "Architecture not supported.");
+     }
+ }
+ else version (CRuntime_Newlib)
+ {
+     version (AArch64)
+     {
+         alias fenv_t = ulong;
+diff --git a/libphobos/libdruntime/core/sys/posix/signal.d b/libphobos/libdruntime/core/sys/posix/signal.d
+index a8b7f751..78d8b3cd 100644
+--- a/libphobos/libdruntime/core/sys/posix/signal.d
++++ b/libphobos/libdruntime/core/sys/posix/signal.d
+@@ -2751,20 +2751,30 @@ else version (CRuntime_Musl)
+     else version (PPC_Any)
+     {
+         enum MINSIGSTKSZ = 4096;
+         enum SIGSTKSZ    = 10240;
+     }
+     else version (X86_Any)
+     {
+         enum MINSIGSTKSZ = 2048;
+         enum SIGSTKSZ    = 8192;
+     }
++    else version (RISCV64)
++    {
++        enum MINSIGSTKSZ = 2048;
++        enum SIGSTKSZ    = 8192;
++    }
++    else version (LoongArch64)
++    {
++        enum MINSIGSTKSZ = 4096;
++        enum SIGSTKSZ    = 16384;
++    }
+     else
+         static assert(0, "unimplemented");
+ 
+     //ucontext_t (defined in core.sys.posix.ucontext)
+     //mcontext_t (defined in core.sys.posix.ucontext)
+ 
+     version (MIPS_Any)
+     {
+         struct stack_t
+         {

cross/gcc-x86_64/APKBUILD

@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
 
 pkgname=gcc-x86_64
-pkgrel=0
+pkgrel=3
 pkgdesc="Stage2 cross-compiler for x86_64"
 url="https://gcc.gnu.org"
 arch="aarch64"
@@ -64,6 +64,7 @@ _libitm=true
 if [ "$CHOST" != "$CTARGET" ]; then
 	if [ "$BOOTSTRAP" = nolibc ]; then
 		LANG_CXX=false
+		LANG_D=false
 		LANG_ADA=false
 		_libgcc=false
 		_builddir="$srcdir/build-cross-pass2"
@@ -73,7 +74,6 @@ if [ "$CHOST" != "$CTARGET" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 	_libgomp=false
 	_libatomic=false
@@ -115,7 +115,6 @@ elif [ "$CBUILD" != "$CHOST" ]; then
 	LANG_OBJC=false
 	LANG_GO=false
 	LANG_FORTRAN=false
-	LANG_D=false
 	LANG_JIT=false
 
 	STRIP_FOR_TARGET=${CROSS_COMPILE}strip
@@ -140,11 +139,11 @@ else
 	export BOOT_LDFLAGS="$LDFLAGS"
 fi
 
-case "$CARCH" in
+case "$CTARGET_ARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -171,7 +170,7 @@ esac
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac
 
@@ -184,13 +183,8 @@ if $_libgomp; then
 	subpackages="$subpackages libgomp::$CTARGET_ARCH"
 fi
 
-case "$CARCH" in
-riscv64)
-LANG_ADA=false;;
-esac
-
 case "$CTARGET_ARCH" in
-loongarch64)
+riscv64|loongarch64)
 LANG_ADA=false;;
 esac
 
@@ -199,9 +193,17 @@ if $LANG_CXX; then
 	_languages="$_languages,c++"
 fi
 if $LANG_D; then
-	subpackages="$subpackages libgphobos::$CTARGET_ARCH gcc-gdc$_target:gdc"
+	subpackages="$subpackages gcc-gdc$_target:gdc"
 	_languages="$_languages,d"
-	makedepends_build="$makedepends_build libucontext-dev gcc-gdc-bootstrap"
+	makedepends_build="$makedepends_build libucontext-dev"
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		makedepends_build="$makedepends_build gcc-gdc-bootstrap"
+		subpackages="$subpackages libgphobos::$CTARGET_ARCH"
+	else
+		# shared libgphobos is for D programs to link against, so
+		# skip building that while cross-compiling the GDC compiler
+		makedepends_build="$makedepends_build gcc-gdc gcc-gdc$_cross"
+	fi
 fi
 if $LANG_OBJC; then
 	subpackages="$subpackages libobjc::$CTARGET_ARCH gcc-objc$_target:objc"
@@ -278,6 +280,9 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
 	0035-loongarch-disable-multilib-support.patch
+	0036-libphobos-add-riscv64-and-loongarch64-support.patch
+	fix-arm64.patch
+	ppc64le-quadmath.patch
 	"
 
 # secfixes:
@@ -359,20 +364,23 @@ build() {
 
 	case "$BOOTSTRAP" in
 	nolibc)	_bootstrap_configure="--with-newlib --disable-shared --enable-threads=no" ;;
-	*)	_bootstrap_configure="--enable-shared --enable-threads --enable-tls" ;;
+	*)
+		# cross-bootstrap GDC with a static libphobos: due to GCC's
+		# ./configure not having a --disable-shared=libphobos option,
+		# we have to use --enable-shared with everything else instead.
+		if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+			_bootstrap_configure="--enable-shared=libgcc,libstdc++,libffi,zlib,boehm-gc,ada,libada,libgo,libobjc,libatomic,libgomp,libitm,libgfortran,libquadmath"
+		else
+			_bootstrap_configure="--enable-shared"
+		fi
+		_bootstrap_configure="$_bootstrap_configure --enable-threads --enable-tls"
+		;;
 	esac
 
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"
 
 	msg "Building the following:"
 	echo ""
@@ -426,6 +434,10 @@ build() {
 		--with-pkgversion="$version"
 
 	msg "building gcc"
+	if $LANG_D && [ "$CBUILD" != "$CTARGET" ]; then
+		# cross-compiling libphobos with parallel make fails
+		make all-target-libphobos
+	fi
 	make
 
 	# we build gccjit separate to not build all of gcc with --enable-host-shared
@@ -666,9 +678,9 @@ libgphobos() {
 
 gdc() {
 	pkgdesc="GCC-based D language compiler"
-	depends="gcc=$_gccrel libgphobos=$_gccrel musl-dev"
-	depends="$depends libucontext-dev"
-	provides="gcc-gdc-bootstrap=$_gccrel"
+	depends="gcc$_target=$_gccrel musl-dev libucontext-dev"
+	[ "$CBUILD" = "$CTARGET" ] && depends="$depends libgphobos=$_gccrel"
+	[ "$CHOST" = "$CTARGET" ] && provides="gcc-gdc-bootstrap=$_gccrel"
 
 	mkdir -p "$subpkgdir/$_gcclibexec" \
 		"$subpkgdir"/$_gcclibdir/include/d/ \
@@ -679,13 +691,25 @@ gdc() {
 	# without installing the compiler
 	mv "$pkgdir/$_gcclibexec/d21" "$subpkgdir/$_gcclibexec/"
 	mv "$pkgdir"/$_gcclibdir/include/d/* "$subpkgdir"/$_gcclibdir/include/d/
-	mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
-	mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+	if [ "$CBUILD" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.so "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.so "$subpkgdir"/usr/lib/
+	fi
+	if [ "$CHOST" = "$CTARGET" ]; then
+		mv "$pkgdir"/usr/lib/libgdruntime.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.a "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/lib/libgphobos.spec "$subpkgdir"/usr/lib/
+		mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
+	else
+		mkdir -p "$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgdruntime.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.a \
+			"$subpkgdir"/usr/$CTARGET/lib/
+		mv "$pkgdir"/usr/$CTARGET/lib/libgphobos.spec \
+			"$subpkgdir"/usr/$CTARGET/lib/
+	fi
 	mv "$pkgdir"/usr/bin/$CTARGET-gdc "$subpkgdir"/usr/bin/
-	mv "$pkgdir"/usr/bin/gdc "$subpkgdir"/usr/bin/
 }
 
 libgo() {
@@ -827,7 +851,7 @@ f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8
 abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+684bf2db12aa45e8db7a895ab0f227b4e4351f611b4fcc6e1745d7ad94d31b3554f39d8cf9e2203520b3c6ee35cf309b417d4a842e7a8cd55a2b2accb23f2f24  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,4 +861,7 @@ b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
+06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453  0036-libphobos-add-riscv64-and-loongarch64-support.patch
+00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9  ppc64le-quadmath.patch
 "

cross/gcc-x86_64/fix-arm64.patch

@@ -0,0 +1,544 @@
+From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Thu, 13 Jun 2024 12:48:21 +0100
+Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
+
+The testcase extracts one arm_neon.h vector from a pair (one subreg)
+and then reinterprets the result as an SVE vector (another subreg).
+Each subreg makes sense individually, but we can't fold them together
+into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
+but the interpretation of 32 bytes -> 16*N bytes depends on
+whether N==1 or N>1.
+
+Since the second subreg makes sense individually, simplify_subreg
+should bail out rather than ICE on it.  simplify_gen_subreg will
+then do the same (because it already checks validate_subreg).
+This leaves simplify_gen_subreg returning null, requiring the
+caller to take appropriate action.
+
+I think this is relatively likely to occur elsewhere, so the patch
+adds a helper for forcing a subreg, allowing a temporary pseudo to
+be created where necessary.
+
+I'll follow up by using force_subreg in more places.  This patch
+is intended to be a minimal backportable fix for the PR.
+
+gcc/
+	PR target/115464
+	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
+	to fold two subregs together if their relationship isn't known
+	at compile time.
+	* explow.h (force_subreg): Declare.
+	* explow.cc (force_subreg): New function.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
+
+(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
+---
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
+ gcc/explow.cc                                     | 15 +++++++++++++++
+ gcc/explow.h                                      |  2 ++
+ gcc/simplify-rtx.cc                               |  5 +++++
+ .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
+ 5 files changed, 36 insertions(+), 1 deletion(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 0d2edf3f19e..c9182594bc1 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1174,7 +1174,7 @@ public:
+        Advanced SIMD argument as an SVE vector.  */
+     if (!BYTES_BIG_ENDIAN
+ 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
+-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
++      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
+ 
+     rtx_vector_builder builder (VNx16BImode, 16, 2);
+     for (unsigned int i = 0; i < 16; i++)
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index 8e5f6b8e680..f6843398c4b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
+   return temp;
+ }
+ 
++/* Like simplify_gen_subreg, but force OP into a new register if the
++   subreg cannot be formed directly.  */
++
++rtx
++force_subreg (machine_mode outermode, rtx op,
++	      machine_mode innermode, poly_uint64 byte)
++{
++  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
++  if (x)
++    return x;
++
++  op = copy_to_mode_reg (innermode, op);
++  return simplify_gen_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index 16aa02cfb68..cbd1fcb7eb3 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+    Args are mode (in case value is a constant) and the value.  */
+ extern rtx force_reg (machine_mode, rtx);
+ 
++extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+ 
+diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
+index dceaa13333c..729d408aa55 100644
+--- a/gcc/simplify-rtx.cc
++++ b/gcc/simplify-rtx.cc
+@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
+       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
+       rtx newx;
+ 
++      /* Make sure that the relationship between the two subregs is
++	 known at compile time.  */
++      if (!ordered_p (outersize, innermostsize))
++	return NULL_RTX;
++
+       if (outermode == innermostmode
+ 	  && known_eq (byte, 0U)
+ 	  && known_eq (SUBREG_BYTE (op), 0))
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+new file mode 100644
+index 00000000000..d728d1325ed
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
+@@ -0,0 +1,13 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl)
++{
++    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
++}
++
++/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
+-- 
+2.46.0
+
+
+From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:30 +0100
+Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
+
+This patch makes the aarch64 code use force_subreg instead of
+simplify_gen_subreg in more places.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+(3) The offset wasn't a simple lowpart or highpart calculation;
+    a later patch will deal with those.
+
+gcc/
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
+	Use force_subreg instead of simplify_gen_subreg.
+	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svget_impl::expand): Likewise.
+	(svget_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-functions.h
+	(multireg_permute::expand): Likewise.
+
+(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
+---
+ gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
+ gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
+ gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
+ 4 files changed, 10 insertions(+), 12 deletions(-)
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index 75d21de1401..b2e46a073a8 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+       rtx temp2 = gen_reg_rtx (DImode);
+       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+ 				   subreg_lowpart_offset (d->mode, quadmode));
+-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
++      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+       else
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
+-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
++      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
+ 
+       /* And recalculate the index.  */
+       lane -= nunits / 4;
+diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
+index 33ab0741e87..5b9efe0b165 100644
+--- a/gcc/config/aarch64/aarch64-simd.md
++++ b/gcc/config/aarch64/aarch64-simd.md
+@@ -412,8 +412,8 @@
+   "TARGET_SIMD"
+   {
+      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
+-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
+-					     <MODE>mode, 0);
++     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
++				       <MODE>mode, 0);
+      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
+      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+      DONE;
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index c9182594bc1..2c95da79572 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1121,9 +1121,8 @@ public:
+   expand (function_expander &e) const override
+   {
+     /* Fold the access into a subreg rvalue.  */
+-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
+-				GET_MODE (e.args[0]),
+-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
++    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
++			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
+   }
+ };
+ 
+@@ -1157,8 +1156,7 @@ public:
+ 	e.add_fixed_operand (indices);
+ 	return e.generate_insn (icode);
+       }
+-    return simplify_gen_subreg (e.result_mode (), e.args[0],
+-				GET_MODE (e.args[0]), 0);
++    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
+   }
+ };
+ 
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+index 3b8e575e98e..7d06a57ff83 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
++++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+@@ -639,9 +639,9 @@ public:
+       {
+ 	machine_mode elt_mode = e.vector_mode (0);
+ 	rtx arg = e.args[0];
+-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
+-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
+-					       GET_MODE_SIZE (elt_mode)));
++	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
++	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
++					GET_MODE_SIZE (elt_mode)));
+       }
+     return e.use_exact_insn (icode);
+   }
+-- 
+2.46.0
+
+
+From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
+
+This patch makes more use of force_lowpart_subreg, similarly
+to the recent patch for force_subreg.  The criteria were:
+
+(1) The code is obviously specific to expand (where new pseudos
+    can be created).
+
+(2) The value is obviously an rvalue rather than an lvalue.
+
+gcc/
+	PR target/115464
+	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
+	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
+	simplify_gen_subreg and lowpart_subreg.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svset_neonq_impl::expand): Likewise.
+	* config/aarch64/aarch64-sve-builtins-sme.cc
+	(add_load_store_slice_operand): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
+	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
+
+gcc/testsuite/
+	PR target/115464
+	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
+
+(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
+---
+ gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
+ gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
+ gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
+ gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
+ .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
+ 5 files changed, 23 insertions(+), 17 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+
+diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
+index b2e46a073a8..264b9560709 100644
+--- a/gcc/config/aarch64/aarch64-builtins.cc
++++ b/gcc/config/aarch64/aarch64-builtins.cc
+@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+   int lane = INTVAL (lane_idx);
+ 
+   if (lane < nunits / 4)
+-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
+-			       subreg_lowpart_offset (d->mode, quadmode));
++    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
+   else
+     {
+       /* Select the upper 64 bits, either a V2SF or V4HF, this however
+@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
+ 	 gen_highpart_mode generates code that isn't optimal.  */
+       rtx temp1 = gen_reg_rtx (d->mode);
+       rtx temp2 = gen_reg_rtx (DImode);
+-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
+-				   subreg_lowpart_offset (d->mode, quadmode));
++      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
+       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
+       if (BYTES_BIG_ENDIAN)
+ 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
+@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+ 	case AARCH64_WSR64:
+ 	case AARCH64_WSRF64:
+ 	case AARCH64_WSR128:
+-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
++	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
+ 	  break;
+ 	case AARCH64_WSRF:
+ 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
+@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
+     case AARCH64_RSR64:
+     case AARCH64_RSRF64:
+     case AARCH64_RSR128:
+-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
++      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
++				   target, sysreg_mode);
+     case AARCH64_RSRF:
+       subreg = gen_lowpart_SUBREG (SImode, target);
+       return gen_lowpart_SUBREG (SFmode, subreg);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+index 2c95da79572..3c970e9c5f8 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+@@ -1183,7 +1183,7 @@ public:
+     if (BYTES_BIG_ENDIAN)
+       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
+     insn_code icode = code_for_vcond_mask (mode, mode);
+-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
++    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
+     e.add_output_operand (icode);
+     e.add_input_operand (icode, e.args[1]);
+     e.add_input_operand (icode, e.args[0]);
+diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+index f4c91bcbb95..b66b35ae60b 100644
+--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
++++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
+@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
+   rtx base = e.args[argno];
+   if (e.mode_suffix_id == MODE_vnum)
+     {
+-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
++      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
+       base = simplify_gen_binary (PLUS, SImode, base, vnum);
+     }
+   e.add_input_operand (icode, base);
+diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
+index 1beec94629d..a064aeecbc0 100644
+--- a/gcc/config/aarch64/aarch64.cc
++++ b/gcc/config/aarch64/aarch64.cc
+@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
+   /* can_change_mode_class must only return true if subregs and svreinterprets
+      have the same semantics.  */
+   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
+-    return lowpart_subreg (mode, x, GET_MODE (x));
++    return force_lowpart_subreg (mode, x, GET_MODE (x));
+ 
+   rtx res = gen_reg_rtx (mode);
+   x = force_reg (GET_MODE (x), x);
+@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			    rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = gen_lowpart (DImode, op1);
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+   *high_in1 = gen_highpart (DImode, op1);
+   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
+@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
+ 			     rtx *high_in2)
+ {
+   *low_dest = gen_reg_rtx (DImode);
+-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
+-
+-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
+-				  subreg_lowpart_offset (DImode, TImode));
++  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
++  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
+   *high_dest = gen_reg_rtx (DImode);
+ 
+   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
+diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+new file mode 100644
+index 00000000000..f561c34f732
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-O2" } */
++
++#include <arm_neon.h>
++#include <arm_sve.h>
++#include <arm_neon_sve_bridge.h>
++
++svuint16_t
++convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
++{
++    return svset_neonq_u16 (a, permute_tbl.val[1]);
++}
+-- 
+2.46.0
+
+
+From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
+From: Richard Sandiford <richard.sandiford@arm.com>
+Date: Tue, 18 Jun 2024 12:22:31 +0100
+Subject: [PATCH 4/4] Add force_lowpart_subreg
+
+optabs had a local function called lowpart_subreg_maybe_copy
+that is very similar to the lowpart version of force_subreg.
+This patch adds a force_lowpart_subreg wrapper around
+force_subreg and uses it in optabs.cc.
+
+The only difference between the old and new functions is that
+the old one asserted success while the new one doesn't.
+It's common not to assert elsewhere when taking subregs;
+normally a null result is enough.
+
+Later patches will make more use of the new function.
+
+gcc/
+	* explow.h (force_lowpart_subreg): Declare.
+	* explow.cc (force_lowpart_subreg): New function.
+	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
+	(expand_absneg_bit): Use force_lowpart_subreg instead of
+	lowpart_subreg_maybe_copy.
+	(expand_copysign_bit): Likewise.
+
+(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
+---
+ gcc/explow.cc | 14 ++++++++++++++
+ gcc/explow.h  |  1 +
+ gcc/optabs.cc | 24 ++----------------------
+ 3 files changed, 17 insertions(+), 22 deletions(-)
+
+diff --git a/gcc/explow.cc b/gcc/explow.cc
+index f6843398c4b..5fdfa81f69b 100644
+--- a/gcc/explow.cc
++++ b/gcc/explow.cc
+@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
+   return simplify_gen_subreg (outermode, op, innermode, byte);
+ }
+ 
++/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
++   which has mode INNERMODE.  Allow OP to be forced into a new register
++   if necessary.
++
++   Return null on failure.  */
++
++rtx
++force_lowpart_subreg (machine_mode outermode, rtx op,
++		      machine_mode innermode)
++{
++  auto byte = subreg_lowpart_offset (outermode, innermode);
++  return force_subreg (outermode, op, innermode, byte);
++}
++
+ /* If X is a memory ref, copy its contents to a new temp reg and return
+    that reg.  Otherwise, return X.  */
+ 
+diff --git a/gcc/explow.h b/gcc/explow.h
+index cbd1fcb7eb3..dd654649b06 100644
+--- a/gcc/explow.h
++++ b/gcc/explow.h
+@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
+ extern rtx force_reg (machine_mode, rtx);
+ 
+ extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
++extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
+ 
+ /* Return given rtx, copied into a new temp reg if it was in memory.  */
+ extern rtx force_not_mem (rtx);
+diff --git a/gcc/optabs.cc b/gcc/optabs.cc
+index ce91f94ed43..804c0dc73ba 100644
+--- a/gcc/optabs.cc
++++ b/gcc/optabs.cc
+@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
+   return 0;
+ }
+ 
+-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
+-   conditions, VAL may already be a SUBREG against which we cannot generate
+-   a further SUBREG.  In this case, we expect forcing the value into a
+-   register will work around the situation.  */
+-
+-static rtx
+-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
+-			   machine_mode imode)
+-{
+-  rtx ret;
+-  ret = lowpart_subreg (omode, val, imode);
+-  if (ret == NULL)
+-    {
+-      val = force_reg (imode, val);
+-      ret = lowpart_subreg (omode, val, imode);
+-      gcc_assert (ret != NULL);
+-    }
+-  return ret;
+-}
+-
+ /* Expand a floating point absolute value or negation operation via a
+    logical operation on the sign bit.  */
+ 
+@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
+ 			   gen_lowpart (imode, op0),
+ 			   immed_wide_int_const (mask, imode),
+ 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+ 
+       set_dst_reg_note (get_last_insn (), REG_EQUAL,
+ 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
+@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
+ 
+       temp = expand_binop (imode, ior_optab, op0, op1,
+ 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
+-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
++      target = force_lowpart_subreg (mode, temp, imode);
+     }
+ 
+   return target;
+-- 
+2.46.0
+

cross/gcc-x86_64/ppc64le-quadmath.patch

@@ -0,0 +1,56 @@
+Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=3fe5720430a9ba61ed7562aac4d758cc77d49a28
+--
+From 3fe5720430a9ba61ed7562aac4d758cc77d49a28 Mon Sep 17 00:00:00 2001
+From: Jakub Jelinek <jakub@redhat.com>
+Date: Sat, 3 Aug 2024 20:37:54 +0200
+Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in
+ some powerpc* configurations [PR116007]
+
+My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation.
+Unfortunately, that seems to fail building in some powerpc* configurations, where
+TFmode isn't available.
+quad.h has:
+ #ifndef TFtype
+ typedef float TFtype __attribute__ ((mode (TF)));
+ #endif
+and uses TFtype.  quad.h has:
+ /* Define the complex type corresponding to __float128
+    ("_Complex __float128" is not allowed) */
+ #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__)
+ typedef _Complex float __attribute__((mode(TC))) __complex128;
+ #else
+ typedef _Complex float __attribute__((mode(KC))) __complex128;
+ #endif
+with the conditional and KCmode use added during porting of libquadmath
+to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__
+isn't defined; I could define it to float __attribute__ ((mode (KF))) but it
+seemed easier to just define it to __float128 which should do the same thing.
+
+2024-08-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/116007
+	* math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__
+	define to __float128 before including soft-fp.h and quad.h.
+
+(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b)
+---
+ libquadmath/math/sqrtq.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c
+index 8ca2828d42ce..a58998a06670 100644
+--- a/libquadmath/math/sqrtq.c
++++ b/libquadmath/math/sqrtq.c
+@@ -9,6 +9,9 @@
+     && defined(FE_TOWARDZERO) \
+     && defined(FE_INEXACT)
+ #define USE_SOFT_FP 1
++#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__)
++#define TFtype __float128
++#endif
+ #include "../../libgcc/soft-fp/soft-fp.h"
+ #include "../../libgcc/soft-fp/quad.h"
+ #endif
+-- 
+2.43.5
+

cross/musl-aarch64/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=musl-aarch64
 pkgver=1.2.5
-pkgrel=1
+pkgrel=3
 arch="x86_64"
 subpackages="musl-dev-aarch64:package_dev"
 
@@ -57,6 +57,6 @@ package_dev() {
 }
 
 sha512sums="
-5ad546aca584d77f6fcf7d92bc5e6432d8c32b3db2922a4099423649e674b5c149464bd0048021e50b18398a00382bbeb6a0a598148bea4fa6d783f5c4c4445d  musl-1.2.5-r1-aarch64-edge.apk
-b6fed1441c0eacfea0061967915a876ce0af79b83511d9b05ae7e7cf489d88e36a544fa7f7512f390429d7d0217b672c04a83dfceea603ce0e86d2a47c50f4cc  musl-dev-1.2.5-r1-aarch64-edge.apk
+30c20d050028bbe9a2203a0db0bb1453d921ac381fc3a7dc2c79c535a7ac25ecf65d7ee367b17178a37aa0e26d028a860d03567e9662c6251171c53bf2562893  musl-1.2.5-r3-aarch64-edge.apk
+43ef19c8698e98eb473116e7c21dbb9e66d994bd1cd63837d0f0c43ceaf1ce4f1db582e48b22478574ef7fe4bc309aa7bb387af2f99d8d88bcecfaf7763ec82c  musl-dev-1.2.5-r3-aarch64-edge.apk
 "

cross/musl-armhf/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=musl-armhf
 pkgver=1.2.5
-pkgrel=1
+pkgrel=3
 arch="x86_64"
 subpackages="musl-dev-armhf:package_dev"
 
@@ -57,6 +57,6 @@ package_dev() {
 }
 
 sha512sums="
-148883dfd80bb670df4c6a919aaf3334d203a87fac98df8046a920a2e4c1c3439347f5653abc2994e9a9fe2946764395cd83e2f2437ab903e37f8ad3fcc6637a  musl-1.2.5-r1-armhf-edge.apk
-052f4f3ff6974aadbe90c1a69c4b29a1fefc25d2f2f794b3d55ed49b79a94dab900592a65b3c80ae9824580eab4fb99cb2cfdf9399354e74a1804871d97774a0  musl-dev-1.2.5-r1-armhf-edge.apk
+b98e17b30e5968ca8f6c963e8752544112337b641186c269dbc4dd4b0a9496de9f4a549deb1bbf03e419b145b86b0c48fd22db1b8dff188bd3b451632b8c2b3f  musl-1.2.5-r3-armhf-edge.apk
+0e9fa461b75f3a9832e26f8086c9397b9d5dbea9c5821cf7898c0ccf64281f603137265606ee97810cba988fdff967ea7ec240e4e59c1d87da7e001cd4bf719a  musl-dev-1.2.5-r3-armhf-edge.apk
 "

cross/musl-armv7/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=musl-armv7
 pkgver=1.2.5
-pkgrel=1
+pkgrel=3
 arch="x86_64"
 subpackages="musl-dev-armv7:package_dev"
 
@@ -57,6 +57,6 @@ package_dev() {
 }
 
 sha512sums="
-f3da7602184940c3ca4ddc973fd127fe08eb5e9141cf4c22cf49ccf131ef836b7f697f20dc64c7e18661f88779354c8b93c14521d18fb2e83d10638c3c8ed7d5  musl-1.2.5-r1-armv7-edge.apk
-b2678887dfc565691d92c1604137d984c5ce68f7c39c1ec2fd7200d4df4f818d4690c323f93b76ca1d4498a5dc36dff61959e06cc749099c706f85601d915d8e  musl-dev-1.2.5-r1-armv7-edge.apk
+05d888f66cb8bb75fcf767327068aff0152c32c97d6de680f7df0b9b11bbf99fefd8f2b7c1b92de8489e0f051d536e0d708faa3c5aaff783565e6c0e05d34c3b  musl-1.2.5-r3-armv7-edge.apk
+2c8775a37f2f7d5730857dcf7a7f038a1b0838a775a03e05ce299807f3608a112e95c61b776b32152434c27ee23b999915357b4e89e6559eb89e820666e36d97  musl-dev-1.2.5-r3-armv7-edge.apk
 "

cross/musl-riscv64/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=musl-riscv64
 pkgver=1.2.5
-pkgrel=1
+pkgrel=3
 arch="x86_64"
 subpackages="musl-dev-riscv64:package_dev"
 
@@ -57,6 +57,6 @@ package_dev() {
 }
 
 sha512sums="
-822f24faaf2285174742788da0dceef3bada4dbd0db9f67362876b3c0ab6bc647a0f2f0cc70e2e28dbb90121f08b65640a344e7cae8416a84bfb389db32e7d9c  musl-1.2.5-r1-riscv64-edge.apk
-04ac4a81d713f71b68082767ce2afab3ce458730664c140f49a0b33f257666a6b4289c5b53935fe16345f8445a458e5307511773651c4574526cfaaf232c239a  musl-dev-1.2.5-r1-riscv64-edge.apk
+d9adef7c000203504c357db8b84008f95f97fa68e3944103c345e0bc511f84bff7175ea1afd029de81dd2acce64795c55f100b7abfed3a5bad464c654e620ac3  musl-1.2.5-r3-riscv64-edge.apk
+51a20229c477c691429d2fb800ff441f0181e98879996c0fede94a39e37d66fd2bddd50f663c85090837b8cfaf41ed65c2d2142eaa0ce503b2c5bf6fd2d0194e  musl-dev-1.2.5-r3-riscv64-edge.apk
 "

cross/musl-x86/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=musl-x86
 pkgver=1.2.5
-pkgrel=1
+pkgrel=3
 arch="x86_64"
 subpackages="musl-dev-x86:package_dev"
 
@@ -57,6 +57,6 @@ package_dev() {
 }
 
 sha512sums="
-53a30a57f0db29e8d73d7190590fce18a19bcd358f9b0f3d4fa0b8821dad4ed5f1065c3c07dbc373a23cbd98c9a9dc1c2c2d864ac88eefd53dc5f89d8e57ed67  musl-1.2.5-r1-x86-edge.apk
-e9178fcfe27bdc7568c35889cff8cf20829f67460fd6dc22a6ca0465063a809081ee1267b4275432d23d1e7d457a4b207a0ff11c678233c4e430a1173d4ccea8  musl-dev-1.2.5-r1-x86-edge.apk
+68f290b5c1a8e8c1b5b70e34c4be391fa49fc8f91902a6dd432a3c34317788c69d5a31f9fedeec51a4d12509aee735d8875f0c4349d3d9cab1d9789a50a78bf8  musl-1.2.5-r3-x86-edge.apk
+2115a6da3ac624872a8e4d764aed69c0e729853d3b74643da83bef1083d20147de2f2f181df82d0bb273fad0597d37b719048bd66e23ed072982018ecf07b8fc  musl-dev-1.2.5-r3-x86-edge.apk
 "

cross/musl-x86_64/APKBUILD

@@ -8,7 +8,7 @@ fi
 
 pkgname=musl-x86_64
 pkgver=1.2.5
-pkgrel=1
+pkgrel=3
 arch="aarch64"
 subpackages="musl-dev-x86_64:package_dev"
 
@@ -57,6 +57,6 @@ package_dev() {
 }
 
 sha512sums="
-5506970c66b6da294d32961e94cadc6926a7405915a3d4dd519ed8c2aae829f2fbfaab2ccc8d0794f4aa102aa3e8cbd62099aa54668a11ac0c5072f59befece6  musl-1.2.5-r1-x86_64-edge.apk
-bd2602e59831ba860a548c8281bb62be3382b4035f18c9e36350be644db61a762a413e1d696697d402a57d4bc565faf86c2a212e27c9b9a890d765f794bbe829  musl-dev-1.2.5-r1-x86_64-edge.apk
+c4667bf824340766c2b6c41e88e4dc76a7e51b7247ece8f85e8e9347769fce6bd4459d94fcdc82ea12e0a67f7160d68cf2a1ed322eee7d6ca9d075036c17e193  musl-1.2.5-r3-x86_64-edge.apk
+a64220117e1614e585be89fcb00e387b4ea2f4251ce2b6af38c576787093b4ce6a0bed3e4d7bc86517369ee5c4f11db63c6f572e16f336a1178fa99dfa394aff  musl-dev-1.2.5-r3-x86_64-edge.apk
 "

device/.shared-patches/linux/fix-check-lxdialog-makefile.patch

@@ -0,0 +1,25 @@
+It seems that newer versions of GNU Make do not allow to use variables before
+defining it.
+
+diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
+index 844bc9da..911c6ba1 100644
+--- a/scripts/kconfig/Makefile
++++ b/scripts/kconfig/Makefile
+@@ -192,6 +192,8 @@ clean-files	+= zconf.tab.c zconf.lex.c zconf.hash.c gconf.glade.h
+ clean-files     += mconf qconf gconf nconf
+ clean-files     += config.pot linux.pot
+ 
++HOSTLOADLIBES_mconf   = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC))
++
+ # Check that we have the required ncurses stuff installed for lxdialog (menuconfig)
+ PHONY += $(obj)/dochecklxdialog
+ $(addprefix $(obj)/,$(lxdialog)): $(obj)/dochecklxdialog
+@@ -217,8 +219,6 @@ HOSTLOADLIBES_gconf	= `pkg-config --libs gtk+-2.0 gmodule-2.0 libglade-2.0`
+ HOSTCFLAGS_gconf.o	= `pkg-config --cflags gtk+-2.0 gmodule-2.0 libglade-2.0` \
+                           -Wno-missing-prototypes
+ 
+-HOSTLOADLIBES_mconf   = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC))
+-
+ HOSTLOADLIBES_nconf	= $(shell \
+ 				pkg-config --libs menu panel ncurses 2>/dev/null \
+ 				|| echo "-lmenu -lpanel -lncurses"  )

device/.shared-patches/linux/fix-check-lxdialog.patch

@@ -0,0 +1,15 @@
+Fix pre-ANSI C code in check-lxdialog.sh.
+
+diff --git a/scripts/kconfig/lxdialog/check-lxdialog.sh b/scripts/kconfig/lxdialog/check-lxdialog.sh
+index 9d2a4c58..364eaecb 100644
+--- a/scripts/kconfig/lxdialog/check-lxdialog.sh
++++ b/scripts/kconfig/lxdialog/check-lxdialog.sh
+@@ -43,7 +43,7 @@ trap "rm -f $tmp" 0 1 2 3 15
+ check() {
+         $cc -x c - -o $tmp 2>/dev/null <<'EOF'
+ #include CURSES_LOC
+-main() {}
++int main() { return 0; }
+ EOF
+ 	if [ $? != 0 ]; then
+ 	    echo " *** Unable to find the ncurses libraries or the"       1>&2

device/community/device-generic-x86_64/30-gpu-i915-firmware.files

@@ -0,0 +1,4 @@
+# Newer integrated and discrete Intel GPUs won't work without GUC fw,
+# and older GPUs need DMC firmware for lower power states, so let's
+# include everything:
+/lib/firmware/i915

device/community/device-generic-x86_64/APKBUILD

@@ -2,7 +2,7 @@
 # Co-Maintainer: Oliver Smith <ollieparanoid@postmarketos.org>
 pkgname=device-generic-x86_64
 pkgdesc="Generic x86_64 system, with EFI"
-pkgver=14
+pkgver=16
 pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
@@ -17,9 +17,11 @@ makedepends="devicepkg-dev"
 source="
 	deviceinfo
 	modules-initfs
+	30-gpu-i915-firmware.files
 "
 install="$pkgname.post-install $pkgname.post-upgrade"
 subpackages="
+	$pkgname-intel
 	$pkgname-kernel-edge:kernel_edge
 	$pkgname-kernel-lts:kernel_lts
 "
@@ -42,6 +44,14 @@ package() {
 	devicepkg_package $startdir $pkgname
 }
 
+intel() {
+	pkgdesc="Intel-specific configuration"
+	install_if="$pkgname=$pkgver-r$pkgrel oem-intel"
+
+	install -Dm644 "$srcdir"/30-gpu-i915-firmware.files \
+		-t "$subpkgdir"/usr/share/mkinitfs/files/
+}
+
 kernel_edge() {
 	pkgdesc="Alpine Edge kernel"
 	provides="device-tablet-x64uefi-kernel-edge=$pkgver-r$pkgrel device-tablet-x86uefi-kernel-edge=$pkgver-r$pkgrel"
@@ -61,4 +71,5 @@ kernel_lts() {
 sha512sums="
 e9dfcd70ccfb9a0fdaa0cdc52faf3be96d6de8af8c60a758bb703c515b0648cec4552e0eaf56e5168b0004cd3fc4b28118abb05dad2c581d3579a2e9134862cb  deviceinfo
 e464ef0ad4a4c34d2d53f69c4612b612ea878a77c9efdef69b0f842edf701036c8218809fd63aac286d6a08ae07f39e568199fc3e38d145e716c1723e7215019  modules-initfs
+9599a10679a43929e4ed2ea22269a0716219163817574d48db4dc1cb21a0fcf17ea54d77d5fd8efd034905c421ecb3eaa600a72927d683983ce48d1159329881  30-gpu-i915-firmware.files
 "

device/community/device-google-gru/APKBUILD

@@ -2,7 +2,7 @@
 # Maintainer: Jenneron <jenneron@protonmail.com>
 pkgname=device-google-gru
 pkgdesc="Google Gru Chromebooks"
-pkgver=6
+pkgver=7
 pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
@@ -53,6 +53,6 @@ nonfree_firmware() {
 
 
 sha512sums="
-6a8aba7e13f864a223a658f724ad8ff6c04ed986a747439cf88a6365c5fa037da9fb4950fa94794eff64937979f988015af9d0a6359deb041d1a2b128baac75e  deviceinfo
+7815e3a164720b5ad0df7ce8d12b12fe85cc4bb7bf4a09ccc0eb831a58a920026fd92d545f4d6fb459a688e15b9d542e360fd597cd5d3b01a3ea338c3928d2a3  deviceinfo
 a750a0c41068082e0b82351d5aec91715e1a5215b09b26fec644dfe259cea2d662e878433a732a8c06dab2a9b420baec2bcc6161d8357cf3ed770239c5165090  modules-initfs
 "

device/community/device-google-gru/deviceinfo

@@ -25,5 +25,6 @@ deviceinfo_cgpt_kpart="/boot/vmlinuz.kpart"
 deviceinfo_cgpt_kpart_start="8192"
 deviceinfo_cgpt_kpart_size="65536"
 deviceinfo_depthcharge_board="gru"
+deviceinfo_depthcharge_compression="lzma"
 deviceinfo_generate_depthcharge_image="true"
 deviceinfo_generate_extlinux_config="true"

device/community/device-google-kukui/APKBUILD

@@ -2,7 +2,7 @@
 # Maintainer: Jenneron <jenneron@protonmail.com>
 pkgname=device-google-kukui
 pkgdesc="Google Kukui Chromebooks"
-pkgver=7
+pkgver=8
 pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
@@ -14,7 +14,6 @@ depends="
 	linux-postmarketos-mediatek-mt8183>=6.1.28-r0
 	postmarketos-base
 	postmarketos-cros-common
-	postmarketos-initramfs-minimal
 	soc-mediatek-mt8183
 "
 makedepends="devicepkg-dev"
@@ -74,6 +73,6 @@ nonfree_firmware() {
 }
 
 sha512sums="
-e1c88545563aa40b69f79ed1d86b4da0d7ad65dfff07dce05f56d51b442ad9bae27ae2d27afa2f5131309072a9ea4f3b026d498ab067b315ed0719a3dded4b2c  deviceinfo
+ecd503069ecf272ddc238bd49dc257a1f3e0f4c20b322238e2da83104b94b331c22886d1591b6fe0b78c986e15ac6251e364ec1b750f9125ea722a6b1a79e2b8  deviceinfo
 8e95624610dae7d18684056396c9e82635ddce7303d6770e965f9372ffa101fdfd5f8337bc7368004890e9836798663a98c142c52ed63795877ea37ac8da56af  modules-initfs
 "

device/community/device-google-kukui/deviceinfo

@@ -32,4 +32,5 @@ deviceinfo_cgpt_kpart_size="65536"
 # dtbs from deviceinfo_dtb variable and nothing more, so use "mt8183"
 # board here.
 deviceinfo_depthcharge_board="mt8183"
+deviceinfo_depthcharge_compression="lzma"
 deviceinfo_generate_depthcharge_image="true"

device/community/device-google-oak/APKBUILD

@@ -3,7 +3,7 @@
 # Co-Maintainer: Jenneron <jenneron@protonmail.com>
 pkgname=device-google-oak
 pkgdesc="Google Oak Chromebooks"
-pkgver=5
+pkgver=6
 pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
@@ -40,6 +40,6 @@ nonfree_firmware() {
 }
 
 sha512sums="
-ebf7ed07ffcfe30c01c717db00c255e2c650339bace70afffcac4566267da8b6d3e22f819601be2ee355d2c1f56b01e37fca5566a2517fc1ffb642e530b674fb  deviceinfo
+d082e6c155347f662403f611f44c3eddb2a0548397bec4f29b882f371a18efa9c2628a88599b19c0c58c1886d0c25035367f02651a60fb6c3293faa1449b83d5  deviceinfo
 4b0197eacfeeb4b13f5abc26950f570ee762742547674ce10110ccea63eb46630a2e3b5f87e9c9a1f9deda21baf05bec248ab7a65656687ec94d296b5657dafa  modules-initfs
 "

device/community/device-google-oak/deviceinfo

@@ -33,4 +33,5 @@ deviceinfo_cgpt_kpart_size="65536"
 # dtbs from deviceinfo_dtb variable and nothing more, so use "mt8173"
 # board here.
 deviceinfo_depthcharge_board="mt8173"
+deviceinfo_depthcharge_compression="lzma"
 deviceinfo_generate_depthcharge_image="true"

device/community/device-google-sargo/APKBUILD

@@ -3,7 +3,7 @@
 pkgname=device-google-sargo
 pkgdesc="Google Pixel 3a"
 pkgver=6
-pkgrel=0
+pkgrel=2
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"

device/community/device-google-trogdor/APKBUILD

@@ -2,7 +2,7 @@
 # Maintainer: Jenneron <jenneron@protonmail.com>
 pkgname=device-google-trogdor
 pkgdesc="Google Trogdor Chromebooks"
-pkgver=2
+pkgver=3
 pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
@@ -44,6 +44,6 @@ nonfree_firmware() {
 
 
 sha512sums="
-e2eee558c89272358b4531ef9d7b7cefc937702c17985c3067181029a7f2c8545f68c3634d515fee6d12229d09f52b6f2b4ae804449f37c11b3aa9e5bcfaaced  deviceinfo
+0a40c43eda1dbb159da59c00b3a1e51fff299a29add210de4d9a16c060da523c358b6d821aa1dd16523bb912d00e1a1837193cce52415f329ac2e171d220f6d3  deviceinfo
 ef0257928f28aff25e6c625fabfd0942b01d4d86f1b523212ca825cf80f8b7a6c20ff17bfb02cb19f2a5d8787326ba22ad560a957c8d3c38b9ec70f1e16f9117  modules-initfs
 "

device/community/device-google-trogdor/deviceinfo

@@ -33,4 +33,5 @@ deviceinfo_cgpt_kpart_size="262144"
 # dtbs from deviceinfo_dtb variable and nothing more, so use "qc7180"
 # board here.
 deviceinfo_depthcharge_board="qc7180"
+deviceinfo_depthcharge_compression="lzma"
 deviceinfo_generate_depthcharge_image="true"

device/community/device-lenovo-21bx/APKBUILD

@@ -5,7 +5,7 @@
 pkgname=device-lenovo-21bx
 pkgdesc="Lenovo ThinkPad X13s"
 pkgver=10
-pkgrel=0
+pkgrel=1
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
@@ -18,8 +18,6 @@ depends="
 	linux-firmware-qca
 	linux-firmware-qcom
 	linux-lenovo-21bx
-	pd-mapper
-	pd-mapper-openrc
 	postmarketos-base
 	qmi-utils
 	systemd-boot
@@ -36,7 +34,6 @@ subpackages="
 	$pkgname-usbguard
 	$pkgname-vulkan
 "
-install="$pkgname.post-install"
 
 build() {
 	devicepkg_build $startdir $pkgname

device/community/device-lenovo-21bx/device-lenovo-21bx.post-install

@@ -1,3 +0,0 @@
-#!/bin/sh -e
-
-rc-update add -q pd-mapper boot

device/community/device-nokia-n900/APKBUILD

@@ -2,7 +2,7 @@
 # Maintainer: Sicelo <absicsz@gmail.com>
 # Co-Maintainer: Danct12 <danct12@disroot.org>
 pkgname=device-nokia-n900
-pkgver=28
+pkgver=29
 pkgrel=0
 pkgdesc="Nokia N900"
 url="https://postmarketos.org"
@@ -238,7 +238,7 @@ e440ed7a3070c17e003b86b72dbe6d8194d01b577ca8dd56dd066f216b6dda32bb965c780950f178
 134f51d20decc0c63ab08010931a0b410b70d2f85bf6899f2ff137b1680f59f706a6287d01f5fbb41fa5309125df75a430d0783149bd1a6a1bca07d22f4f6a21  proxishot.sh
 fc21e3b7e045055c080a7f7ffb0cd4140b63a02690e92c8370dbccbef506fe271ee9584ac9f14725b8bc9fd6e74e7fafde589d2360f44491c614837472d8ad53  deviceprofile.sh
 5dab895c34599bf233635463271ea8308d434c97789efe931eec24870c3b4688fe48ca3b7cdc66e5c1a705940d042b9f18f26420b60f22e1cfad1854e97f8687  start_hook.sh
-7bd9dd2468ba6a0fc8e5e7118ecfc4b4ca2f0691190473e12770a857e4082ab2958d0a3a8ee2f0276ed83776aff3b5fff0099980c265d674b90d2ff3108f660d  uboot-script.cmd
+42f916d87dd305111028992a1107bf6fe108bebbd782ae8edd065e76505db2b3a75e57515970c3e40cb0d1b7e83097a1bba92785be13df7c3fd80959a8d9c5c1  uboot-script.cmd
 9e72035c88632d12895534e5aa5746f2c130c7dcdafa8702748d62b71ed0e1b5911b6e1f07f9b9e39b6072bbb662f66aead585baa1dcacb7d8c8953ca89b6762  10-nokia-modem.rules
 03079030237440080e833dbfeff80327c1ad6a8129c6c730b401a3052cd00a986783ec3473a526b14ae73ba1f20653b4c7b2a6590839bfe6cc156bbbc3b7bb74  80-feedbackd-twl4030.rules
 c6012aef28b096141b924fced226ec99fb93eb53b69c064a8887d8fecdf8dc08a3ba3db399e18d88374c6ef4c59013a30699c7e4d76e5cb771040582573a0527  90-touchscreen-dev.rules

device/community/device-nokia-n900/uboot-script.cmd

@@ -2,7 +2,7 @@ setenv mmcnum 0
 setenv mmcpart 1
 setenv mmctype ext2
 setenv setup_omap_atag 1
-setenv bootargs init=/init.sh rw console=tty0 console=ttyS2 PMOS_FORCE_PARTITION_RESIZE
+setenv bootargs init=/init.sh rw console=tty0 PMOS_FORCE_PARTITION_RESIZE
 setenv mmckernfile /uImage
 setenv mmcinitrdfile /uInitrd
 setenv mmcscriptfile

device/community/device-oneplus-enchilada/APKBUILD

@@ -4,7 +4,7 @@
 pkgname=device-oneplus-enchilada
 pkgdesc="OnePlus 6"
 pkgver=14
-pkgrel=0
+pkgrel=2
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
@@ -26,7 +26,11 @@ source="
 	q6voiced.conf
 	81-libssc-oneplus-enchilada.rules
 "
-subpackages="$pkgname-nonfree-firmware:nonfree_firmware $pkgname-pmtest"
+subpackages="
+	$pkgname-nonfree-firmware-openrc:nonfree_firmware_openrc
+	$pkgname-nonfree-firmware:nonfree_firmware
+	$pkgname-pmtest
+"
 
 build() {
 	devicepkg_build $startdir $pkgname
@@ -47,12 +51,16 @@ nonfree_firmware() {
 		soc-qcom-sdm845-nonfree-firmware
 		soc-qcom-sdm845-modem
 	"
+
+	install -Dm644 "$srcdir"/81-libssc-oneplus-enchilada.rules -t "$subpkgdir"/usr/lib/udev/rules.d/
+}
+
+nonfree_firmware_openrc() {
+	install_if="$pkgname-nonfree-firmware=$pkgver-r$pkgrel openrc"
 	replaces="hexagonrpcd-openrc"
 	install="$subpkgname.post-install $subpkgname.post-upgrade"
-	mkdir "$subpkgdir"
 
 	install -Dm644 q6voiced.conf "$subpkgdir"/etc/conf.d/q6voiced
-	install -Dm644 "$srcdir"/81-libssc-oneplus-enchilada.rules -t "$subpkgdir"/usr/lib/udev/rules.d/
 	install -Dm644 "$srcdir"/hexagonrpcd.confd "$subpkgdir"/etc/conf.d/hexagonrpcd-sdsp
 }
 

device/community/device-oneplus-enchilada/device-oneplus-enchilada-nonfree-firmware-openrc.post-upgrade

@@ -0,0 +1 @@
+device-oneplus-enchilada-nonfree-firmware-openrc.post-install

device/community/device-oneplus-enchilada/device-oneplus-enchilada-nonfree-firmware.post-upgrade

@@ -1 +0,0 @@
-device-oneplus-enchilada-nonfree-firmware.post-install

device/community/device-shift-axolotl/APKBUILD

@@ -5,7 +5,7 @@
 pkgname=device-shift-axolotl
 pkgdesc="SHIFT6mq"
 pkgver=15
-pkgrel=0
+pkgrel=1
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
@@ -30,6 +30,7 @@ source="
 "
 subpackages="
 	$pkgname-nonfree-firmware:nonfree_firmware
+	$pkgname-nonfree-firmware-openrc:nonfree_firmware_openrc
 	$pkgname-pmtest
 "
 
@@ -49,12 +50,16 @@ nonfree_firmware() {
 		soc-qcom-sdm845-nonfree-firmware
 		soc-qcom-sdm845-modem
 	"
+
+	install -Dm644 "$srcdir"/81-libssc-shift-axolotl.rules -t "$subpkgdir"/usr/lib/udev/rules.d/
+}
+
+nonfree_firmware_openrc() {
+	install_if="$pkgname-nonfree-firmware=$pkgver-r$pkgrel openrc"
 	replaces="hexagonrpcd-openrc"
 	install="$subpkgname.post-install $subpkgname.post-upgrade"
-	mkdir "$subpkgdir"
 
 	install -Dm644 q6voiced.conf "$subpkgdir"/etc/conf.d/q6voiced
-	install -Dm644 "$srcdir"/81-libssc-shift-axolotl.rules -t "$subpkgdir"/usr/lib/udev/rules.d/
 	install -Dm644 "$srcdir"/hexagonrpcd.confd "$subpkgdir"/etc/conf.d/hexagonrpcd-sdsp
 }
 

device/community/device-shift-axolotl/device-shift-axolotl-nonfree-firmware-openrc.post-upgrade

@@ -0,0 +1 @@
+device-shift-axolotl-nonfree-firmware-openrc.post-install

device/community/device-shift-axolotl/device-shift-axolotl-nonfree-firmware.post-upgrade

@@ -1 +0,0 @@
-device-shift-axolotl-nonfree-firmware.post-install

device/community/device-xiaomi-daisy/APKBUILD

@@ -2,8 +2,8 @@
 # Reference: <https://postmarketos.org/devicepkg>
 pkgname=device-xiaomi-daisy
 pkgdesc="Xiaomi Mi A2 Lite"
-pkgver=11
-pkgrel=3
+pkgver=12
+pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
@@ -43,7 +43,7 @@ fake_goodix() {
 }
 
 sha512sums="
-327d6b49c6bc26725ed566ee968220cd7bbd5c8fd31b91705b6a02635daf5ce02567ba493a5bd431e0438339e004d42c7f4a57d4ed683274b94dc78668771d8d  deviceinfo
+a958e29c8ba4c079ee64a9882fe14ad03e7751ba4c2416a4bda07b0ee4e0342d5d6e3d43c95b05f47dabe06ff5be759401287da3c58ef0ecb31c8cba515cd560  deviceinfo
 7202f0a55dfe43348940412fc38e59c855594b070db8742419feadb2299086d5810107201a228b7137b7cc7a97c94afac95d81c0cd65c52f31dbcb619b0a4279  modules-initfs
 a2608b01b7b6e2dade694af355ff4f0f26cad49cf54bc332c77eb75d19fdc985f7f996fedb72753de447be0391deabf5fcea52406791d1e6e0d165703b63f145  90-device-xiaomi-daisy.rules
 "

device/community/device-xiaomi-daisy/deviceinfo

@@ -25,7 +25,6 @@ deviceinfo_swap_size_recommended="1024"
 deviceinfo_flash_method="fastboot"
 deviceinfo_generate_bootimg="true"
 deviceinfo_generate_extlinux_config="true"
-deviceinfo_kernel_cmdline="earlycon console=ttyMSM0,115200"
 deviceinfo_bootimg_qcdt="false"
 deviceinfo_bootimg_dtb_second="false"
 deviceinfo_flash_offset_base="0x80000000"

device/community/device-xiaomi-markw/APKBUILD

@@ -2,8 +2,8 @@
 # Reference: <https://postmarketos.org/devicepkg>
 pkgname=device-xiaomi-markw
 pkgdesc="Xiaomi Redmi 4 Prime"
-pkgver=6
-pkgrel=2
+pkgver=7
+pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
@@ -31,6 +31,6 @@ package() {
 }
 
 sha512sums="
-dd33fe1f043da42f935a66b2d7bcf909bb65b737289574018917f3a5bb385f826c5ff441a808e442957ff9d3fdd1391e7f6381720c55062adcdc404d40754c1c  deviceinfo
+d5ecef8983110624e0cd69feed5f105204f8323e718435b19ffafa37cbe73d1c37a4d1d1cfb53d338dfeffa91ade137b3cf7c7b9f48408002c04260bbd3b5e65  deviceinfo
 0cba88d7ede62dc7c47feefb27d10e58e4c93498bec97cd274a1d10c4f16dff06c5472ed555170e0392a57c9269cc50bf550523f41bf1ba6c600af533302574b  modules-initfs
 "

device/community/device-xiaomi-markw/deviceinfo

@@ -17,11 +17,9 @@ deviceinfo_keyboard="false"
 deviceinfo_external_storage="true"
 deviceinfo_screen_width="1080"
 deviceinfo_screen_height="1920"
-deviceinfo_getty="ttyMSM0;115200"
 
 # Bootloader related
 deviceinfo_flash_method="fastboot"
-deviceinfo_kernel_cmdline="earlycon console=ttyMSM0,115200"
 deviceinfo_generate_bootimg="true"
 deviceinfo_generate_extlinux_config="true"
 deviceinfo_flash_offset_base="0x80000000"

device/community/device-xiaomi-mido/APKBUILD

@@ -1,8 +1,8 @@
 # Maintainer: Barnabas Czeman <trabarni@gmail.com>
 pkgname=device-xiaomi-mido
 pkgdesc="Xiaomi Redmi Note 4X"
-pkgver=7
-pkgrel=2
+pkgver=8
+pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
@@ -30,6 +30,6 @@ package() {
 }
 
 sha512sums="
-22dd70e5730b46bfdb257eb5e577da2d91d72d0335e2f591af66dfb318169ccdf813d800c2c7adb12cbf8063fc35bb33519577cc33b6322104cd52f75e035e99  deviceinfo
+3424c103cc2878480527f57d75e122cfc5c95ffa66bf7133067dd691e664fee14ba43a626f70c5b2ffb70cd24a08b026e0571e99e390c0a485a3491e28883cda  deviceinfo
 9f534c76689728c3fa699ac8c854ca82815d5158a3675a70ef879ddbf140460977187dc3c1a799dadd0ab53d5a08b6275a1594a7b976eda983f3e78b2738a8be  modules-initfs
 "

device/community/device-xiaomi-mido/deviceinfo

@@ -17,11 +17,9 @@ deviceinfo_keyboard="false"
 deviceinfo_external_storage="true"
 deviceinfo_screen_width="1080"
 deviceinfo_screen_height="1920"
-deviceinfo_getty="ttyMSM0;115200"
 
 # Bootloader related
 deviceinfo_flash_method="fastboot"
-deviceinfo_kernel_cmdline="earlycon console=ttyMSM0,115200"
 deviceinfo_generate_bootimg="true"
 deviceinfo_generate_extlinux_config="true"
 deviceinfo_bootimg_qcdt="false"

device/community/device-xiaomi-scorpio/APKBUILD

@@ -4,7 +4,7 @@
 pkgname=device-xiaomi-scorpio
 pkgdesc="Xiaomi Mi Note 2"
 pkgver=3
-pkgrel=12
+pkgrel=13
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
@@ -12,6 +12,7 @@ options="!check !archcheck"
 depends="
 	linux-postmarketos-qcom-msm8996
 	mesa-egl
+	megapixels
 	mkbootimg
 	postmarketos-base
 	soc-qcom-msm8996
@@ -19,7 +20,6 @@ depends="
 	"
 makedepends="devicepkg-dev"
 subpackages="
-	$pkgname-camera
 	$pkgname-phosh
 	$pkgname-nonfree-firmware:nonfree_firmware
 	"
@@ -68,11 +68,6 @@ phosh() {
 		"$subpkgdir"/etc/phosh/phoc.ini
 }
 
-camera() {
-	install_if="$pkgname=$pkgver-r$pkgrel postmarketos-default-camera"
-	depends="megapixels"
-	mkdir -p "$subpkgdir"
-}
 
 sha512sums="
 b033e7357c4ef91ba84f6f715e96e67637c2631d4746402f8a92333ba8974bbee7736a7bc081b0f84a84dc5b555a7db4dbb4f14f628bbfc42cbfa501c4f0ed36  30-gpu-firmware.files