main/debugcc: new aport

Signed-off-by: Caleb Connolly <caleb@connolly.tech>
2024-01-22 19:56:16 +00:00
2365 changed files with 31175 additions and 231198 deletions
@@ -1,111 +0,0 @@
-#!/bin/sh -e
-# Description: update a list of packages
-# Options: native slow
-# https://postmarketos.org/pmb-ci
-
-if [ "$(id -u)" = 0 ]; then
-	set -x
-	apk add git openssh-keygen grep curl
-	wget "https://gitlab.com/postmarketOS/ci-common/-/raw/master/install_pmbootstrap.sh"
-	sh ./install_pmbootstrap.sh
-	exec su "${TESTUSER:-pmos}" -c "sh -e $0 $*"
-fi
-
-git config --global --add safe.directory "$CI_PROJECT_DIR"
-git config --global user.name "postmarketOS CI"
-# pmaports
-# The email address is the username of the bot (from the GitLab group members page) @noreply.gitlab.com
-git config --global user.email "project_8065375_bot_13cf44ca4cd2c938688af6e3d500d9cb@noreply.gitlab.com"
-
-# For testing with pmaports-autoupdate-test repo
-# git config --global user.email "project_58002231_bot_be2d4e9e7aba929855726aafe12940d6@noreply.gitlab.com"
-
-# Configure SSH key for signing
-mkdir -p ~/.ssh
-cp "$PMAPORTS_SSH_KEY" ~/.ssh/pmaports
-chmod 600 ~/.ssh/pmaports
-# Generate public key from private
-ssh-keygen -t ecdsa -f ~/.ssh/pmaports -y > ~/.ssh/pmaports.pub
-
-git config --global gpg.format ssh
-git config --global user.signingkey ~/.ssh/pmaports.pub
-
-export PYTHONUNBUFFERED=1
-
-PKGS="$1"
-if [ -z "$PKGS" ]; then
-	echo "Usage: $0 <packages>"
-	exit 1
-fi
-echo "Checking for new versions of packages: $PKGS"
-
-update_linux_next() {
-	# Check for the latest -next tag
-	local latest
-	local pkgver
-	local new_pkgver
-
-	# Get the current version
-	# shellcheck source=/dev/null
-	pkgver=$(. device/testing/linux-next/APKBUILD; echo "$pkgver")
-
-	curl -s "https://gitlab.com/linux-kernel/linux-next/-/tags?format=atom" | grep -oP "(?<=<title>)[^<]+" | tail -n +2 > /tmp/tags
-
-	latest=$(grep -v "v" < /tmp/tags | head -n1)
-	if [ -z "$latest" ]; then
-		echo "Failed to get the latest -next tag"
-		exit 1
-	fi
-	echo "Latest -next tag: $latest"
-
-	new_pkgver=$(grep "v" < /tmp/tags | head -n1)
-	if [ -z "$new_pkgver" ]; then
-		echo "Failed to get the latest mainline tag from atom feed, reusing current pkgver"
-		new_pkgver="${pkgver%_git*}"
-	else
-		echo "Latest mainline tag: $new_pkgver"
-		# new_pkgver is like 'v6.9-rc1' but we want '6.9'
-		new_pkgver=$(echo "$new_pkgver" | sed -e 's/^v//' -e 's/-.*//')
-	fi
-
-	new_pkgver="${new_pkgver}_git${latest#*-}"
-
-	if [ "$pkgver" = "$new_pkgver" ]; then
-		echo "No new version of linux-next"
-		exit 0
-	fi
-
-	echo "Updating linux-next from $pkgver to $new_pkgver..."
-	sed -i -e "s/pkgver=$pkgver/pkgver=$new_pkgver/" device/testing/linux-next/APKBUILD
-
-	# Update the checksums
-	pmbootstrap checksum linux-next
-
-	# Ensure it builds
-	pmbootstrap --details-to-stdout build linux-next
-
-	# Commit
-	git add device/testing/linux-next/APKBUILD
-	git commit -S -m "linux-next: upgrade to $latest"
-}
-
-# For testing
-#git remote add gitlab https://pmos-ci:"$PMAPORTS_PUSH_TOKEN"@gitlab.com/postmarketOS/pmaports-autoupdate-test.git
-
-git remote add gitlab https://pmos-ci:"$PMAPORTS_PUSH_TOKEN"@gitlab.com/postmarketOS/pmaports.git
-git fetch gitlab
-git checkout --track gitlab/master
-
-for pkg in $PKGS; do
-	case "$pkg" in
-		linux-next)
-			update_linux_next
-			;;
-		*)
-			echo "Unknown package: $pkg"
-			exit 1
-			;;
-	esac
-done
-
-git push
@@ -4,11 +4,11 @@

 if [ "$(id -u)" = 0 ]; then
 	set -x
-	apk -q add ruff
+	apk -q add py3-flake8
 	exec su "${TESTUSER:-build}" -c "sh -e $0"
 fi

 set -x

 # shellcheck disable=SC2046
-ruff check --ignore E501,F401,E722,W605 $(find .ci -name '*.py')
+flake8 --ignore E501,F401,E722,W504,W605 $(find .ci -name '*.py')
@@ -2,8 +2,6 @@
 # Description: check various bad patterns with grep
 # https://postmarketos.org/pmb-ci

-exit_code=0
-
 if [ "$(id -u)" = 0 ]; then
 	set -x
 	apk -q add grep
@@ -14,7 +12,7 @@ fi
 if grep -qr '(CHANGEME!)' -- *; then
 	echo "ERROR: Please replace '(CHANGEME!)' in the following files:"
 	grep --color=always -r '(CHANGEME!)' -- *
-	exit_code=1
+	exit 1
 fi

 # DTBs installed to /usr/share/db
@@ -25,7 +23,7 @@ if grep -qr 'INSTALL_DTBS_PATH="$pkgdir"/usr/share/dtb' device/; then
 	echo 'ERROR: Files that need fixing:'
 	# shellcheck disable=SC2016
 	grep --color=always -r 'INSTALL_DTBS_PATH="$pkgdir"/usr/share/dtb' device/
-	exit_code=1
+	exit 1
 fi


@@ -33,58 +31,24 @@ fi
 if grep -qr '/etc/postmarketos-mkinitfs' -- *; then
 	echo "ERROR: Please replace '/etc/postmarketos-mkinitfs' with '/usr/share/mkinitfs' in the following files:"
 	grep --color=always -r '/etc/postmarketos-mkinitfs' -- *
-	exit_code=1
+	exit 1
 fi
 if grep -qr '/usr/share/postmarketos-mkinitfs' -- *; then
 	echo "ERROR: Please replace '/usr/share/postmarketos-mkinitfs' with '/usr/share/mkinitfs' in the following files:"
 	grep --color=always -r '/usr/share/postmarketos-mkinitfs' -- *
-	exit_code=1
+	exit 1
 fi

 # Direct sourcing of deviceinfo
 if grep --exclude='source_deviceinfo' -qEr 'source /etc/deviceinfo|\. /etc/deviceinfo' -- *; then
 	echo 'ERROR: Please source the source_deviceinfo script instead of sourcing deviceinfo directly!'
 	grep --color=always --exclude='rootfs-usr-share-misc-source_deviceinfo' -Er 'source /etc/deviceinfo|\. /etc/deviceinfo' -- *
-	exit_code=1
+	exit 1
 fi

 # Removed deviceinfo variable
 if grep -qr 'deviceinfo_modules_initfs' -- *; then
 	echo 'ERROR: deviceinfo_modules_initfs variable has been removed. Use "modules-initfs" file instead.'
 	grep --color=always -r 'deviceinfo_modules_initfs' -- *
-	exit_code=1
+	exit 1
 fi
-
-POSTMARKETOS_WALLPAPER_PATH='/usr/share/wallpapers/postmarketos.jpg'
-# The excluded devices are "grandfathered in". New devices should not be added here.
-# See https://gitlab.com/postmarketOS/pmaports/-/issues/2529
-if grep -qr $POSTMARKETOS_WALLPAPER_PATH \
-	--exclude-dir='device-pine64-pinetab' \
-	--exclude-dir='device-oneplus-kebab' \
-	--exclude-dir='device-xiaomi-willow' \
-	-- device; then
-	echo "ERROR: Please don't include configuration files that set the default wallpaper in device-specific packages!"
-	grep --color=always -r $POSTMARKETOS_WALLPAPER_PATH \
-		--exclude-dir='device-pine64-pinetab' \
-		--exclude-dir='device-oneplus-kebab' \
-		--exclude-dir='device-xiaomi-willow' \
-		-- device
-	exit_code=1
-fi
-
-OPENRC_SERVICE_FILES=$(find . -name '*.initd')
-# shellcheck disable=SC2086
-if grep -q 'before wpa_supplicant' $OPENRC_SERVICE_FILES; then
-	echo "ERROR: Please use 'before wlan' in OpenRC service files! This ensures compatibility with both wpa_supplicant and iwd."
-	grep --color=always 'before wpa_supplicant' $OPENRC_SERVICE_FILES
-	exit_code=1
-fi
-
-if grep -qEr 'PMOS_NO_OUTPUT_REDIRECT' -- *; then
-	echo "ERROR: PMOS_NO_OUTPUT_REDIRECT is deprecated and doesn't do anything."
-	echo "Please remove it from the following files:"
-	grep --color=always -Er 'PMOS_NO_OUTPUT_REDIRECT' -- *
-	exit_code=1
-fi
-
-exit "$exit_code"
@@ -6,7 +6,6 @@

 if [ "$(id -u)" = 0 ]; then
 	set -x
-	export PMBOOTSTRAP_TAG=master
 	wget "https://gitlab.com/postmarketOS/ci-common/-/raw/master/install_pmbootstrap.sh"
 	sh ./install_pmbootstrap.sh
 	exec su "${TESTUSER:-pmos}" -c "sh -e $0"
@@ -2,7 +2,6 @@
 # Copyright 2021 Oliver Smith
 # SPDX-License-Identifier: GPL-3.0-or-later
 import sys
-import pathlib

 # Same dir
 import common
@@ -12,7 +11,6 @@ import add_pmbootstrap_to_import_path
 import pmb.parse
 import pmb.parse._apkbuild
 import pmb.helpers.pmaports
-from pmb.core.context import get_context


 def build_strict(packages, arch):
@@ -61,16 +59,15 @@ if __name__ == "__main__":
        verify_checksums(packages, arch)
        sys.exit(0)

-    # Load context
-    sys.argv = ["pmbootstrap.py", "chroot"]
+    # Prepare "args" to use pmbootstrap code
+    sys.argv = ["pmbootstrap", "chroot"]
    args = pmb.parse.arguments()
-    context = get_context()

    # Filter out packages that can't be built for given arch
    # (Iterate over copy of packages, because we modify it in this loop)
    for package in packages.copy():
-        apkbuild_path = pmb.helpers.pmaports.find(package)
-        apkbuild = pmb.parse._apkbuild.apkbuild(pathlib.Path(apkbuild_path, "APKBUILD"))
+        apkbuild_path = pmb.helpers.pmaports.find(args, package)
+        apkbuild = pmb.parse._apkbuild.apkbuild(f"{apkbuild_path}/APKBUILD")

        if not pmb.helpers.pmaports.check_arches(apkbuild["arch"], arch):
            print(f"{package}: not enabled for {arch}, skipping")
@@ -3,7 +3,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later

 import glob
-import pathlib
 import tempfile
 import sys
 import subprocess
@@ -16,9 +15,9 @@ import add_pmbootstrap_to_import_path  # noqa
 import pmb.parse
 import pmb.parse.version
 import pmb.helpers.logging
-from pmb.core.context import get_context

-def get_package_contents(package, revision, check=True):
+
+def get_package_version(args, package, revision, check=True):
    # Redirect stderr to /dev/null, so git doesn't complain about files not
    # existing in upstream branch for new packages
    stderr = None
@@ -39,18 +38,8 @@ def get_package_contents(package, revision, check=True):
    with tempfile.TemporaryDirectory() as tempdir:
        with open(tempdir + "/APKBUILD", "w", encoding="utf-8") as handle:
            handle.write(apkbuild_content)
-        parsed = pmb.parse.apkbuild(pathlib.Path(tempdir, "APKBUILD"),
-                                    False, False)
+        parsed = pmb.parse.apkbuild(tempdir + "/APKBUILD", False, False)

-    return parsed
-
-
-def get_package_version(package, revision, check=True):
-    """ returns version in the format "{pkgver}-r{pkgrel}", or None if no 
-        matching package is found """
-    parsed = get_package_contents(package, revision, check)
-    if parsed is None:
-        return None
    return parsed["pkgver"] + "-r" + parsed["pkgrel"]


@@ -94,7 +83,7 @@ def exit_with_error_message():
    exit(1)


-def check_versions(packages):
+def check_versions(args, packages):
    error = False

    # Get relevant commits: compare HEAD against upstream branch or HEAD~1
@@ -113,8 +102,8 @@ def check_versions(packages):

    for package in packages:
        # Get versions, skip new packages
-        head = get_package_version(package, "HEAD")
-        upstream = get_package_version(package, commit, False)
+        head = get_package_version(args, package, "HEAD")
+        upstream = get_package_version(args, package, commit, False)
        if not upstream:
            if head.rpartition('r')[2] != "0":
                print(f"- {package}: {head} (HEAD) (new package) [ERROR]")
@@ -123,40 +112,6 @@ def check_versions(packages):
                print(f"- {package}: {head} (HEAD) (new package)")
            continue

-        # Check pkgver follows expected format for device packages
-        pkgver = head.rpartition('-r')[0]
-        if package.startswith('device-') and not pkgver.isdigit():
-            print(f" - {package}: invalid pkgver \"{pkgver}\""
-                  "See: https://wiki.postmarketos.org/wiki/Packaging#device_packages_and_other_packages_without_sources")
-            error = True
-
-        # Additional checks for device packages
-        if package.startswith('device-'):
-            head_parsed = get_package_contents(package, "HEAD", False)
-            upstream_parsed = get_package_contents(package, commit, False)
-
-            # checksums did not change
-            if head_parsed["sha512sums"] == upstream_parsed["sha512sums"]:
-                # Check that pkgver did not change
-                if head_parsed["pkgver"] != upstream_parsed["pkgver"]:
-                    print(f" - {package}: pkgver should not change when package source checksums did not change."
-                          "See: https://wiki.postmarketos.org/wiki/Packaging#device_packages_and_other_packages_without_sources")
-                    error = True
-                # We do not check for a bumped pkgrel, because not everything
-                # needs it, e.g: pmb_recommends
-            # checksums changed
-            else:
-                # Check that pkgrel was reset to 0
-                if head_parsed["pkgrel"] != "0":
-                    print(f" - {package}: pkgrel should be 0 when package source checksums change."
-                          "See: https://wiki.postmarketos.org/wiki/Packaging#device_packages_and_other_packages_without_sources")
-                    error = True
-                # Check that pkgver was changed
-                if head_parsed["pkgver"] == upstream_parsed["pkgver"]:
-                    print(f" - {package}: pkgver should change when package source checksums change."
-                          "See: https://wiki.postmarketos.org/wiki/Packaging#device_packages_and_other_packages_without_sources")
-                    error = True
-
        # Compare head and upstream versions
        result = pmb.parse.version.compare(head, upstream)
        if result != 1:
@@ -194,12 +149,8 @@ if __name__ == "__main__":
    # Initialize args (so we can use pmbootstrap's APKBUILD parsing)
    sys.argv = ["pmbootstrap.py", "chroot"]
    args = pmb.parse.arguments()
-    context = get_context()
-
-    # pmb.helpers.logging.init(args)
-    pmb.helpers.logging.init(context.log, args.verbose, context.details_to_stdout)
-
+    pmb.helpers.logging.init(args)

    # Verify package versions
    print("checking changed package versions...")
-    check_versions(packages)
+    check_versions(args, packages)
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# Copyright 2024 Oliver Smith
+# Copyright 2023 Oliver Smith
 # SPDX-License-Identifier: GPL-3.0-or-later

 import glob
@@ -10,30 +10,42 @@ import subprocess
 # Same dir
 import common

+# pmbootstrap
+import add_pmbootstrap_to_import_path  # noqa
+import pmb.parse
+import pmb.helpers.logging

-def check_kconfig(pkgnames):
+
+def check_kconfig(args, pkgnames):
    last_failed = None
    for i in range(len(pkgnames)):
        pkgname = pkgnames[i]
        print(f"  ({i+1}/{len(pkgnames)}) {pkgname}")

-        p = subprocess.run(["pmbootstrap", "kconfig", "check", "--keep-going", pkgname],
-                           check=False)
+        apkbuild_path = pmb.helpers.pmaports.find(args, pkgname)
+        apkbuild = pmb.parse._apkbuild.apkbuild(f"{apkbuild_path}/APKBUILD")

-        if p.returncode:
+        options = []
+
+        for opt in apkbuild["options"]:
+            if "pmb:kconfigcheck" in opt:
+                options += [opt]
+
+        if len(options):
+            options.sort()
+            print(f'options="{" ".join(options)}"')
+
+        if "!pmb:kconfigcheck" in apkbuild["options"]:
+            print("skipped (!pmb:kconfigcheck)")
+            continue
+
+        if not pmb.parse.kconfig.check(args, pkgname, details=True):
            last_failed = pkgname

    return last_failed


-def check_kconfig_all():
-    p = subprocess.run(["pmbootstrap", "kconfig", "check", "--keep-going"], check=False)
-    return p.returncode == 0
-
-
 def show_error(last_failed):
-    print("")
-    print("---")
    print("")
    print("Please adjust your kernel config. This is required for getting your"
          " patch merged.")
@@ -47,43 +59,10 @@ def show_error(last_failed):
    print("Run this check again (on all kernels you modified):")
    print("  pmbootstrap ci kconfig")
    print("")
-    print("---")
-    print("")
-
-
-def show_error_all():
-    print("")
-    print("---")
-    print("")
-    print("Please adjust the failed kernel configs. This is required for")
-    print("getting your patch merged.")
-    print("")
-    print("If a kernel in the testing category failed, and fixing is too much")
-    print("effort, remove 'pmb:kconfigcheck-community' from the APKBUILD.")
-    print("")
-    print("Edit a kernel config:")
-    print("  pmbootstrap kconfig edit <PACKAGE NAME>")
-    print("")
-    print("Test a specific kernel config again:")
-    print("  pmbootstrap kconfig check <PACKAGE NAME>")
-    print("")
-    print("Run this check again (on all kernels you modified):")
-    print("  pmbootstrap ci kconfig")
-    print("")
-    print("---")
-    print("")


 if __name__ == "__main__":
    common.add_upstream_git_remote()
-
-    if "kconfigcheck.toml" in common.get_changed_files():
-        print("kconfigcheck.toml changed -> checking all kernels")
-        if not check_kconfig_all():
-            show_error_all()
-            exit(1)
-        exit(0)
-
    pkgnames = common.get_changed_kernels()
    print(f"Changed kernels: {pkgnames}")

@@ -91,7 +70,13 @@ if __name__ == "__main__":
        print("No kernels changed in this branch")
        exit(0)

-    last_failed = check_kconfig(pkgnames)
+    # Initialize args (so we can use pmbootstrap's kconfig parsing)
+    sys.argv = ["pmbootstrap", "kconfig", "check"]
+    args = pmb.parse.arguments()
+    pmb.helpers.logging.init(args)
+
+    print("Running kconfig check on changed kernels...")
+    last_failed = check_kconfig(args, pkgnames)

    if last_failed:
        show_error(last_failed)
@@ -106,7 +106,7 @@ def main():
    # Ask to adjust the wiki
    if error:
        print("*** Wiki check failed!")
-        print("Thank you for porting postmarketOS to a new device! \\o/")
+        print("Thank you for porting postmarketOS to a new device! \o/")
        print("")
        print("Now it's time to add some documentation:")
        print("1) Create a device specific wiki page as described here:")
@@ -59,11 +59,6 @@ def get_upstream_branch():
        channels.cfg from master to retrieve the upstream branch.

        :returns: branch name, e.g. "v20.05" """
-
-    # Prefer gitlab CI target branch name if it's set (i.e. running in gitlab CI)
-    if target_branch := os.environ.get("CI_MERGE_REQUEST_TARGET_BRANCH_NAME"):
-        return target_branch
-
    global cache
    if "upstream_branch" in cache:
        return cache["upstream_branch"]
@@ -135,28 +130,27 @@ def get_changed_packages_sanity_check(count):
        return

    branch = get_upstream_branch()
-    print(f"""
-ERROR: Too many packages have changed!
-
-This is a sanity check, so we don't end up building packages that
-have not been modified. CI won't run for more than three hours
-anyway.
-
-Your options:
-a) If you *did not* modify everything listed above, then rebase
-   your branch on the official postmarketOS/pmaports.git {branch}
-   branch. Feel free to ask in the chat for help if you need any.
-b) If you *did* modify all these packages, and you assume that
-   they will build within one hour: skip this sanity check by
-   adding '[ci:ignore-count]' to the commit message of the last
-   commit in the merge request (then force push).
-c) If you *did* modify all these packages, and you are sure that
-   they won't build in time, please add '[ci:skip-build]' to the
-   commit message (then force push). Make sure that all packages
-   build with 'pmbootstrap build --strict'!
-
-Thank you and sorry for the inconvenience.
-    """)
+    print()
+    print("ERROR: Too many packages have changed!")
+    print()
+    print("This is a sanity check, so we don't end up building packages that")
+    print("have not been modified. CI won't run for more than three hours")
+    print("anyway.")
+    print()
+    print("Your options:")
+    print("a) If you *did not* modify everything listed above, then rebase")
+    print(f"   your branch on the official postmarketOS/pmaports.git {branch}")
+    print("   branch. Feel free to ask in the chat for help if you need any.")
+    print("b) If you *did* modify all these packages, and you assume that")
+    print("   they will build within one hour: skip this sanity check by")
+    print("   adding '[ci:ignore-count]' to the commit message (then force")
+    print("   push).")
+    print("c) If you *did* modify all these packages, and you are sure that")
+    print("   they won't build in time, please add '[ci:skip-build]' to the")
+    print("   commit message (then force push). Make sure that all packages")
+    print("   build with 'pmbootstrap build --strict'!")
+    print()
+    print("Thank you and sorry for the inconvenience.")

    sys.exit(1)

@@ -19,11 +19,16 @@ if [ -z "$(command -v pytest)" ]; then
 	exit 1
 fi

+# Wrap pmbootstrap to use this repository for --aports
 pmaports="$(cd "$(dirname "$0")"/..; pwd -P)"
+_pmbootstrap="$(command -v pmbootstrap)"
+pmbootstrap() {
+	"$_pmbootstrap" --aports="$pmaports" "$@"
+}
+
 # Make sure that the work folder format is up to date, and that there are no
 # mounts from aborted test cases (pmbootstrap#1595)
 pmbootstrap work_migrate
-pmbootstrap config aports "$pmaports"
 pmbootstrap -q shutdown

 # Make sure we have a valid device (pmbootstrap#1128)
@@ -15,14 +15,17 @@ fi
 # Shell: shellcheck
 sh_files="
 	./main/mdss-fb-init-hack/mdss-fb-init-hack.sh
+	./main/osk-sdl/unlock.sh
 	./main/postmarketos-base/rootfs-usr-lib-firmwareload.sh
 	./main/postmarketos-base-ui/rootfs-usr-lib-NetworkManager-dispatcher.d-50-dns-filter.sh
 	./main/postmarketos-base-ui/rootfs-usr-lib-NetworkManager-dispatcher.d-50-tethering.sh
 	./main/postmarketos-installkernel/installkernel-pmos
 	./main/postmarketos-initramfs/init.sh
 	./main/postmarketos-initramfs/init_functions.sh
+	./main/postmarketos-mkinitfs-hook-debug-shell/20-debug-shell.sh
 	./main/postmarketos-mkinitfs-hook-debug-shell/setup_usb_storage.sh
 	./main/postmarketos-mkinitfs-hook-netboot/netboot.sh
+	./main/postmarketos-update-kernel/update-kernel.sh
 	./main/ttyescape/*.post-install
 	./main/unl0kr/unlock.sh
 	./main/msm-firmware-loader/*.post-install
@@ -34,7 +34,7 @@ def path_pmbootstrap():
            return directory

    # Symlink not set up properly
-    print("ERROR: unable to find path to pmbootstrap.py. Try setting 'PMBOOTSTRAP_CMD'.")
+    print("ERROR: 'pmbootstrap' is not a symlink to pmbootstrap.py")
    sys.exit(1)


@@ -2,33 +2,24 @@
 # Copyright 2021 Oliver Smith
 # SPDX-License-Identifier: GPL-3.0-or-later

-from pathlib import Path
 import add_pmbootstrap_to_import_path
 import pmb.parse
-from pmb.helpers.args import init as init_args
-from pmb.types import PmbArgs
-import pmb.config
-from pmb.core.pkgrepo import pkgrepo_default_path
 import pytest
 import sys
 import os

-@pytest.fixture(scope="session", autouse=True)
+
+@pytest.fixture
 def args(request):
    # Initialize args
-    pmaports = Path(os.path.realpath(f"{os.path.dirname(__file__)}/../.."))
-    args = PmbArgs()
-    args.aports = [pmaports]
-    args.config = pmb.config.defaults["config"]
-    args.timeout = 900
-    args.details_to_stdout = False
-    args.quiet = False
-    args.verbose = True
-    args.offline = False
-    args.action = "init"
-    args.cross = False
-    args.log = None
+    pmaports = os.path.realpath(f"{os.path.dirname(__file__)}/../..")
+    sys.argv = ["pmbootstrap",
+                "--aports", pmaports,
+                "--log", "$WORK/log_testsuite_pmaports.txt"
+                "chroot"]
+    args = pmb.parse.arguments()

-    init_args(args)
+    # Initialize logging
+    pmb.helpers.logging.init(args)
    request.addfinalizer(pmb.helpers.logging.logfd.close)
    return args
@@ -1,27 +1,15 @@
 #!/usr/bin/env python3
-# Copyright 2024 Oliver Smith
+# Copyright 2021 Oliver Smith
 # SPDX-License-Identifier: GPL-3.0-or-later

-import fnmatch
 import glob
-import os
 import pytest
 import sys
+import os

 import add_pmbootstrap_to_import_path
 import pmb.parse
 import pmb.parse._apkbuild
-from pmb.core.pkgrepo import pkgrepo_default_path, pkgrepo_iglob, pkgrepo_relative_path
-from pmb.core.arch import Arch
-
-# Cache for codeowners_parse
-codeowners_parsed = {}
-
-# Don't complain if these nicknames are the only maintainers of an APKBUILD,
-# because they are actually a group of people
-gitlab_groups = [
-    "@sdm845-mainline",
-]


 def device_dependency_check(apkbuild, path):
@@ -29,16 +17,24 @@ def device_dependency_check(apkbuild, path):
        (e.g. because it should be in a subpackage instead). """

    for depend in apkbuild["depends"]:
+        if depend == "linux-firmware-none":
+            continue
+        if (depend.startswith("firmware-") or
+                depend.startswith("linux-firmware")):
+            raise RuntimeError("Firmware package '" + depend + "' found in"
+                               " depends of " + path + ". These go into"
+                               " subpackages now, see"
+                               " <https://postmarketos.org/devicepkg>.")
        if depend == "mesa-dri-gallium":
            raise RuntimeError(f"{path}: mesa-dri-gallium shouldn't be in"
                               " depends anymore (see pmaports!3478)")


-def test_aports_device():
+def test_aports_device(args):
    """
    Various tests performed on the /device/*/device-* aports.
    """
-    for path in pkgrepo_iglob("device/*/device-*/APKBUILD"):
+    for path in glob.iglob(args.aports + "/device/*/device-*/APKBUILD"):
        apkbuild = pmb.parse.apkbuild(path)

        # Depends: Require "postmarketos-base"
@@ -50,33 +46,41 @@ def test_aports_device():
            raise RuntimeError("Missing 'postmarketos-base' in depends of " +
                               path)

-        # Depends: Must not have specific packages
+        # Depends: Must not have firmware packages
        for depend in apkbuild["depends"]:
            device_dependency_check(apkbuild, path)

        # Architecture
        device = apkbuild["pkgname"][len("device-"):]
-        deviceinfo = pmb.parse.deviceinfo(device)
-        if Arch.from_str("".join(apkbuild["arch"])) != deviceinfo.arch:
-            raise RuntimeError("wrong architecture, please change to arch=\""
-                               f"{deviceinfo.arch}\": {path}")
+        deviceinfo = pmb.parse.deviceinfo(args, device)
+        if "".join(apkbuild["arch"]) != deviceinfo["arch"]:
+            raise RuntimeError("wrong architecture, please change to arch=\"" +
+                               deviceinfo["arch"] + "\": " + path)
        if "!archcheck" not in apkbuild["options"]:
            raise RuntimeError("!archcheck missing in options= line: " + path)

+        if deviceinfo["flash_kernel_on_update"] == "true" \
+                and "postmarketos-update-kernel" not in apkbuild["depends"]:
+            raise RuntimeError(
+                "Deviceinfo indicates this device supports automatic kernel"
+                " flashing on update, but doesn't depend on"
+                " 'postmarketos-update-kernel'. Please add the missing"
+                " dependency.")

-def test_aports_device_kernel():
+
+def test_aports_device_kernel(args):
    """
    Verify the kernels specified in the device packages:
    * Kernel must not be in depends when kernels are in subpackages
    * Check if only one kernel is defined in depends
    """
-    aports = pkgrepo_default_path()
+
    # Iterate over device aports
-    for path in aports.glob("device/*/device-*/APKBUILD"):
+    for path in glob.glob(args.aports + "/device/*/device-*/APKBUILD"):
        # Parse apkbuild and kernels from subpackages
        apkbuild = pmb.parse.apkbuild(path)
        device = apkbuild["pkgname"][len("device-"):]
-        kernels_subpackages = pmb.parse._apkbuild.kernels(device)
+        kernels_subpackages = pmb.parse._apkbuild.kernels(args, device)

        # Parse kernels from depends
        kernels_depends = []
@@ -87,112 +91,48 @@ def test_aports_device_kernel():

            # Kernel in subpackages *and* depends
            if kernels_subpackages:
-                raise RuntimeError(f"Kernel package '{depend}' needs to"
+                raise RuntimeError("Kernel package '" + depend + "' needs to"
                                   " be removed when using kernel" +
-                                   f" subpackages: {path}")
+                                   " subpackages: " + path)

        # No kernel
        if not kernels_depends and not kernels_subpackages:
            raise RuntimeError("Device doesn't have a kernel in depends or"
-                               f" subpackages: {path}")
+                               " subpackages: " + path)

        # Multiple kernels in depends
        if len(kernels_depends) > 1:
            raise RuntimeError("Please use kernel subpackages instead of"
                               " multiple kernels in depends (see"
-                               f" <https://postmarketos.org/devicepkg>): {path}")
+                               " <https://postmarketos.org/devicepkg>): " +
+                               path)


-def codeowners_parse():
-    global codeowners_parsed
-
-    pattern_prev = None
-    aports = pkgrepo_default_path()
-
-    with open(aports / "CODEOWNERS") as h:
-        for line in h:
-            line = line.rstrip()
-            if not line or line.startswith("#"):
-                continue
-
-            pattern_nicks = line.split()
-            assert len(pattern_nicks) > 1, f"CODEOWNERS line without nicks: {line}"
-
-            pattern = pattern_nicks[0]
-            if pattern.endswith("/"):
-                pattern += "*"
-
-            nicks = []
-            for word in pattern_nicks[1:]:
-                if word.startswith("@"):
-                    nicks += [word]
-            codeowners_parsed[pattern] = nicks
-
-            if pattern_prev:
-                assert pattern_prev <= pattern, "CODEOWNERS: please order entries alphabetically"
-            pattern_prev = pattern
-
-
-def require_enough_codeowners_entries(path, maintainers):
-    """
-    :param path: full path to an APKBUILD (e.g. /home/user/…/APKBUILD)
-    :param maintainers: list of one or more maintainers
-    """
-
-    _, path = pkgrepo_relative_path(path)
-
-    nicks = set()
-    for pattern, pattern_nicks in codeowners_parsed.items():
-        if fnmatch.fnmatch(path, pattern):
-            for nick in pattern_nicks:
-                nicks.add(nick)
-
-    print(f"{path}:")
-    print(f"  APKBUILD: {maintainers}")
-    print(f"  CODEOWNERS: {nicks}")
-
-    if len(nicks) < len(maintainers):
-        for nick in nicks:
-            if nick in gitlab_groups:
-                print(f"  -> {nick} is a group")
-                return
-
-    assert len(nicks) >= len(maintainers), \
-        f"{path}: make sure that each maintainer is listed in CODEOWNERS!"
-
-
-# @pytest.mark.xfail # Not all aports have been updated yet
-def test_aports_maintained():
+def test_aports_maintained(args):
    """
    Ensure that aports in /device/{main,community} have "Maintainer:" and
-    "Co-Maintainer:" (only required for main) listed in their APKBUILDs. Also
-    check that at least as many are listed in CODEOWNERS.
+    "Co-Maintainer:" (only required for main) listed in their APKBUILDs.
    """
-    codeowners_parse()
-
-    for path in pkgrepo_iglob("device/main/*/APKBUILD"):
-        if 'firmware-' in path.parent.name:
+    for path in glob.iglob(f"{args.aports}/device/main/*/APKBUILD"):
+        if '/firmware-' in path:
            continue
        maintainers = pmb.parse._apkbuild.maintainers(path)
        assert maintainers and len(maintainers) >= 2, \
            f"{path} in main needs at least 1 Maintainer and 1 Co-Maintainer"
-        require_enough_codeowners_entries(path, maintainers)

-    for path in pkgrepo_iglob("device/community/*/APKBUILD"):
-        if 'firmware-' in path.parent.name:
+    for path in glob.iglob(f"{args.aports}/device/community/*/APKBUILD"):
+        if '/firmware-' in path:
            continue
        maintainers = pmb.parse._apkbuild.maintainers(path)
        assert maintainers, f"{path} in community needs at least 1 Maintainer"
-        require_enough_codeowners_entries(path, maintainers)


-def test_aports_unmaintained():
+def test_aports_unmaintained(args):
    """
    Ensure that aports in /device/unmaintained have an "Unmaintained:" comment
    that describes why the aport is unmaintained.
    """
-
-    for path in pkgrepo_iglob("device/unmaintained/*/APKBUILD"):
+    for path in glob.iglob(f"{args.aports}/device/unmaintained/*/APKBUILD"):
        unmaintained = pmb.parse._apkbuild.unmaintained(path)
        assert unmaintained, f"{path} should have an Unmaintained: " +\
            "comment that describes why the package is unmaintained"
@@ -10,7 +10,6 @@ import sys

 import add_pmbootstrap_to_import_path
 import pmb.parse
-from pmb.core.pkgrepo import pkgrepo_iglob


 def deviceinfo_obsolete(info):
@@ -23,13 +22,13 @@ def deviceinfo_obsolete(info):
        "weston_pixman_type",
    ]
    for option in obsolete_options:
-        if getattr(info, option, None):
+        if option in info and info[option]:
            raise RuntimeError(f"option {option} is obsolete, please rename"
                               " or remove it (see reasons for removal of at"
                               " https://postmarketos.org/deviceinfo)")


-def test_deviceinfo():
+def test_deviceinfo(args):
    """
    Parse all deviceinfo files successfully and run checks on the parsed data.
    """
@@ -38,10 +37,10 @@ def test_deviceinfo():
    count = 0
    pattern = re.compile("^deviceinfo_[a-zA-Z0-9_]*=\".*\"$")

-    for folder in pkgrepo_iglob("device/*/device-*"):
-        device = folder.name.split("-", 1)[1]
+    for folder in glob.glob(args.aports + "/device/*/device-*"):
+        device = folder[len(args.aports):].split("-", 1)[1]

-        f = open(folder / "deviceinfo")
+        f = open(folder[len(args.aports):][1:] + "/deviceinfo")
        lines = f.read().split("\n")
        f.close()

@@ -67,12 +66,12 @@ def test_deviceinfo():
                                       f" to line instead of above? {line}")

            # Successful deviceinfo parsing / obsolete options
-            info = pmb.parse.deviceinfo(device)
+            info = pmb.parse.deviceinfo(args, device)
            deviceinfo_obsolete(info)

            # deviceinfo_name must start with manufacturer
-            name = info.name
-            manufacturer = info.manufacturer
+            name = info["name"]
+            manufacturer = info["manufacturer"]
            if not name.startswith(manufacturer) and \
                    not name.startswith("Google"):
                raise RuntimeError("Please add the manufacturer in front of"
@@ -6,10 +6,10 @@ import stat

 expected_directories = [
    "cross",
-    "device/archived",
    "device/community",
    "device/main",
    "device/testing",
+    "device/unmaintained",
    "main",
    "modem",
    "non-free",
@@ -30,7 +30,7 @@ def test_directories():
 # Ensure no file in pmaports are executable.
 # see https://gitlab.com/postmarketOS/pmaports/-/issues/593.
 def test_executable_files():
-    for file in glob.iglob("[!temp]**/**/*", recursive=True):
+    for file in glob.iglob("**/*", recursive=True):
        if os.path.isdir(file) or os.path.islink(file):
            continue
            # still check other less common inode types
@@ -7,10 +7,9 @@ import os

 import add_pmbootstrap_to_import_path
 import pmb.parse
-from pmb.core.pkgrepo import pkgrepo_default_path, pkgrepo_iglob


-def test_aports_firmware():
+def test_aports_firmware(args):
    """
    Various tests performed on the /**/firmware-* aports.
    """
@@ -27,9 +26,9 @@ def test_aports_firmware():
        "firmware-xiaomi-willow",  # Doesn't build, source link is dead (pma#1212)
    ]

-    for path in pkgrepo_iglob("**/firmware-*/APKBUILD", recursive=True):
+    for path in glob.iglob(f"{args.aports}/**/firmware-*/APKBUILD", recursive=True):
        apkbuild = pmb.parse.apkbuild(path)
-        aport_name = os.path.basename(path.parent)
+        aport_name = os.path.basename(os.path.dirname(path))

        if aport_name not in excluded:
            if "pmb:cross-native" not in apkbuild["options"]:
@@ -15,10 +15,9 @@ import sys
 import add_pmbootstrap_to_import_path
 import pmb.config
 import pmb.parse
-from pmb.core.pkgrepo import pkgrepo_iter_package_dirs


-def get_categorized_packages():
+def get_categorized_packages(args):
    """
    Parse all aports and categorize them.

@@ -29,7 +28,7 @@ def get_categorized_packages():
    """
    ret = {}

-    for path in pkgrepo_iter_package_dirs():
+    for path in glob.glob(args.aports + "/*/*/APKBUILD"):
        # Parse APKBUILD
        apkbuild = pmb.parse.apkbuild(path)
        url = apkbuild["url"]
@@ -110,10 +109,10 @@ def check_categories(categories):
    return ret


-def test_framework_versions():
+def test_framework_versions(args):
    """
    Make sure that packages of the same framework have the same version.
    """
-    categories = get_categorized_packages()
+    categories = get_categorized_packages(args)
    if not check_categories(categories):
        raise RuntimeError("Framework version check failed!")
@@ -6,20 +6,17 @@ import glob
 import pytest
 import sys
 import os
-import re
-from pathlib import Path

 import add_pmbootstrap_to_import_path
 import pmb.parse
-from pmb.core.pkgrepo import pkgrepo_iglob, pkgrepo_relative_path


-def test_aports_kernel():
+def test_aports_kernel(args):
    """
    Various tests performed on the /**/linux-* aports.
    """

-    for path in pkgrepo_iglob("**/linux-*/APKBUILD", recursive=True):
+    for path in glob.iglob(f"{args.aports}/**/linux-*/APKBUILD", recursive=True):
        apkbuild = pmb.parse.apkbuild(path)
        aport_name = os.path.basename(os.path.dirname(path))

@@ -38,15 +35,8 @@ def test_aports_kernel():
                                   " automatically.")

        # check some options only for main and community devices
-        _, relpath = pkgrepo_relative_path(path)
-        for part in ["main", "community"]:
-            if part in relpath.parts:
+        for dir in ["main", "device/main", "device/community"]:
+            if path.startswith(f"{args.aports}/{dir}"):
                if "pmb:kconfigcheck-community" not in apkbuild["options"]:
                    raise RuntimeError(f"{aport_name}: \"pmb:kconfigcheck-community\" missing in"
                                       " options= line, required for all community/main devices.")
-
-        # check for postmarketos-installkernel in makedepends when installing kernel with make
-        if bool(re.search("make z?install", path.read_text(encoding="utf-8"))):
-            if "postmarketos-installkernel" not in apkbuild["makedepends"]:
-                raise RuntimeError(f"{aport_name}: \"postmarketos-installkernel\" missing in"
-                                   " makedepends, required when using make install/zinstall.")
@@ -10,7 +10,6 @@ import sys
 import add_pmbootstrap_to_import_path
 import pmb.parse
 import pmb.parse._apkbuild
-from pmb.core.pkgrepo import pkgrepo_iter_package_dirs, pkgrepo_relative_path


 def apkbuild_check_provides(path, apkbuild, version, pkgname, subpkgname=None):
@@ -66,14 +65,13 @@ def apkbuild_check_provides(path, apkbuild, version, pkgname, subpkgname=None):
    return ret


-def test_provides():
+def test_provides(args):
    errors = []
-    for path in pkgrepo_iter_package_dirs():
-        path = path / "APKBUILD"
+    for path in glob.iglob(f"{args.aports}/**/APKBUILD", recursive=True):
        apkbuild = pmb.parse.apkbuild(path)
        pkgname = apkbuild["pkgname"]
        version = f"{apkbuild['pkgver']}-r{apkbuild['pkgrel']}"
-        _, path_rel = pkgrepo_relative_path(path)
+        path_rel = os.path.relpath(path, args.aports)
        errors += apkbuild_check_provides(path_rel, apkbuild, version, pkgname)

        for subpkg, subpkg_data in apkbuild["subpackages"].items():
@@ -14,10 +14,9 @@ import pmb.parse
 import pmb.parse._apkbuild
 import pmb.parse.apkindex
 import pmb.helpers.repo
-from pmb.core.pkgrepo import pkgrepo_iter_package_dirs, pkgrepo_relative_path


-def parse_source_from_checksums(apkbuild_path):
+def parse_source_from_checksums(args, apkbuild_path):
    """
    Read the APKBUILD file and parse source files from the checksums at the
    bottom. This has always the same format, even if $source is built with hard
@@ -65,20 +64,17 @@ def parse_source_from_checksums(apkbuild_path):
    return ret


-def test_aports_unreferenced_files():
+def test_aports_unreferenced_files(args):
    """
    Raise an error if an unreferenced file is found
    """
-    for apkbuild_path in pkgrepo_iter_package_dirs():
+    for apkbuild_path in glob.iglob(args.aports + "/**/APKBUILD", recursive=True):
        # pmbootstrap parser has some issues with complicated APKBUILDs, skip those.
-        _, relpath = pkgrepo_relative_path(apkbuild_path)
-        if relpath.parts[0] == "cross":
+        if apkbuild_path.startswith(args.aports + "/cross/"):
            continue

-        apkbuild_path = apkbuild_path / "APKBUILD"
-
        apkbuild = pmb.parse.apkbuild(apkbuild_path)
-        sources_chk = parse_source_from_checksums(apkbuild_path)
+        sources_chk = parse_source_from_checksums(args, apkbuild_path)

        # Collect files from subpackages
        subpackage_installs = []
@@ -109,7 +105,7 @@ def test_aports_unreferenced_files():
                raise RuntimeError(f"{apkbuild_path}: found unreferenced file: {rel_file_path}")


-def test_distfiles_conflict():
+def test_distfiles_conflict(args):
    """
    Make sure that each filename mentioned in any source= of any APKBUILD
    always has the same checksum. This is important because apk caches
@@ -119,11 +115,10 @@ def test_distfiles_conflict():
    with a checksum error.
    """
    source_all = {}
-    for apkbuild_path in pkgrepo_iter_package_dirs():
-        apkbuild_path = apkbuild_path / "APKBUILD"
-        source = parse_source_from_checksums(apkbuild_path)
+    for apkbuild_path in glob.iglob(f"{args.aports}/**/APKBUILD", recursive=True):
+        source = parse_source_from_checksums(args, apkbuild_path)
        dir_path = os.path.dirname(apkbuild_path)
-        _, apkbuild_rel = pkgrepo_relative_path(apkbuild_path)
+        apkbuild_rel = os.path.relpath(apkbuild_path, args.aports)
        for filename, checksum in source.items():
            # Files bundled with the APKBUILD don't get copied to the distfiles
            # cache, so not relevant for this check. Use glob.glob here and not
@@ -9,26 +9,25 @@ import os

 import add_pmbootstrap_to_import_path
 import pmb.parse
-from pmb.core.pkgrepo import pkgrepo_iglob


-def test_aports_ui():
+def test_aports_ui(args):
    """
    Raise an error if package in _pmb_recommends is not found
    """
-    pmaports_cfg = pmb.config.pmaports.read_config()
+    pmaports_cfg = pmb.config.pmaports.read_config(args)

    for arch in pmaports_cfg["supported_arches"].split(","):
-        for path in pkgrepo_iglob("main/postmarketos-ui-*/APKBUILD"):
+        for path in glob.iglob(args.aports + "/main/postmarketos-ui-*/APKBUILD"):
            apkbuild = pmb.parse.apkbuild(path)
            # Skip if arch isn't enabled
-            if not pmb.helpers.package.check_arch(apkbuild["pkgname"], arch, False):
+            if not pmb.helpers.package.check_arch(args, apkbuild["pkgname"], arch, False):
                continue

            for package in apkbuild["_pmb_recommends"]:
-                depend = pmb.helpers.package.get(package,
+                depend = pmb.helpers.package.get(args, package,
                                                 arch, must_exist=False)
-                if depend is None or not pmb.helpers.package.check_arch(package, arch):
+                if depend is None or not pmb.helpers.package.check_arch(args, package, arch):
                    raise RuntimeError(f"{path}: package '{package}' from"
                                       f" _pmb_recommends not found for arch '{arch}'")

@@ -36,8 +35,8 @@ def test_aports_ui():
            if f"{apkbuild['pkgname']}-extras" in apkbuild["subpackages"]:
                apkbuild = apkbuild["subpackages"][f"{apkbuild['pkgname']}-extras"]
                for package in apkbuild["_pmb_recommends"]:
-                    depend = pmb.helpers.package.get(package,
+                    depend = pmb.helpers.package.get(args, package,
                                                     arch, must_exist=False)
-                    if depend is None or not pmb.helpers.package.check_arch(package, arch):
+                    if depend is None or not pmb.helpers.package.check_arch(args, package, arch):
                        raise RuntimeError(f"{path}: package '{package}' from _pmb_recommends "
                                           f"of -extras subpackage is not found for arch '{arch}'")
@@ -1,4 +1,3 @@
 {
-  "SpacesAftertabs": true,
-  "Exclude": ["temp"]
+  "SpacesAftertabs": true
 }
@@ -7,7 +7,7 @@
 # Top-most EditorConfig file.
 root = true

-[{**.{md,ini,sh,rules,nft},**/APKBUILD,CODEOWNERS}]
+[{**.{md,ini,sh,rules,nft},**/APKBUILD}]
 indent_style = tab
 end_of_line = lf
 trim_trailing_whitespace = true
@@ -2,60 +2,60 @@

 # global settings
 image: alpine:latest
-before_script: &global_before_scripts
-  - apk upgrade -U
 after_script:
  - .ci/lib/move_logs.sh $CI_PROJECT_DIR
 stages:
  - lint
  - build
-  - autoupdate
-variables:
-  PMBOOTSTRAP_TAG: "master"

-# This defines the rules for when a pipeline should run.
-workflow:
-  rules:
-    # Don't run branch pipeline if an MR is open (only the MR pipeline will run)
-    - if: $CI_COMMIT_BRANCH && $CI_OPEN_MERGE_REQUESTS && $CI_PIPELINE_SOURCE == "push"
-      when: never
-    # Run for merge requests
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event"
-    # Run scheduled pipeline for autoupdate or manually triggered pipeline
-    - if: $CI_PIPELINE_SOURCE == "schedule" || $CI_PIPELINE_SOURCE == "web"
+# defaults for "only"
+# We need to run the CI jobs in a "merge request specific context", if CI is
+# running in a merge request. Otherwise the environment variable that holds the
+# merge request ID is not available. This means, we must set the "only"
+# variable accordingly - and if we only do it for one job, all other jobs will
+# not get executed. So have the defaults here, and use them in all jobs that
+# should run on both the master branch, and in merge requests.
+# https://docs.gitlab.com/ee/ci/merge_request_pipelines/index.html#excluding-certain-jobs
+.only-default: &only-default
+  only:
+    - master
+    - merge_requests
+    - tags

 # device documentation
 wiki:
  stage: lint
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
-      changes:
-        - .ci/**/*
-        - .gitlab-ci.yml
-        - device/*/device-*/*
+  <<: *only-default
+  only:
+    refs:
+      - merge_requests
+    changes:
+      - device/*/device-*/*
  script:
    - .ci/lib/gitlab_prepare_ci.sh
    - .ci/wiki.sh

 # testcases linting
-ruff:
+flake8:
  stage: lint
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
-      changes:
-        - .ci/*
-        - .ci/*/*
-        - .gitlab-ci.yml
+  <<: *only-default
+  only:
+    refs:
+      - merge_requests
+    changes:
+      - .ci/*
+      - .ci/*/*
+  before_script:
+    - apk -q add py-flake8
  script:
    - .ci/lib/gitlab_prepare_ci.sh
-    - .ci/ruff.sh
+    - .ci/flake8.sh

 # shellcheck and various grep checks
 shellcheck-grep:
  stage: lint
+  <<: *only-default
  image: alpine:edge
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
  script:
    - .ci/lib/gitlab_prepare_ci.sh
    - .ci/shellcheck.sh
@@ -64,9 +64,8 @@ shellcheck-grep:

 editor-config:
  stage: lint
+  <<: *only-default
  image: alpine:edge
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
  script:
    - .ci/lib/gitlab_prepare_ci.sh
    - .ci/ec.sh
@@ -74,8 +73,7 @@ editor-config:
 # aports checks (generic)
 pytest-commits:
  stage: lint
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
+  <<: *only-default
  script:
    - .ci/lib/gitlab_prepare_ci.sh
    - .ci/pytest.sh
@@ -91,22 +89,23 @@ pytest-commits:
 # APKBUILD linting
 aport-lint:
  stage: lint
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
  script:
    - .ci/lib/gitlab_prepare_ci.sh
    - .ci/apkbuild-lint.sh
+  only:
+    - merge_requests
  allow_failure: true

 # kernel kconfig check
 kernel-kconfig:
  stage: lint
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
-      changes:
-        - kconfigcheck.toml
-        - device/*/linux-*/config-*
-        - main/linux-*/config-*
+  only:
+    refs:
+      - master
+      - merge_requests
+    changes:
+      - device/*/linux-*/config-*
+      - main/linux-*/config-*
  script:
    - .ci/lib/gitlab_prepare_ci.sh
    - .ci/kconfig.sh
@@ -115,10 +114,9 @@ kernel-kconfig:
 # (Checks for "Allow commits from members who can merge to the target branch")
 mr-settings:
  stage: lint
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event"
+  only:
+    - merge_requests
  before_script:
-    - *global_before_scripts
    - apk -q add python3
  script:
    - wget -q "https://gitlab.com/postmarketOS/ci-common/-/raw/master/check_mr_settings.py"
@@ -127,10 +125,8 @@ mr-settings:
 # build changed aports
 .build:
  stage: build
-  rules:
-    - if: $CI_PIPELINE_SOURCE == "merge_request_event" || $CI_COMMIT_REF_PROTECTED == "false"
+  <<: *only-default
  before_script:
-    - *global_before_scripts
    - .ci/lib/gitlab_prepare_ci.sh
  after_script:
    - cp -r /home/pmos/.local/var/pmbootstrap/packages/ packages/ || true
@@ -169,22 +165,3 @@ build-riscv64:
  extends: .build
  script:
    - .ci/build-riscv64.sh
-
-auto-update:
-  stage: autoupdate
-  rules:
-    # This variable is set in the scheduled pipeline configuration. It should be a space separated list of
-    # package names to update.
-    - if: $AUTOUPDATE_PACKAGES != null && $CI_PIPELINE_SOURCE == "schedule" || $CI_PIPELINE_SOURCE == "web"
-  before_script:
-    - .ci/lib/gitlab_prepare_ci.sh
-  script:
-    - .ci/autoupdate.sh "$AUTOUPDATE_PACKAGES"
-  after_script:
-    - .ci/lib/move_logs.sh $CI_PROJECT_DIR
-  artifacts:
-    when: on_failure
-    paths:
-      - log.txt
-      - log_testsuite_pmaports.txt
-      - pmbootstrap.cfg
@@ -1,31 +0,0 @@
-<!-- Use this template to kick off the discussion for changing one or more
-     related kernel config options.
-->
-
-### Read the fine manual, please :)
-
- [ ] I have read https://postmarketos.org/kconfig-adjust-multiple
-
-### What benefit does the change have?
-
-### Which option(s) would you like to change?
-
-<!-- Make sure to specify if you would like to enable/disable/set a value. -->
-
-### Did you already test that this works as expected?
-
-<!-- Not required, but recommended. If you did test it, please list which
-     device you have tested it with. -->
-
-### For which kernel configs would you do the change?
-
-<!-- If it makes sense, we encourage to adjust all kernels used by devices in
-     the main and community categories, so devices behave consistently. -->
-
- [ ] all in main and community
- [ ] certain SoC(s):
- [ ] other (please specify):
-
-
-<!-- leave this, so it applies the correct label in gitlab -->
-/label ~"change-kernel-config"
@@ -1,12 +1,6 @@
 <!--
 	Thank you for using postmarketOS! In order to speed up process of resolving your issue,
-	we would like you to fill in the following form.
-
-	*** NOTE FOR CONFIDENTIAL ISSUES: ***
-	A lot of people can read confidential pmaports issues! If you want to
-	submit something that only the postmarketOS Core Team can see, write to
-		team@postmarketos.org
-	instead of opening an issue here!
+	we would like you to fill in the following :
 -->
 ### Describe your issue
 #### What's the expected behaviour?
@@ -27,7 +21,8 @@
 	Replace space inside `[ ]` with `x` to fill the checkbox
 -->
 * [ ] edge (`master` branch)
-* [ ] `v24.06`
+* [ ] `v23.12`
+* [ ] `v23.06` (supported until 2024-01-18)

 * [ ] I confirm that the issue still is present after running `sudo apk upgrade -a`

@@ -50,13 +45,4 @@
 -->

 ### Additional information
-<!--
-	logs, etc. -- make use <details> for long listings
-
-	If your device displays an error message on boot or drops to the debug
-	shell, attaching it to your PC with a USB cable may show a removable USB
-	drive. You can drag and drop the .tar.gz file or otherwise upload it
-	here.
-
-	Refer to the README file on the device for more information.
-->
+<!-- logs, etc. -- make use <details> for long listings -->
@@ -1,141 +1,59 @@
 # https://docs.gitlab.com/ee/user/project/code_owners.html
-# Put groups like @sdm845-mainline into test_device.py:gitlab_groups.
-# Order lines alphabetically!

-device/*/*-amlogic-s905*/			@funderscore
-device/*/*-arrow-db410c/			@Minecrell
-device/*/*-asus-me176c/				@Minecrell
-device/*/*-ayn-odin/				@jenneron
-device/*/*-bq-paella/				@Minecrell
-device/*/*-bq-tenshi/				@fossdd
-device/*/*-google-gru/				@jenneron
-device/*/*-google-kukui/			@jenneron @binarycraft
-device/*/*-google-oak/				@jenneron @adamthiede
-device/*/*-google-trogdor/			@jenneron
-device/*/*-google-veyron/			@jenneron
-device/*/*-google-x64cros/			@jenneron @JustSoup321 @alpernebbi
 device/*/*-htc-golfu/				@Newbyte
+device/*/*-pine64-pinephone/			@craftyguy @milesalan @bshah @proycon @anjandev @StacyHarper
 device/*/*-htc-m8qlul/				@Newbyte
-device/*/*-kobo-clara/				@akemnade
-device/*/*-lenovo-21bx/				@craftyguy @jane400
-device/*/*-lenovo-a6000/			@jenneron @Minecrell
-device/*/*-lenovo-a6010/			@jenneron @Minecrell
-device/*/*-librecomputer-lafrite/		@funderscore
-device/*/*-librecomputer-lepotato/		@funderscore
-device/*/*-librecomputer-solitude/		@Newbyte @funderscore
-device/*/*-motorola-harpia/			@Minecrell
-device/*/*-nokia-n900/				@sicelo @Danct12
-device/*/*-pine64-pinebookpro/			@QC8086
-device/*/*-pine64-pinephone/			@craftyguy @milesalan @proycon @anjandev @StacyHarper @Arnavion @PsychoGame
-device/*/*-pine64-pinephonepro/			@PsychoGame
-device/*/*-pine64-rockpro64/			@PureTryOut
-device/*/*-purism-librem5/			@craftyguy @alistair23 @Newbyte
-device/*/*-qcom-msm8916/			@Minecrell @TravMurav
-device/*/*-qcom-sdm670/				@flamingradian
-device/*/*-qcom-sdm845/				@sdm845-mainline
-device/*/*-qcom-sm6350/				@z3ntu
-device/*/*-samsung-a3/				@Mis012 @TravMurav @Minecrell
-device/*/*-samsung-a5/				@Minecrell @minlexx
-device/*/*-samsung-e7/				@wonderfulShrineMaidenOfParadise
-device/*/*-samsung-espresso10/			@MightyM17
-device/*/*-samsung-espresso7/			@MightyM17 @antoni.aloytorrens
-device/*/*-samsung-grandmax/			@wonderfulShrineMaidenOfParadise
-device/*/*-samsung-gt510/			@TravMurav
-device/*/*-samsung-gt58/			@TravMurav
-device/*/*-samsung-j5/				@wonderfulShrineMaidenOfParadise
-device/*/*-samsung-j5x/				@wonderfulShrineMaidenOfParadise
-device/*/*-samsung-serranove/			@Minecrell
-device/*/*-tolino-shine2hd/			@akemnade
-device/*/*-videostrong-kii-pro/			@funderscore
-device/*/*-wileyfox-crackling/			@TravMurav @Minecrell
-device/*/*-xiaomi-beryllium/			@joelselvaraj
-device/*/*-xiaomi-daisy/			@joelselvaraj @alikates
-device/*/*-xiaomi-markw/			@vipaoL
-device/*/*-xiaomi-mido/				@barni2000
-device/*/*-xiaomi-scorpio/			@Tooniis
-device/*/*-xiaomi-tissot/			@jiaxyga @barni2000
-device/*/*-xiaomi-vince/			@M0Rf30
-device/*/*-xiaomi-wt88047/			@Minecrell
-device/*/*-xiaomi-ysl/				@barni2000
-device/*/alsa-ucm-conf-cros/			@WeirdTreeThing
-device/*/alsa-ucm-conf-qcom-sdm670/		@flamingradian
-device/*/device-fairphone-*/			@z3ntu
-device/*/device-generic-x86_64/			@craftyguy @ollieparanoid
-device/*/device-google-nyan-big/		@jenneron
-device/*/device-google-nyan-blaze/		@jenneron
-device/*/device-google-peach-pi/		@jenneron
-device/*/device-google-peach-pit/		@jenneron
-device/*/device-google-sargo/			@flamingradian
-device/*/device-google-snow/			@jenneron
-device/*/device-huawei-plank/			@gtrxAC
+device/*/*-purism-librem5/			@craftyguy @bshah
 device/*/device-lg-judyln/			@Newbyte
-device/*/device-lg-judyp/			@jenneron
-device/*/device-microsoft-surface-rt/		@jenneron @jethrob
-device/*/device-nvidia-tegra-armv7/		@clamor-s @okias @mschwalm @nokun
-device/*/device-odroid-xu4/			@Grimler
+device/*/device-samsung-m0/			@Newbyte
+device/*/linux-postmarketos-exynos4/		@Newbyte
+device/*/linux-postmarketos-qcom-msm8939/	@Newbyte
+device/*/linux-postmarketos-stericsson/		@Newbyte
+device/*/*-qcom-sdm845/				@sdm845-mainline
+device/*/*-xiaomi-beryllium/			@joelselvaraj
 device/*/device-oneplus-enchilada/		@calebccff
 device/*/device-oneplus-fajita/			@calebccff
-device/*/device-postmarketos-trailblazer/	@calebccff
-device/*/device-qcom-msm8909/			@wonderfulShrineMaidenOfParadise
-device/*/device-qemu-aarch64/			@Minecrell @ollieparanoid
-device/*/device-qemu-amd64/			@Minecrell @ollieparanoid
-device/*/device-qemu-riscv64/			@Minecrell @z3ntu
-device/*/device-qualcomm-sdm845/		@calebccff
-device/*/device-raspberry-pi3/			@fossdd
-device/*/device-samsung-chagallwifi/		@Grimler
-device/*/device-samsung-coreprimevelte/		@legolivesmatter @balejk
-device/*/device-samsung-j5y17lte/	@andrisas
-device/*/device-samsung-klimtlte/		@Grimler
-device/*/device-samsung-lt01/			@knuxify
-device/*/device-samsung-m0/			@Newbyte
-device/*/device-samsung-manta/			@jenneron @alexmrqt
-device/*/device-shift-axolotl/			@amartinz @calebccff @dylanvanassche
-device/*/firmware-google-sargo/			@flamingradian
-device/*/firmware-google-veyron-brcm/		@jenneron
-device/*/firmware-odroid-xu4/			@Grimler
 device/*/firmware-oneplus-sdm845/		@calebccff
-device/*/firmware-powervr-gx6250/		@jenneron
-device/*/kobo-epdc-extractor/			@akemnade
-device/*/linux-google-nyan/			@jenneron
+device/*/device-shift-axolotl/			@amartinz @calebccff @dylanvanassche
+device/*/*-lenovo-21bx/				@craftyguy
+device/*/*-lenovo-a6010/			@jenneron
+device/*/*-lenovo-a6000/			@jenneron
+device/*/device-microsoft-surface-rt/		@jenneron
+device/*/device-google-nyan-big/		@jenneron
+device/*/device-google-peach-pi/		@jenneron
 device/*/linux-google-veyron/			@jenneron
-device/*/linux-huawei-plank/			@gtrxAC
-device/*/linux-next/				@calebccff
-device/*/linux-postmarketos-allwinner/		@Arnavion @PsychoGame
-device/*/linux-postmarketos-amlogic/		@funderscore @exkc
-device/*/linux-postmarketos-exynos4/		@Newbyte @Grimler @knuxify
 device/*/linux-postmarketos-exynos5/		@jenneron @Grimler
-device/*/linux-postmarketos-grate/		@clamor-s @jenneron @jethrob
-device/*/linux-postmarketos-imx-ereader/	@akemnade
-device/*/linux-postmarketos-mediatek-mt8173/	@jenneron @adamthiede
-device/*/linux-postmarketos-mediatek-mt8183/	@jenneron @binarycraft
-device/*/linux-postmarketos-omap/		@MightyM17 @Sicelo
-device/*/linux-postmarketos-qcom-msm8939/	@Newbyte
-device/*/linux-postmarketos-qcom-msm8953/	@M0Rf30 @Ultra-azu @barni2000
-device/*/linux-postmarketos-qcom-msm8996/	@Tooniis
-device/*/linux-postmarketos-qcom-sc7180/	@jenneron
-device/*/linux-postmarketos-rockchip/		@QC8086
-device/*/linux-postmarketos-stericsson/		@Newbyte
-device/*/linux-samsung-chagallwifi/		@Grimler
-device/*/linux-samsung-coreprimevelte/		@legolivesmatter @balejk
-device/*/linux-samsung-j5y17lte/	@andrisas
-device/*/linux-samsung-klimtlte/		@Grimler
-device/*/oem-amd/				@craftyguy
-device/*/oem-intel/				@craftyguy
-device/*/oem-nvidia/				@craftyguy
 device/*/soc-mediatek-mt8183/			@jenneron
-device/*/soc-qcom-msm8953/			@barni2000
-device/*/soc-qcom-msm8996/			@Tooniis
-device/*/soc-qcom-sc7180/			@jenneron
-device/*/soc-rockchip-rk3399/			@jenneron
-device/*/soc-samsung-exynos4412/		@Newbyte
-device/*/u-boot-librem5/			@craftyguy @alistair23 @Newbyte
-device/*/u-boot-pinebookpro/			@QC8086
-device/*/u-boot-pinephone/			@Arnavion @PsychoGame
-device/*/wl1251-cal/				@Danct12
-main/postmarketos*gnome*/			@pabloyoyoista @Newbyte
-main/postmarketos-initramfs/			@calebccff @craftyguy
-main/postmarketos-ui-i3wm/			@fossdd
-main/postmarketos-ui-phosh/			@pabloyoyoista @Newbyte
-main/postmarketos-ui-plasma-mobile/		@PureTryOut
-main/shutdown-clear-rtc-wakealarm/		@Arnavion
+device/*/linux-google-nyan/			@jenneron
+device/*/linux-postmarketos-mediatek-mt8173/	@jenneron
+device/*/linux-postmarketos-mediatek-mt8183/	@jenneron @binarycraft
+device/*/device-google-nyan-blaze/		@jenneron
+device/*/firmware-powervr-gx6250/		@jenneron
+device/*/device-google-snow/			@jenneron
+device/*/firmware-google-veyron-brcm/		@jenneron
+device/*/device-google-peach-pit/		@jenneron
+device/*/device-lg-judyp/			@jenneron
+device/*/linux-postmarketos-grate/		@clamor95 @jenneron
+device/*/device-samsung-chagallwifi/		@Grimler
+device/*/device-odroid-xu4/			@Grimler
+device/*/device-samsung-klimtlte/		@Grimler
+device/*/linux-samsung-klimtlte/		@Grimler
+device/*/firmware-odroid-xu4/			@Grimler
+device/*/linux-samsung-chagallwifi/		@Grimler
+device/*/device-huawei-plank/			@gtrxAC
+device/*/linux-huawei-plank/			@gtrxAC
+device/*/device-samsung-coreprimevelte/		@legolivesmatter @balejk
+device/*/linux-samsung-coreprimevelte/		@legolivesmatter @balejk
+
+main/postmarketos-update-depthcharge-kernel/	@jenneron
+main/osk-sdl/					@craftyguy
+main/postmarketos-ui-plasma-mobile/		@bshah
 main/ttyescape/					@calebccff
+device/*/u-boot-librem5/			@craftyguy @bshah
+device/*/alsa-ucm-conf-google-kukui/		@jenneron @binarycraft
+device/*/alsa-ucm-conf-google-gru/		@jenneron
+device/*/*-videostrong-kii-pro/			@vitali64yt
+device/*/*-amlogic-s905*/			@vitali64yt
+device/*/linux-postmarketos-amlogic/		@vitali64yt @exkc
+
+# vim: ts=8 sw=4 et
@@ -8,20 +8,14 @@ branch_pmaports=master
 branch_aports=master
 mirrordir_alpine=edge

-[v24.06]
-description=Latest release / Recommended for best stability
-branch_pmaports=v24.06
-branch_aports=3.20-stable
-mirrordir_alpine=v3.20
-
 [v23.12]
-description=Old release (unsupported)
+description=Latest release / Recommended for best stability
 branch_pmaports=v23.12
 branch_aports=3.19-stable
 mirrordir_alpine=v3.19

 [v23.06]
-description=Old release (unsupported)
+description=Old release (supported until 2024-01-18)
 branch_pmaports=v23.06
 branch_aports=3.18-stable
 mirrordir_alpine=v3.18
@@ -8,7 +8,7 @@ fi

 pkgname=busybox-static-aarch64
 pkgver=1.36.1
-pkgrel=31
+pkgrel=18

 _arch="aarch64"
 _mirror="http://dl-4.alpinelinux.org/alpine/"
@@ -32,5 +32,5 @@ package() {
 }

 sha512sums="
-c34906bb0a5d7e268ab43ca1e3e2f9c75c06f3f5de8d41671396bcd7d585a79a66e25ad43e80a3e107a1de0ecaf83ac7198163d3e775edbd6d626ef014307ec5  busybox-static-1.36.1-r31-aarch64-edge.apk
+08f68b23bd880be12f95c5e1f071891f6b658fe7576f63d54e71d7390e4afc58de01813b2ea628f2b062830a89b0f69e8bd8a2b15fdb08bb9aba9e2a08971b0b  busybox-static-1.36.1-r18-aarch64-edge.apk
 "
@@ -8,7 +8,7 @@ fi

 pkgname=busybox-static-armhf
 pkgver=1.36.1
-pkgrel=31
+pkgrel=18

 _arch="armhf"
 _mirror="http://dl-4.alpinelinux.org/alpine/"
@@ -32,5 +32,5 @@ package() {
 }

 sha512sums="
-7e6a961a0adcbc2912f5b261ce84a62b9189dce49c5dd3d2bcbdae407645dec72c27af8804c1d5446d50e78ea938a4d812c477db199ed83cac7c647c4b41f3fe  busybox-static-1.36.1-r31-armhf-edge.apk
+20b11081b5d1f25298fd4d8dfde51062f5c65060f5b53840eaad6fb69b94d64c5f5e522c9286f9a56cef4a9c88bdf53dcd385f47451b1563faf2058f1ea928cb  busybox-static-1.36.1-r18-armhf-edge.apk
 "
@@ -8,7 +8,7 @@ fi

 pkgname=busybox-static-armv7
 pkgver=1.36.1
-pkgrel=31
+pkgrel=18

 _arch="armv7"
 _mirror="http://dl-4.alpinelinux.org/alpine/"
@@ -32,5 +32,5 @@ package() {
 }

 sha512sums="
-b9736dc7df4230196bf05de3bd76b61fc689c56861bc7c5194cd310e23f513cec649c1b3e3f338266b8d58540468d97e8525948a3efc2d1af53e288cd525e836  busybox-static-1.36.1-r31-armv7-edge.apk
+8f2fa87d979bdbe88eef0b9dece61001998df960e025902854b2af415b96d63ce9831dbe44d5c32b671c313efdfe9e22743a26de73febcc92d8d45d944ad66c0  busybox-static-1.36.1-r18-armv7-edge.apk
 "
@@ -150,13 +150,13 @@ diff --git a/gcc/gcc.cc b/gcc/gcc.cc
 index 16bb07f2cdc..33b56e721d2 100644
 --- a/gcc/gcc.cc
 +++ b/gcc/gcc.cc
-@@ -1177,6 +1187,8 @@ proper position among the other output files.  */
-    "-z now " \
+@@ -1146,6 +1146,8 @@ proper position among the other output files.  */
+    "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
    "%X %{o*} %{e*} %{N} %{n} %{r}\
     %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
 +    %{Wno-poison-system-directories:--no-poison-system-directories} \
 +    %{Werror=poison-system-directories:--error-poison-system-directories} \
-     %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \
+     %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \
     VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \
     %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\
 diff --git a/gcc/incpath.cc b/gcc/incpath.cc
@@ -9,22 +9,23 @@ Subject: [PATCH 13/35] nopie
 2 files changed, 40 insertions(+)

 diff --git a/gcc/configure b/gcc/configure
-index 23da7d55d..f38732bb2 100755
+index 8c46369f73f..e59cbee1767 100755
 --- a/gcc/configure
 +++ b/gcc/configure
-@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \
- fi
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5
+@@ -32268,6 +32268,33 @@ fi
 $as_echo "$gcc_cv_no_pie" >&6; }
-+# Check if -nopie works.
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
 +$as_echo_n "checking for -nopie option... " >&6; }
-+if ${gcc_cv_nopie+:} false; then :
+if test "${gcc_cv_nopie+set}" = set; then :
 +  $as_echo_n "(cached) " >&6
 +else
 +  saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+     LDFLAGS="$LDFLAGS -nopie"
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 +/* end confdefs.h.  */
 +int main(void) {return 0;}
 +_ACEOF
@@ -35,51 +36,40 @@ index 23da7d55d..f38732bb2 100755
 +fi
 +rm -f core conftest.err conftest.$ac_objext \
 +    conftest$ac_exeext conftest.$ac_ext
-+   LDFLAGS="$saved_LDFLAGS"
+     LDFLAGS="$saved_LDFLAGS"
 +fi
 +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_nopie" >&5
 +$as_echo "$gcc_cv_nopie" >&6; }
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ 
+ 
 diff --git a/gcc/configure.ac b/gcc/configure.ac
-index d7cf0b92c..db2e2c802 100644
+index 5504bf6eb01..57268319de1 100644
 --- a/gcc/configure.ac
 +++ b/gcc/configure.ac
-@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option],
-      [gcc_cv_no_pie=yes],
-      [gcc_cv_no_pie=no])
+@@ -7552,6 +7552,19 @@ AC_CACHE_CHECK([for -no-pie option],
    LDFLAGS="$saved_LDFLAGS"])
-+# Check if -nopie works.
-+AC_CACHE_CHECK([for -nopie option],
-+  [gcc_cv_nopie],
-+  [saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   AC_LINK_IFELSE([AC_LANG_SOURCE([int main(void) {return 0;}])],
-+     [gcc_cv_nopie=yes],
-+     [gcc_cv_nopie=no])
-+   LDFLAGS="$saved_LDFLAGS"])
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  AC_CACHE_CHECK([for -nopie option],
+    [gcc_cv_nopie],
+    [saved_LDFLAGS="$LDFLAGS"
+     LDFLAGS="$LDFLAGS -nopie"
+     AC_LINK_IFELSE([int main(void) {return 0;}],
+       [gcc_cv_nopie=yes],
+       [gcc_cv_nopie=no])
+     LDFLAGS="$saved_LDFLAGS"])
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ AC_SUBST([NO_PIE_FLAG])
+ 
 -- 
 2.41.0

@@ -46,10 +46,10 @@ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
 index f8c2c351e5a..8d9881eadeb 100644
 --- a/gcc/config/riscv/linux.h
 +++ b/gcc/config/riscv/linux.h
-@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3.  If not see
- 	%{rdynamic:-export-dynamic} \
- 	-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
-     %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}"
+@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3.  If not see
+     %{static:-static}}"
+ 
+ #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 -
 -#define STARTFILE_PREFIX_SPEC 			\
 -   "/lib" XLEN_SPEC "/" ABI_SPEC "/ "		\
@@ -41,15 +41,6 @@ index 96306f8cc9a..090b6770ae5 100644
   LIBGNAT_TARGET_PAIRS = \
   a-intnam.ads<libgnarl/a-intnam__linux.ads \
   s-inmaop.adb<libgnarl/s-inmaop__posix.adb \
-@@ -2311,7 +2311,7 @@ ifeq ($(strip $(filter-out aarch64% linux%,$(target_cpu) $(target_os))),)
-   s-intman.adb<libgnarl/s-intman__posix.adb \
-   s-linux.ads<libgnarl/s-linux.ads \
-   $(TRASYM_DWARF_UNIX_PAIRS) \
-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
-+  s-tsmona.adb<libgnat/s-tsmona.adb \
-   s-mudido.adb<libgnarl/s-mudido__affinity.adb \
-   s-osinte.ads<libgnarl/s-osinte__linux.ads \
-   s-osinte.adb<libgnarl/s-osinte__posix.adb \
@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
   s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
@@ -1,32 +0,0 @@
-From c4f484f465a32e796ae384aa3f90e79fa218b4e9 Mon Sep 17 00:00:00 2001
-From: Jingyun Hua <huajingyun@loongson.cn>
-Date: Mon, 7 Aug 2023 15:25:58 +0800
-Subject: [PATCH] loongarch disable multilib support
-
-Signed-off-by: Jingyun Hua <huajingyun@loongson.cn>
---
- gcc/config/loongarch/t-linux    | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux
-index 23e1fb979..c2753abb8 100644
--- a/gcc/config/loongarch/t-linux
-+++ b/gcc/config/loongarch/t-linux
-@@ -21,11 +21,6 @@ MULTIOSDIR_lp64f := ../lib64/f32$(call if_multiarch,:loongarch64-linux-gnuf32)
- MULTIOSDIR_lp64s := ../lib64/sf$(call if_multiarch,:loongarch64-linux-gnusf)
- 
- # Don't define MULTILIB_OSDIRNAMES if multilib is disabled.
-ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),)
-
-    MULTILIB_OSDIRNAMES = .=$(MULTIOSDIR_$(mlib_default))
-    MULTILIB_OSDIRNAMES += mabi.lp64d=$(MULTIOSDIR_lp64d)
-    MULTILIB_OSDIRNAMES += mabi.lp64f=$(MULTIOSDIR_lp64f)
-    MULTILIB_OSDIRNAMES += mabi.lp64s=$(MULTIOSDIR_lp64s)
-
-endif
-+    MULTILIB_OSDIRNAMES =  mabi.lp64d=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64f=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64s=../lib
-- 
-2.41.0
-
@@ -0,0 +1,186 @@
+https://gcc.gnu.org/PR110792
+https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=790c1f60a5662b16eb19eb4b81922995863c7571
+https://github.com/randombit/botan/issues/3637
+
+From 85628c5653ff40963158a24c60eeec6a3b5a8e56 Mon Sep 17 00:00:00 2001
+From: Roger Sayle <roger@nextmovesoftware.com>
+Date: Thu, 3 Aug 2023 07:12:04 +0100
+Subject: [PATCH] PR target/110792: Early clobber issues with
+ rot32di2_doubleword on i386.
+
+This patch is a conservative fix for PR target/110792, a wrong-code
+regression affecting doubleword rotations by BITS_PER_WORD, which
+effectively swaps the highpart and lowpart words, when the source to be
+rotated resides in memory. The issue is that if the register used to
+hold the lowpart of the destination is mentioned in the address of
+the memory operand, the current define_insn_and_split unintentionally
+clobbers it before reading the highpart.
+
+Hence, for the testcase, the incorrectly generated code looks like:
+
+        salq    $4, %rdi		// calculate address
+        movq    WHIRL_S+8(%rdi), %rdi	// accidentally clobber addr
+        movq    WHIRL_S(%rdi), %rbp	// load (wrong) lowpart
+
+Traditionally, the textbook way to fix this would be to add an
+explicit early clobber to the instruction's constraints.
+
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ [(set (match_operand:DI 0 "register_operand" "=r,r,&r")
+        (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+                       (const_int 32)))]
+
+but unfortunately this currently generates significantly worse code,
+due to a strange choice of reloads (effectively memcpy), which ends up
+looking like:
+
+        salq    $4, %rdi		// calculate address
+        movdqa  WHIRL_S(%rdi), %xmm0	// load the double word in SSE reg.
+        movaps  %xmm0, -16(%rsp)	// store the SSE reg back to the stack
+        movq    -8(%rsp), %rdi		// load highpart
+        movq    -16(%rsp), %rbp		// load lowpart
+
+Note that reload's "&" doesn't distinguish between the memory being
+early clobbered, vs the registers used in an addressing mode being
+early clobbered.
+
+The fix proposed in this patch is to remove the third alternative, that
+allowed offsetable memory as an operand, forcing reload to place the
+operand into a register before the rotation.  This results in:
+
+        salq    $4, %rdi
+        movq    WHIRL_S(%rdi), %rax
+        movq    WHIRL_S+8(%rdi), %rdi
+        movq    %rax, %rbp
+
+I believe there's a more advanced solution, by swapping the order of
+the loads (if first destination register is mentioned in the address),
+or inserting a lea insn (if both destination registers are mentioned
+in the address), but this fix is a minimal "safe" solution, that
+should hopefully be suitable for backporting.
+
+2023-08-03  Roger Sayle  <roger@nextmovesoftware.com>
+
+gcc/ChangeLog
+	PR target/110792
+	* config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
+	place operand in a register before gen_<insn>64ti2_doubleword.
+	(<any_rotate>di3): Likewise, for rotations by 32 bits, place
+	operand in a register before gen_<insn>32di2_doubleword.
+	(<any_rotate>32di2_doubleword): Constrain operand to be in register.
+	(<any_rotate>64ti2_doubleword): Likewise.
+
+gcc/testsuite/ChangeLog
+	PR target/110792
+	* g++.target/i386/pr110792.C: New 32-bit C++ test case.
+	* gcc.target/i386/pr110792.c: New 64-bit C test case.
+
+(cherry picked from commit 790c1f60a5662b16eb19eb4b81922995863c7571)
+---
+ gcc/config/i386/i386.md                  | 18 ++++++++++++------
+ gcc/testsuite/g++.target/i386/pr110792.C | 16 ++++++++++++++++
+ gcc/testsuite/gcc.target/i386/pr110792.c | 18 ++++++++++++++++++
+ 3 files changed, 46 insertions(+), 6 deletions(-)
+ create mode 100644 gcc/testsuite/g++.target/i386/pr110792.C
+ create mode 100644 gcc/testsuite/gcc.target/i386/pr110792.c
+
+diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
+index f3a3305..a71e837 100644
+--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
+@@ -14359,7 +14359,10 @@
+     emit_insn (gen_ix86_<insn>ti3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 64)
+-    emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (TImode, operands[1]);
+      emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    }
+   else
+     {
+       rtx amount = force_reg (QImode, operands[2]);
+@@ -14394,7 +14397,10 @@
+     emit_insn (gen_ix86_<insn>di3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 32)
+-    emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    }
+   else
+     FAIL;
+ 
+@@ -14562,8 +14568,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+-       (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
+       (any_rotate:DI (match_operand:DI 1 "register_operand" "0,r")
+                       (const_int 32)))]
+  "!TARGET_64BIT"
+  "#"
+@@ -14580,8 +14586,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>64ti2_doubleword"
+- [(set (match_operand:TI 0 "register_operand" "=r,r,r")
+-       (any_rotate:TI (match_operand:TI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:TI 0 "register_operand" "=r,r")
+       (any_rotate:TI (match_operand:TI 1 "register_operand" "0,r")
+                       (const_int 64)))]
+  "TARGET_64BIT"
+  "#"
+diff --git a/gcc/testsuite/g++.target/i386/pr110792.C b/gcc/testsuite/g++.target/i386/pr110792.C
+new file mode 100644
+index 0000000..ce21a7a
+--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr110792.C
+@@ -0,0 +1,16 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+template <int ROT, typename T>
+inline T rotr(T input)
+{
+   return static_cast<T>((input >> ROT) | (input << (8 * sizeof(T) - ROT)));
+}
+
+unsigned long long WHIRL_S[256] = {0x18186018C07830D8};
+unsigned long long whirl(unsigned char x0)
+{
+   const unsigned long long s4 = WHIRL_S[x0&0xFF];
+   return rotr<32>(s4);
+}
+/* { dg-final { scan-assembler-not "movl\tWHIRL_S\\+4\\(,%eax,8\\), %eax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr110792.c b/gcc/testsuite/gcc.target/i386/pr110792.c
+new file mode 100644
+index 0000000..b65125c
+--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr110792.c
+@@ -0,0 +1,18 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+
+static inline unsigned __int128 rotr(unsigned __int128 input)
+{
+   return ((input >> 64) | (input << (64)));
+}
+
+unsigned __int128 WHIRL_S[256] = {((__int128)0x18186018C07830D8) << 64 |0x18186018C07830D8};
+unsigned __int128 whirl(unsigned char x0)
+{
+   register int t __asm("rdi") = x0&0xFF;
+   const unsigned __int128 s4 = WHIRL_S[t];
+   register unsigned __int128 tt  __asm("rdi") = rotr(s4);
+   asm("":::"memory");
+   return tt;
+}
+/* { dg-final { scan-assembler-not "movq\tWHIRL_S\\+8\\(%rdi\\), %rdi" } } */
+-- 
+2.41.0
+
@@ -24,7 +24,7 @@ CBUILDROOT="/"
 _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET"

 pkgname=gcc-aarch64
-pkgver=14.2.0
+pkgver=13.2.1_git20231014
 # i.e. 13.2.1, must match gcc/BASE-VER
 _pkgbase="${pkgver%%_git*}"
 # date component from snapshots
@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""

 pkgname=gcc-aarch64
-pkgrel=2
+pkgrel=0
 pkgdesc="Stage2 cross-compiler for aarch64"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -46,7 +46,6 @@ makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-
 subpackages="g++-aarch64:gpp libstdc++-dev-aarch64:libcxx_dev"
 [ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc$_target"
 replaces="libstdc++ binutils"
-options="!strip"

 : "${LANG_CXX:=true}"
 : "${LANG_D:=true}"
@@ -144,7 +143,7 @@ case "$CARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -156,7 +155,6 @@ case "$CTARGET_ARCH" in
 arm*)		_libitm=false ;;
 mips*)		_libitm=false ;;
 riscv64)	_libitm=false ;;
-loongarch64)	_libitm=false ;;
 esac

 # Internal libffi fails to build on MIPS at the moment, need to
@@ -164,14 +162,13 @@ esac
 # the internal libffi.
 case "$CTARGET_ARCH" in
 mips*)		LANG_GO=false ;;
-loongarch64)	LANG_GO=false ;;
 esac

 # Fortran uses libquadmath if toolchain has __float128
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac

@@ -189,11 +186,6 @@ riscv64)
 LANG_ADA=false;;
 esac

-case "$CTARGET_ARCH" in
-loongarch64)
-LANG_ADA=false;;
-esac
-
 _languages=c
 if $LANG_CXX; then
 	_languages="$_languages,c++"
@@ -241,8 +233,7 @@ makedepends="$makedepends_build $makedepends_host"
 #
 # PLEASE submit all patches to gcc to https://gitlab.alpinelinux.org/kaniini/alpine-gcc-patches,
 # so that they can be properly tracked and easily rebased if needed.
-#source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
-source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkgbase:-$pkgver}.tar.xz
+source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
 	0001-posix_memalign.patch
 	0002-gcc-poison-system-directories.patch
 	0003-specs-turn-on-Wl-z-now-by-default.patch
@@ -277,8 +268,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
-	0035-loongarch-disable-multilib-support.patch
-	fix-arm64.patch
+	0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 	"

 # secfixes:
@@ -286,8 +276,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 #     - CVE-2023-4039

 # we build out-of-tree
-#_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
-_gccdir="$srcdir"/gcc-${_pkgbase:-$pkgver}
+_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
 _gcclibdir="/usr/lib/gcc/$CTARGET/${_pkgbase:-$pkgver}"
 _gcclibexec="/usr/libexec/gcc/$CTARGET/${_pkgbase:-$pkgver}"

@@ -339,7 +328,6 @@ build() {
 	i586-*-*-*)		_arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";;
 	s390x-*-*-*)		_arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";;
 	riscv64-*-*-*)		_arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";;
-	loongarch64-*-*-*)      _arch_configure="--with-arch=loongarch64 --with-abi=lp64d --with-tls=trad";;
 	esac

 	case "$CTARGET_ARCH" in
@@ -366,14 +354,7 @@ build() {
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"

 	msg "Building the following:"
 	echo ""
@@ -702,6 +683,10 @@ go() {
 	depends="gcc=$_gccrel libgo=$_gccrel !go"
 	install="$pkgname-go.post-install"

+	# See https://lists.alpinelinux.org/~alpine/devel/%3C33KG0XO61I4IL.2Z7RTAZ5J3SY6%408pit.net%3E
+	provides="go-bootstrap"
+	provider_priority=1 # lowest, see community/go
+
 	mkdir -p "$subpkgdir"/$_gcclibexec \
 		"$subpkgdir"/usr/lib \
 		"$subpkgdir"/usr/bin
@@ -802,9 +787,9 @@ gdb() {
 }

 sha512sums="
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+406673a62deba759fc0532a801b3f57cabf894ea328587b23e62a707ba5767b0e3ae9b3f86bf3c6fcf13e8a3c30bc470e6598b625c8231efb629034211c162c2  gcc-13-20231014.tar.xz
 1ecffba1b07d60e1b4422302b032bbea918b674c8e12b30aa6965b544d700ce86b61e9f7b8d402c6caf59257f491a394dd0912f0948565d6eae9335ee54f3b35  0001-posix_memalign.patch
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+163f282455b6a4df33f011bcd8b0440566ba0ffaeeab30d8ac52d39948980a56881ca0eff60687129d59556389a58b9d64e7768750bd70b1fe0fedbc9fc30dc2  0002-gcc-poison-system-directories.patch
 3f24bb6a50d3c45b71ea05590e32fe3e69b91377ab185352891d5035c76ed193117c6d0b314a4c364bcf136b9a9dd5c926d6c7c30ab436976c121ebfea8d3ddd  0003-specs-turn-on-Wl-z-now-by-default.patch
 17a2993027d3ddf8595952ebcae425695ddc7b1cf73b384d2e55fddecb9cbf3f6482860a502ff69b14075e12badf27300fd3039f3a9005e851fd8d121d258c2b  0004-Turn-on-D_FORTIFY_SOURCE-2-by-default-for-C-C-ObjC-O.patch
 444550e55491ff89fe8cbbb4b73d017c9c147cdce1ad5c0561fe7d6ab3834515a814c7676c408cfeec18e1aaace27b3c26a2ffe4a75042285df5124976c38672  0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch
@@ -815,7 +800,7 @@ sha512sums="
 da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02daf8e34f60c08b61f5d3959305886dca9bbcdc84db057258d9  0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch
 35b9aafe7eee8138cb7aad7164a8f77c15ccdce26843cee78b5871ef91d76cad22ed0871b20f51c4b89b71afd9cfe4ba4227086e158c466558513708fe7d2a1a  0011-libiberty-copy-PIC-objects-during-build-process.patch
 9d43f844fad0ac6e1c35a2b6f461f9278ae09e468f2c9ae8adc43accbe6934994aa10d3a433644d1393a4a76e3caed69e3191db7f3c0c24b4e7a0a0a0cbac3f1  0012-libgcc_s.patch
-91dde3079c1400c124ab5604597f5857185d075809649603aa3641a4581b34029bfcbd4281a5bd925d1c5e6e3b1f5f3322efda34345c6930652d685a6c9525f4  0013-nopie.patch
+b2c4921c5eef33ee43a92ab5ec7f09d5d3adb49a2416595001e6376ffdf652ef9d0dc21778c3a86e45334290dbe467a4e891ed34a6522e0c72f746def22e8663  0013-nopie.patch
 0b50ad15115192699efa9fda3d4fb1c2fa95da06d7880ba34615b40c19a8256e1fe364da39f5c70dc22fbccf21db2de5900932afef68948722eeb25e435262f8  0014-ada-fix-shared-linking.patch
 00097c7106625ccf02149a757366f434c48f2abe824bb8b4bf067d29308889cb6039a5e5b2d3bd2683617693b47707d549252c56eea6bc3cdc2450a8d14f46a7  0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch
 7f0bc42b93a389b614054e700b851abfbc53db391aa10cbdf6990d41396b293af78980bb39f1cf0967184d3fbf3d46ac7c7f096717b8f193ea34cbf7f37d7e91  0016-add-fortify-headers-paths.patch
@@ -825,10 +810,10 @@ da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02da
 a9567947471c3ba8a547a79c55e183974554bf823d9a97a165c966d7b3caad8789980e096e3b78452ece5de062bd9bb006af464bbf0c5a35b689eac3ee21e5c5  0020-s390x-disable-multilib-support.patch
 f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8b7944fa17487478e73958be45d5782ccb9ef501961fb9a96  0021-ppc64-le-disable-multilib-support.patch
 44ab86feb8e41e7c2b2e27accdf46194c9b80ee6a39543303dc04824f669d9fad182aabd40c9c7f6c265cf9bb71be830c257be115dc9d701d54eca3aa9ef174e  0022-x86_64-disable-multilib-support.patch
-abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
+e0763083c31485e8ac0b3724376a28af01bb6f50e1a054780b61886e4e3de2a35d127e6e353eb8d8729964ada9b5751bf05bdd51df539667008216db38f228a3  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+30369bea84020c32d514196ba3adb3d09d2d0359af5550bd3f9719aa357e44b2f695623c1d2a99416e120dc86896c196c5dd4f638183dced4799604137385367  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,6 +822,5 @@ d47b559075f40d526235f47b91da1d0cf6bfe6c5b7311bbfe08af9dd6e8f27e6c7cd82e3b2d529aa
 b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95e21c9ffbf2412193f8b9fc89a4c36fa5a6a041661ac7399d  0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
-65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+cc1e10ac6e72db816f09325e301103109cc212a6f3de3ce0b9b038d149233c467319d203941695dbf3d7b9e2dcbbcd17609cdb056e831fcc323cd592423882d8  0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 "
@@ -1,544 +0,0 @@
-From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Thu, 13 Jun 2024 12:48:21 +0100
-Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
-
-The testcase extracts one arm_neon.h vector from a pair (one subreg)
-and then reinterprets the result as an SVE vector (another subreg).
-Each subreg makes sense individually, but we can't fold them together
-into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
-but the interpretation of 32 bytes -> 16*N bytes depends on
-whether N==1 or N>1.
-
-Since the second subreg makes sense individually, simplify_subreg
-should bail out rather than ICE on it.  simplify_gen_subreg will
-then do the same (because it already checks validate_subreg).
-This leaves simplify_gen_subreg returning null, requiring the
-caller to take appropriate action.
-
-I think this is relatively likely to occur elsewhere, so the patch
-adds a helper for forcing a subreg, allowing a temporary pseudo to
-be created where necessary.
-
-I'll follow up by using force_subreg in more places.  This patch
-is intended to be a minimal backportable fix for the PR.
-
-gcc/
-	PR target/115464
-	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
-	to fold two subregs together if their relationship isn't known
-	at compile time.
-	* explow.h (force_subreg): Declare.
-	* explow.cc (force_subreg): New function.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
-
-(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
---
- gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
- gcc/explow.cc                                     | 15 +++++++++++++++
- gcc/explow.h                                      |  2 ++
- gcc/simplify-rtx.cc                               |  5 +++++
- .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
- 5 files changed, 36 insertions(+), 1 deletion(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 0d2edf3f19e..c9182594bc1 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1174,7 +1174,7 @@ public:
-        Advanced SIMD argument as an SVE vector.  */
-     if (!BYTES_BIG_ENDIAN
- 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
-+      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
- 
-     rtx_vector_builder builder (VNx16BImode, 16, 2);
-     for (unsigned int i = 0; i < 16; i++)
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index 8e5f6b8e680..f6843398c4b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
-   return temp;
- }
- 
-+/* Like simplify_gen_subreg, but force OP into a new register if the
-+   subreg cannot be formed directly.  */
-+
-+rtx
-+force_subreg (machine_mode outermode, rtx op,
-+	      machine_mode innermode, poly_uint64 byte)
-+{
-+  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
-+  if (x)
-+    return x;
-+
-+  op = copy_to_mode_reg (innermode, op);
-+  return simplify_gen_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index 16aa02cfb68..cbd1fcb7eb3 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
-    Args are mode (in case value is a constant) and the value.  */
- extern rtx force_reg (machine_mode, rtx);
- 
-+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
- 
-diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
-index dceaa13333c..729d408aa55 100644
--- a/gcc/simplify-rtx.cc
-+++ b/gcc/simplify-rtx.cc
-@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
-       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
-       rtx newx;
- 
-+      /* Make sure that the relationship between the two subregs is
-+	 known at compile time.  */
-+      if (!ordered_p (outersize, innermostsize))
-+	return NULL_RTX;
-+
-       if (outermode == innermostmode
- 	  && known_eq (byte, 0U)
- 	  && known_eq (SUBREG_BYTE (op), 0))
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-new file mode 100644
-index 00000000000..d728d1325ed
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-@@ -0,0 +1,13 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl)
-+{
-+    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
-+}
-+
-+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
-- 
-2.46.0
-
-
-From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:30 +0100
-Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
-
-This patch makes the aarch64 code use force_subreg instead of
-simplify_gen_subreg in more places.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-(3) The offset wasn't a simple lowpart or highpart calculation;
-    a later patch will deal with those.
-
-gcc/
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
-	Use force_subreg instead of simplify_gen_subreg.
-	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svget_impl::expand): Likewise.
-	(svget_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-functions.h
-	(multireg_permute::expand): Likewise.
-
-(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
---
- gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
- gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
- gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
- gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
- 4 files changed, 10 insertions(+), 12 deletions(-)
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index 75d21de1401..b2e46a073a8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-       rtx temp2 = gen_reg_rtx (DImode);
-       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
- 				   subreg_lowpart_offset (d->mode, quadmode));
-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
-+      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-       else
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
-+      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
- 
-       /* And recalculate the index.  */
-       lane -= nunits / 4;
-diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
-index 33ab0741e87..5b9efe0b165 100644
--- a/gcc/config/aarch64/aarch64-simd.md
-+++ b/gcc/config/aarch64/aarch64-simd.md
-@@ -412,8 +412,8 @@
-   "TARGET_SIMD"
-   {
-      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
-					     <MODE>mode, 0);
-+     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
-+				       <MODE>mode, 0);
-      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
-      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
-      DONE;
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index c9182594bc1..2c95da79572 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1121,9 +1121,8 @@ public:
-   expand (function_expander &e) const override
-   {
-     /* Fold the access into a subreg rvalue.  */
-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
-				GET_MODE (e.args[0]),
-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-+    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
-+			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-   }
- };
- 
-@@ -1157,8 +1156,7 @@ public:
- 	e.add_fixed_operand (indices);
- 	return e.generate_insn (icode);
-       }
-    return simplify_gen_subreg (e.result_mode (), e.args[0],
-				GET_MODE (e.args[0]), 0);
-+    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
-   }
- };
- 
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-index 3b8e575e98e..7d06a57ff83 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-@@ -639,9 +639,9 @@ public:
-       {
- 	machine_mode elt_mode = e.vector_mode (0);
- 	rtx arg = e.args[0];
-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
-					       GET_MODE_SIZE (elt_mode)));
-+	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
-+	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
-+					GET_MODE_SIZE (elt_mode)));
-       }
-     return e.use_exact_insn (icode);
-   }
-- 
-2.46.0
-
-
-From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
-
-This patch makes more use of force_lowpart_subreg, similarly
-to the recent patch for force_subreg.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-gcc/
-	PR target/115464
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
-	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
-	simplify_gen_subreg and lowpart_subreg.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-sme.cc
-	(add_load_store_slice_operand): Likewise.
-	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
-	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
-
-(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
---
- gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
- gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
- gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
- gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
- .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
- 5 files changed, 23 insertions(+), 17 deletions(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index b2e46a073a8..264b9560709 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-   int lane = INTVAL (lane_idx);
- 
-   if (lane < nunits / 4)
-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
-			       subreg_lowpart_offset (d->mode, quadmode));
-+    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
-   else
-     {
-       /* Select the upper 64 bits, either a V2SF or V4HF, this however
-@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
- 	 gen_highpart_mode generates code that isn't optimal.  */
-       rtx temp1 = gen_reg_rtx (d->mode);
-       rtx temp2 = gen_reg_rtx (DImode);
-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
-				   subreg_lowpart_offset (d->mode, quadmode));
-+      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
-       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
- 	case AARCH64_WSR64:
- 	case AARCH64_WSRF64:
- 	case AARCH64_WSR128:
-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
-+	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
- 	  break;
- 	case AARCH64_WSRF:
- 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
-@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
-     case AARCH64_RSR64:
-     case AARCH64_RSRF64:
-     case AARCH64_RSR128:
-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
-+      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
-+				   target, sysreg_mode);
-     case AARCH64_RSRF:
-       subreg = gen_lowpart_SUBREG (SImode, target);
-       return gen_lowpart_SUBREG (SFmode, subreg);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 2c95da79572..3c970e9c5f8 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1183,7 +1183,7 @@ public:
-     if (BYTES_BIG_ENDIAN)
-       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
-     insn_code icode = code_for_vcond_mask (mode, mode);
-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-+    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-     e.add_output_operand (icode);
-     e.add_input_operand (icode, e.args[1]);
-     e.add_input_operand (icode, e.args[0]);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-index f4c91bcbb95..b66b35ae60b 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
-   rtx base = e.args[argno];
-   if (e.mode_suffix_id == MODE_vnum)
-     {
-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-+      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-       base = simplify_gen_binary (PLUS, SImode, base, vnum);
-     }
-   e.add_input_operand (icode, base);
-diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
-index 1beec94629d..a064aeecbc0 100644
--- a/gcc/config/aarch64/aarch64.cc
-+++ b/gcc/config/aarch64/aarch64.cc
-@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
-   /* can_change_mode_class must only return true if subregs and svreinterprets
-      have the same semantics.  */
-   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
-    return lowpart_subreg (mode, x, GET_MODE (x));
-+    return force_lowpart_subreg (mode, x, GET_MODE (x));
- 
-   rtx res = gen_reg_rtx (mode);
-   x = force_reg (GET_MODE (x), x);
-@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			    rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = gen_lowpart (DImode, op1);
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
-   *high_in1 = gen_highpart (DImode, op1);
-   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			     rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
- 
-   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-new file mode 100644
-index 00000000000..f561c34f732
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-@@ -0,0 +1,11 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
-+{
-+    return svset_neonq_u16 (a, permute_tbl.val[1]);
-+}
-- 
-2.46.0
-
-
-From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 4/4] Add force_lowpart_subreg
-
-optabs had a local function called lowpart_subreg_maybe_copy
-that is very similar to the lowpart version of force_subreg.
-This patch adds a force_lowpart_subreg wrapper around
-force_subreg and uses it in optabs.cc.
-
-The only difference between the old and new functions is that
-the old one asserted success while the new one doesn't.
-It's common not to assert elsewhere when taking subregs;
-normally a null result is enough.
-
-Later patches will make more use of the new function.
-
-gcc/
-	* explow.h (force_lowpart_subreg): Declare.
-	* explow.cc (force_lowpart_subreg): New function.
-	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
-	(expand_absneg_bit): Use force_lowpart_subreg instead of
-	lowpart_subreg_maybe_copy.
-	(expand_copysign_bit): Likewise.
-
-(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
---
- gcc/explow.cc | 14 ++++++++++++++
- gcc/explow.h  |  1 +
- gcc/optabs.cc | 24 ++----------------------
- 3 files changed, 17 insertions(+), 22 deletions(-)
-
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index f6843398c4b..5fdfa81f69b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
-   return simplify_gen_subreg (outermode, op, innermode, byte);
- }
- 
-+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
-+   which has mode INNERMODE.  Allow OP to be forced into a new register
-+   if necessary.
-+
-+   Return null on failure.  */
-+
-+rtx
-+force_lowpart_subreg (machine_mode outermode, rtx op,
-+		      machine_mode innermode)
-+{
-+  auto byte = subreg_lowpart_offset (outermode, innermode);
-+  return force_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index cbd1fcb7eb3..dd654649b06 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
- extern rtx force_reg (machine_mode, rtx);
- 
- extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
- 
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
-diff --git a/gcc/optabs.cc b/gcc/optabs.cc
-index ce91f94ed43..804c0dc73ba 100644
--- a/gcc/optabs.cc
-+++ b/gcc/optabs.cc
-@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
-   return 0;
- }
- 
-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
-   conditions, VAL may already be a SUBREG against which we cannot generate
-   a further SUBREG.  In this case, we expect forcing the value into a
-   register will work around the situation.  */
-
-static rtx
-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
-			   machine_mode imode)
-{
-  rtx ret;
-  ret = lowpart_subreg (omode, val, imode);
-  if (ret == NULL)
-    {
-      val = force_reg (imode, val);
-      ret = lowpart_subreg (omode, val, imode);
-      gcc_assert (ret != NULL);
-    }
-  return ret;
-}
-
- /* Expand a floating point absolute value or negation operation via a
-    logical operation on the sign bit.  */
- 
-@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
- 			   gen_lowpart (imode, op0),
- 			   immed_wide_int_const (mask, imode),
- 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
- 
-       set_dst_reg_note (get_last_insn (), REG_EQUAL,
- 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
-@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
- 
-       temp = expand_binop (imode, ior_optab, op0, op1,
- 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
-     }
- 
-   return target;
-- 
-2.46.0
-
@@ -150,13 +150,13 @@ diff --git a/gcc/gcc.cc b/gcc/gcc.cc
 index 16bb07f2cdc..33b56e721d2 100644
 --- a/gcc/gcc.cc
 +++ b/gcc/gcc.cc
-@@ -1177,6 +1187,8 @@ proper position among the other output files.  */
-    "-z now " \
+@@ -1146,6 +1146,8 @@ proper position among the other output files.  */
+    "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
    "%X %{o*} %{e*} %{N} %{n} %{r}\
     %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
 +    %{Wno-poison-system-directories:--no-poison-system-directories} \
 +    %{Werror=poison-system-directories:--error-poison-system-directories} \
-     %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \
+     %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \
     VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \
     %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\
 diff --git a/gcc/incpath.cc b/gcc/incpath.cc
@@ -9,22 +9,23 @@ Subject: [PATCH 13/35] nopie
 2 files changed, 40 insertions(+)

 diff --git a/gcc/configure b/gcc/configure
-index 23da7d55d..f38732bb2 100755
+index 8c46369f73f..e59cbee1767 100755
 --- a/gcc/configure
 +++ b/gcc/configure
-@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \
- fi
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5
+@@ -32268,6 +32268,33 @@ fi
 $as_echo "$gcc_cv_no_pie" >&6; }
-+# Check if -nopie works.
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
 +$as_echo_n "checking for -nopie option... " >&6; }
-+if ${gcc_cv_nopie+:} false; then :
+if test "${gcc_cv_nopie+set}" = set; then :
 +  $as_echo_n "(cached) " >&6
 +else
 +  saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+     LDFLAGS="$LDFLAGS -nopie"
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 +/* end confdefs.h.  */
 +int main(void) {return 0;}
 +_ACEOF
@@ -35,51 +36,40 @@ index 23da7d55d..f38732bb2 100755
 +fi
 +rm -f core conftest.err conftest.$ac_objext \
 +    conftest$ac_exeext conftest.$ac_ext
-+   LDFLAGS="$saved_LDFLAGS"
+     LDFLAGS="$saved_LDFLAGS"
 +fi
 +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_nopie" >&5
 +$as_echo "$gcc_cv_nopie" >&6; }
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ 
+ 
 diff --git a/gcc/configure.ac b/gcc/configure.ac
-index d7cf0b92c..db2e2c802 100644
+index 5504bf6eb01..57268319de1 100644
 --- a/gcc/configure.ac
 +++ b/gcc/configure.ac
-@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option],
-      [gcc_cv_no_pie=yes],
-      [gcc_cv_no_pie=no])
+@@ -7552,6 +7552,19 @@ AC_CACHE_CHECK([for -no-pie option],
    LDFLAGS="$saved_LDFLAGS"])
-+# Check if -nopie works.
-+AC_CACHE_CHECK([for -nopie option],
-+  [gcc_cv_nopie],
-+  [saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   AC_LINK_IFELSE([AC_LANG_SOURCE([int main(void) {return 0;}])],
-+     [gcc_cv_nopie=yes],
-+     [gcc_cv_nopie=no])
-+   LDFLAGS="$saved_LDFLAGS"])
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  AC_CACHE_CHECK([for -nopie option],
+    [gcc_cv_nopie],
+    [saved_LDFLAGS="$LDFLAGS"
+     LDFLAGS="$LDFLAGS -nopie"
+     AC_LINK_IFELSE([int main(void) {return 0;}],
+       [gcc_cv_nopie=yes],
+       [gcc_cv_nopie=no])
+     LDFLAGS="$saved_LDFLAGS"])
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ AC_SUBST([NO_PIE_FLAG])
+ 
 -- 
 2.41.0

@@ -46,10 +46,10 @@ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
 index f8c2c351e5a..8d9881eadeb 100644
 --- a/gcc/config/riscv/linux.h
 +++ b/gcc/config/riscv/linux.h
-@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3.  If not see
- 	%{rdynamic:-export-dynamic} \
- 	-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
-     %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}"
+@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3.  If not see
+     %{static:-static}}"
+ 
+ #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 -
 -#define STARTFILE_PREFIX_SPEC 			\
 -   "/lib" XLEN_SPEC "/" ABI_SPEC "/ "		\
@@ -41,15 +41,6 @@ index 96306f8cc9a..090b6770ae5 100644
   LIBGNAT_TARGET_PAIRS = \
   a-intnam.ads<libgnarl/a-intnam__linux.ads \
   s-inmaop.adb<libgnarl/s-inmaop__posix.adb \
-@@ -2311,7 +2311,7 @@ ifeq ($(strip $(filter-out aarch64% linux%,$(target_cpu) $(target_os))),)
-   s-intman.adb<libgnarl/s-intman__posix.adb \
-   s-linux.ads<libgnarl/s-linux.ads \
-   $(TRASYM_DWARF_UNIX_PAIRS) \
-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
-+  s-tsmona.adb<libgnat/s-tsmona.adb \
-   s-mudido.adb<libgnarl/s-mudido__affinity.adb \
-   s-osinte.ads<libgnarl/s-osinte__linux.ads \
-   s-osinte.adb<libgnarl/s-osinte__posix.adb \
@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
   s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
@@ -1,32 +0,0 @@
-From c4f484f465a32e796ae384aa3f90e79fa218b4e9 Mon Sep 17 00:00:00 2001
-From: Jingyun Hua <huajingyun@loongson.cn>
-Date: Mon, 7 Aug 2023 15:25:58 +0800
-Subject: [PATCH] loongarch disable multilib support
-
-Signed-off-by: Jingyun Hua <huajingyun@loongson.cn>
---
- gcc/config/loongarch/t-linux    | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux
-index 23e1fb979..c2753abb8 100644
--- a/gcc/config/loongarch/t-linux
-+++ b/gcc/config/loongarch/t-linux
-@@ -21,11 +21,6 @@ MULTIOSDIR_lp64f := ../lib64/f32$(call if_multiarch,:loongarch64-linux-gnuf32)
- MULTIOSDIR_lp64s := ../lib64/sf$(call if_multiarch,:loongarch64-linux-gnusf)
- 
- # Don't define MULTILIB_OSDIRNAMES if multilib is disabled.
-ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),)
-
-    MULTILIB_OSDIRNAMES = .=$(MULTIOSDIR_$(mlib_default))
-    MULTILIB_OSDIRNAMES += mabi.lp64d=$(MULTIOSDIR_lp64d)
-    MULTILIB_OSDIRNAMES += mabi.lp64f=$(MULTIOSDIR_lp64f)
-    MULTILIB_OSDIRNAMES += mabi.lp64s=$(MULTIOSDIR_lp64s)
-
-endif
-+    MULTILIB_OSDIRNAMES =  mabi.lp64d=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64f=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64s=../lib
-- 
-2.41.0
-
@@ -0,0 +1,186 @@
+https://gcc.gnu.org/PR110792
+https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=790c1f60a5662b16eb19eb4b81922995863c7571
+https://github.com/randombit/botan/issues/3637
+
+From 85628c5653ff40963158a24c60eeec6a3b5a8e56 Mon Sep 17 00:00:00 2001
+From: Roger Sayle <roger@nextmovesoftware.com>
+Date: Thu, 3 Aug 2023 07:12:04 +0100
+Subject: [PATCH] PR target/110792: Early clobber issues with
+ rot32di2_doubleword on i386.
+
+This patch is a conservative fix for PR target/110792, a wrong-code
+regression affecting doubleword rotations by BITS_PER_WORD, which
+effectively swaps the highpart and lowpart words, when the source to be
+rotated resides in memory. The issue is that if the register used to
+hold the lowpart of the destination is mentioned in the address of
+the memory operand, the current define_insn_and_split unintentionally
+clobbers it before reading the highpart.
+
+Hence, for the testcase, the incorrectly generated code looks like:
+
+        salq    $4, %rdi		// calculate address
+        movq    WHIRL_S+8(%rdi), %rdi	// accidentally clobber addr
+        movq    WHIRL_S(%rdi), %rbp	// load (wrong) lowpart
+
+Traditionally, the textbook way to fix this would be to add an
+explicit early clobber to the instruction's constraints.
+
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ [(set (match_operand:DI 0 "register_operand" "=r,r,&r")
+        (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+                       (const_int 32)))]
+
+but unfortunately this currently generates significantly worse code,
+due to a strange choice of reloads (effectively memcpy), which ends up
+looking like:
+
+        salq    $4, %rdi		// calculate address
+        movdqa  WHIRL_S(%rdi), %xmm0	// load the double word in SSE reg.
+        movaps  %xmm0, -16(%rsp)	// store the SSE reg back to the stack
+        movq    -8(%rsp), %rdi		// load highpart
+        movq    -16(%rsp), %rbp		// load lowpart
+
+Note that reload's "&" doesn't distinguish between the memory being
+early clobbered, vs the registers used in an addressing mode being
+early clobbered.
+
+The fix proposed in this patch is to remove the third alternative, that
+allowed offsetable memory as an operand, forcing reload to place the
+operand into a register before the rotation.  This results in:
+
+        salq    $4, %rdi
+        movq    WHIRL_S(%rdi), %rax
+        movq    WHIRL_S+8(%rdi), %rdi
+        movq    %rax, %rbp
+
+I believe there's a more advanced solution, by swapping the order of
+the loads (if first destination register is mentioned in the address),
+or inserting a lea insn (if both destination registers are mentioned
+in the address), but this fix is a minimal "safe" solution, that
+should hopefully be suitable for backporting.
+
+2023-08-03  Roger Sayle  <roger@nextmovesoftware.com>
+
+gcc/ChangeLog
+	PR target/110792
+	* config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
+	place operand in a register before gen_<insn>64ti2_doubleword.
+	(<any_rotate>di3): Likewise, for rotations by 32 bits, place
+	operand in a register before gen_<insn>32di2_doubleword.
+	(<any_rotate>32di2_doubleword): Constrain operand to be in register.
+	(<any_rotate>64ti2_doubleword): Likewise.
+
+gcc/testsuite/ChangeLog
+	PR target/110792
+	* g++.target/i386/pr110792.C: New 32-bit C++ test case.
+	* gcc.target/i386/pr110792.c: New 64-bit C test case.
+
+(cherry picked from commit 790c1f60a5662b16eb19eb4b81922995863c7571)
+---
+ gcc/config/i386/i386.md                  | 18 ++++++++++++------
+ gcc/testsuite/g++.target/i386/pr110792.C | 16 ++++++++++++++++
+ gcc/testsuite/gcc.target/i386/pr110792.c | 18 ++++++++++++++++++
+ 3 files changed, 46 insertions(+), 6 deletions(-)
+ create mode 100644 gcc/testsuite/g++.target/i386/pr110792.C
+ create mode 100644 gcc/testsuite/gcc.target/i386/pr110792.c
+
+diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
+index f3a3305..a71e837 100644
+--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
+@@ -14359,7 +14359,10 @@
+     emit_insn (gen_ix86_<insn>ti3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 64)
+-    emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (TImode, operands[1]);
+      emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    }
+   else
+     {
+       rtx amount = force_reg (QImode, operands[2]);
+@@ -14394,7 +14397,10 @@
+     emit_insn (gen_ix86_<insn>di3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 32)
+-    emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    }
+   else
+     FAIL;
+ 
+@@ -14562,8 +14568,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+-       (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
+       (any_rotate:DI (match_operand:DI 1 "register_operand" "0,r")
+                       (const_int 32)))]
+  "!TARGET_64BIT"
+  "#"
+@@ -14580,8 +14586,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>64ti2_doubleword"
+- [(set (match_operand:TI 0 "register_operand" "=r,r,r")
+-       (any_rotate:TI (match_operand:TI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:TI 0 "register_operand" "=r,r")
+       (any_rotate:TI (match_operand:TI 1 "register_operand" "0,r")
+                       (const_int 64)))]
+  "TARGET_64BIT"
+  "#"
+diff --git a/gcc/testsuite/g++.target/i386/pr110792.C b/gcc/testsuite/g++.target/i386/pr110792.C
+new file mode 100644
+index 0000000..ce21a7a
+--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr110792.C
+@@ -0,0 +1,16 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+template <int ROT, typename T>
+inline T rotr(T input)
+{
+   return static_cast<T>((input >> ROT) | (input << (8 * sizeof(T) - ROT)));
+}
+
+unsigned long long WHIRL_S[256] = {0x18186018C07830D8};
+unsigned long long whirl(unsigned char x0)
+{
+   const unsigned long long s4 = WHIRL_S[x0&0xFF];
+   return rotr<32>(s4);
+}
+/* { dg-final { scan-assembler-not "movl\tWHIRL_S\\+4\\(,%eax,8\\), %eax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr110792.c b/gcc/testsuite/gcc.target/i386/pr110792.c
+new file mode 100644
+index 0000000..b65125c
+--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr110792.c
+@@ -0,0 +1,18 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+
+static inline unsigned __int128 rotr(unsigned __int128 input)
+{
+   return ((input >> 64) | (input << (64)));
+}
+
+unsigned __int128 WHIRL_S[256] = {((__int128)0x18186018C07830D8) << 64 |0x18186018C07830D8};
+unsigned __int128 whirl(unsigned char x0)
+{
+   register int t __asm("rdi") = x0&0xFF;
+   const unsigned __int128 s4 = WHIRL_S[t];
+   register unsigned __int128 tt  __asm("rdi") = rotr(s4);
+   asm("":::"memory");
+   return tt;
+}
+/* { dg-final { scan-assembler-not "movq\tWHIRL_S\\+8\\(%rdi\\), %rdi" } } */
+-- 
+2.41.0
+
@@ -24,7 +24,7 @@ CBUILDROOT="/"
 _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET"

 pkgname=gcc-armhf
-pkgver=14.2.0
+pkgver=13.2.1_git20231014
 # i.e. 13.2.1, must match gcc/BASE-VER
 _pkgbase="${pkgver%%_git*}"
 # date component from snapshots
@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""

 pkgname=gcc-armhf
-pkgrel=2
+pkgrel=0
 pkgdesc="Stage2 cross-compiler for armhf"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -46,7 +46,6 @@ makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-
 subpackages="g++-armhf:gpp libstdc++-dev-armhf:libcxx_dev"
 [ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc$_target"
 replaces="libstdc++ binutils"
-options="!strip"

 : "${LANG_CXX:=true}"
 : "${LANG_D:=true}"
@@ -144,7 +143,7 @@ case "$CARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -156,7 +155,6 @@ case "$CTARGET_ARCH" in
 arm*)		_libitm=false ;;
 mips*)		_libitm=false ;;
 riscv64)	_libitm=false ;;
-loongarch64)	_libitm=false ;;
 esac

 # Internal libffi fails to build on MIPS at the moment, need to
@@ -164,14 +162,13 @@ esac
 # the internal libffi.
 case "$CTARGET_ARCH" in
 mips*)		LANG_GO=false ;;
-loongarch64)	LANG_GO=false ;;
 esac

 # Fortran uses libquadmath if toolchain has __float128
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac

@@ -189,11 +186,6 @@ riscv64)
 LANG_ADA=false;;
 esac

-case "$CTARGET_ARCH" in
-loongarch64)
-LANG_ADA=false;;
-esac
-
 _languages=c
 if $LANG_CXX; then
 	_languages="$_languages,c++"
@@ -241,8 +233,7 @@ makedepends="$makedepends_build $makedepends_host"
 #
 # PLEASE submit all patches to gcc to https://gitlab.alpinelinux.org/kaniini/alpine-gcc-patches,
 # so that they can be properly tracked and easily rebased if needed.
-#source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
-source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkgbase:-$pkgver}.tar.xz
+source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
 	0001-posix_memalign.patch
 	0002-gcc-poison-system-directories.patch
 	0003-specs-turn-on-Wl-z-now-by-default.patch
@@ -277,8 +268,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
-	0035-loongarch-disable-multilib-support.patch
-	fix-arm64.patch
+	0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 	"

 # secfixes:
@@ -286,8 +276,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 #     - CVE-2023-4039

 # we build out-of-tree
-#_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
-_gccdir="$srcdir"/gcc-${_pkgbase:-$pkgver}
+_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
 _gcclibdir="/usr/lib/gcc/$CTARGET/${_pkgbase:-$pkgver}"
 _gcclibexec="/usr/libexec/gcc/$CTARGET/${_pkgbase:-$pkgver}"

@@ -339,7 +328,6 @@ build() {
 	i586-*-*-*)		_arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";;
 	s390x-*-*-*)		_arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";;
 	riscv64-*-*-*)		_arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";;
-	loongarch64-*-*-*)      _arch_configure="--with-arch=loongarch64 --with-abi=lp64d --with-tls=trad";;
 	esac

 	case "$CTARGET_ARCH" in
@@ -366,14 +354,7 @@ build() {
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"

 	msg "Building the following:"
 	echo ""
@@ -702,6 +683,10 @@ go() {
 	depends="gcc=$_gccrel libgo=$_gccrel !go"
 	install="$pkgname-go.post-install"

+	# See https://lists.alpinelinux.org/~alpine/devel/%3C33KG0XO61I4IL.2Z7RTAZ5J3SY6%408pit.net%3E
+	provides="go-bootstrap"
+	provider_priority=1 # lowest, see community/go
+
 	mkdir -p "$subpkgdir"/$_gcclibexec \
 		"$subpkgdir"/usr/lib \
 		"$subpkgdir"/usr/bin
@@ -802,9 +787,9 @@ gdb() {
 }

 sha512sums="
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+406673a62deba759fc0532a801b3f57cabf894ea328587b23e62a707ba5767b0e3ae9b3f86bf3c6fcf13e8a3c30bc470e6598b625c8231efb629034211c162c2  gcc-13-20231014.tar.xz
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 3f24bb6a50d3c45b71ea05590e32fe3e69b91377ab185352891d5035c76ed193117c6d0b314a4c364bcf136b9a9dd5c926d6c7c30ab436976c121ebfea8d3ddd  0003-specs-turn-on-Wl-z-now-by-default.patch
 17a2993027d3ddf8595952ebcae425695ddc7b1cf73b384d2e55fddecb9cbf3f6482860a502ff69b14075e12badf27300fd3039f3a9005e851fd8d121d258c2b  0004-Turn-on-D_FORTIFY_SOURCE-2-by-default-for-C-C-ObjC-O.patch
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@@ -815,7 +800,7 @@ sha512sums="
 da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02daf8e34f60c08b61f5d3959305886dca9bbcdc84db057258d9  0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch
 35b9aafe7eee8138cb7aad7164a8f77c15ccdce26843cee78b5871ef91d76cad22ed0871b20f51c4b89b71afd9cfe4ba4227086e158c466558513708fe7d2a1a  0011-libiberty-copy-PIC-objects-during-build-process.patch
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-91dde3079c1400c124ab5604597f5857185d075809649603aa3641a4581b34029bfcbd4281a5bd925d1c5e6e3b1f5f3322efda34345c6930652d685a6c9525f4  0013-nopie.patch
+b2c4921c5eef33ee43a92ab5ec7f09d5d3adb49a2416595001e6376ffdf652ef9d0dc21778c3a86e45334290dbe467a4e891ed34a6522e0c72f746def22e8663  0013-nopie.patch
 0b50ad15115192699efa9fda3d4fb1c2fa95da06d7880ba34615b40c19a8256e1fe364da39f5c70dc22fbccf21db2de5900932afef68948722eeb25e435262f8  0014-ada-fix-shared-linking.patch
 00097c7106625ccf02149a757366f434c48f2abe824bb8b4bf067d29308889cb6039a5e5b2d3bd2683617693b47707d549252c56eea6bc3cdc2450a8d14f46a7  0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch
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@@ -825,10 +810,10 @@ da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02da
 a9567947471c3ba8a547a79c55e183974554bf823d9a97a165c966d7b3caad8789980e096e3b78452ece5de062bd9bb006af464bbf0c5a35b689eac3ee21e5c5  0020-s390x-disable-multilib-support.patch
 f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8b7944fa17487478e73958be45d5782ccb9ef501961fb9a96  0021-ppc64-le-disable-multilib-support.patch
 44ab86feb8e41e7c2b2e27accdf46194c9b80ee6a39543303dc04824f669d9fad182aabd40c9c7f6c265cf9bb71be830c257be115dc9d701d54eca3aa9ef174e  0022-x86_64-disable-multilib-support.patch
-abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
+e0763083c31485e8ac0b3724376a28af01bb6f50e1a054780b61886e4e3de2a35d127e6e353eb8d8729964ada9b5751bf05bdd51df539667008216db38f228a3  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+30369bea84020c32d514196ba3adb3d09d2d0359af5550bd3f9719aa357e44b2f695623c1d2a99416e120dc86896c196c5dd4f638183dced4799604137385367  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,6 +822,5 @@ d47b559075f40d526235f47b91da1d0cf6bfe6c5b7311bbfe08af9dd6e8f27e6c7cd82e3b2d529aa
 b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95e21c9ffbf2412193f8b9fc89a4c36fa5a6a041661ac7399d  0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
-65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+cc1e10ac6e72db816f09325e301103109cc212a6f3de3ce0b9b038d149233c467319d203941695dbf3d7b9e2dcbbcd17609cdb056e831fcc323cd592423882d8  0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 "
@@ -1,544 +0,0 @@
-From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Thu, 13 Jun 2024 12:48:21 +0100
-Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
-
-The testcase extracts one arm_neon.h vector from a pair (one subreg)
-and then reinterprets the result as an SVE vector (another subreg).
-Each subreg makes sense individually, but we can't fold them together
-into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
-but the interpretation of 32 bytes -> 16*N bytes depends on
-whether N==1 or N>1.
-
-Since the second subreg makes sense individually, simplify_subreg
-should bail out rather than ICE on it.  simplify_gen_subreg will
-then do the same (because it already checks validate_subreg).
-This leaves simplify_gen_subreg returning null, requiring the
-caller to take appropriate action.
-
-I think this is relatively likely to occur elsewhere, so the patch
-adds a helper for forcing a subreg, allowing a temporary pseudo to
-be created where necessary.
-
-I'll follow up by using force_subreg in more places.  This patch
-is intended to be a minimal backportable fix for the PR.
-
-gcc/
-	PR target/115464
-	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
-	to fold two subregs together if their relationship isn't known
-	at compile time.
-	* explow.h (force_subreg): Declare.
-	* explow.cc (force_subreg): New function.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
-
-(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
---
- gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
- gcc/explow.cc                                     | 15 +++++++++++++++
- gcc/explow.h                                      |  2 ++
- gcc/simplify-rtx.cc                               |  5 +++++
- .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
- 5 files changed, 36 insertions(+), 1 deletion(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 0d2edf3f19e..c9182594bc1 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1174,7 +1174,7 @@ public:
-        Advanced SIMD argument as an SVE vector.  */
-     if (!BYTES_BIG_ENDIAN
- 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
-+      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
- 
-     rtx_vector_builder builder (VNx16BImode, 16, 2);
-     for (unsigned int i = 0; i < 16; i++)
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index 8e5f6b8e680..f6843398c4b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
-   return temp;
- }
- 
-+/* Like simplify_gen_subreg, but force OP into a new register if the
-+   subreg cannot be formed directly.  */
-+
-+rtx
-+force_subreg (machine_mode outermode, rtx op,
-+	      machine_mode innermode, poly_uint64 byte)
-+{
-+  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
-+  if (x)
-+    return x;
-+
-+  op = copy_to_mode_reg (innermode, op);
-+  return simplify_gen_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index 16aa02cfb68..cbd1fcb7eb3 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
-    Args are mode (in case value is a constant) and the value.  */
- extern rtx force_reg (machine_mode, rtx);
- 
-+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
- 
-diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
-index dceaa13333c..729d408aa55 100644
--- a/gcc/simplify-rtx.cc
-+++ b/gcc/simplify-rtx.cc
-@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
-       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
-       rtx newx;
- 
-+      /* Make sure that the relationship between the two subregs is
-+	 known at compile time.  */
-+      if (!ordered_p (outersize, innermostsize))
-+	return NULL_RTX;
-+
-       if (outermode == innermostmode
- 	  && known_eq (byte, 0U)
- 	  && known_eq (SUBREG_BYTE (op), 0))
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-new file mode 100644
-index 00000000000..d728d1325ed
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-@@ -0,0 +1,13 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl)
-+{
-+    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
-+}
-+
-+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
-- 
-2.46.0
-
-
-From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:30 +0100
-Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
-
-This patch makes the aarch64 code use force_subreg instead of
-simplify_gen_subreg in more places.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-(3) The offset wasn't a simple lowpart or highpart calculation;
-    a later patch will deal with those.
-
-gcc/
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
-	Use force_subreg instead of simplify_gen_subreg.
-	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svget_impl::expand): Likewise.
-	(svget_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-functions.h
-	(multireg_permute::expand): Likewise.
-
-(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
---
- gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
- gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
- gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
- gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
- 4 files changed, 10 insertions(+), 12 deletions(-)
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index 75d21de1401..b2e46a073a8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-       rtx temp2 = gen_reg_rtx (DImode);
-       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
- 				   subreg_lowpart_offset (d->mode, quadmode));
-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
-+      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-       else
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
-+      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
- 
-       /* And recalculate the index.  */
-       lane -= nunits / 4;
-diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
-index 33ab0741e87..5b9efe0b165 100644
--- a/gcc/config/aarch64/aarch64-simd.md
-+++ b/gcc/config/aarch64/aarch64-simd.md
-@@ -412,8 +412,8 @@
-   "TARGET_SIMD"
-   {
-      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
-					     <MODE>mode, 0);
-+     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
-+				       <MODE>mode, 0);
-      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
-      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
-      DONE;
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index c9182594bc1..2c95da79572 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1121,9 +1121,8 @@ public:
-   expand (function_expander &e) const override
-   {
-     /* Fold the access into a subreg rvalue.  */
-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
-				GET_MODE (e.args[0]),
-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-+    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
-+			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-   }
- };
- 
-@@ -1157,8 +1156,7 @@ public:
- 	e.add_fixed_operand (indices);
- 	return e.generate_insn (icode);
-       }
-    return simplify_gen_subreg (e.result_mode (), e.args[0],
-				GET_MODE (e.args[0]), 0);
-+    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
-   }
- };
- 
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-index 3b8e575e98e..7d06a57ff83 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-@@ -639,9 +639,9 @@ public:
-       {
- 	machine_mode elt_mode = e.vector_mode (0);
- 	rtx arg = e.args[0];
-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
-					       GET_MODE_SIZE (elt_mode)));
-+	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
-+	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
-+					GET_MODE_SIZE (elt_mode)));
-       }
-     return e.use_exact_insn (icode);
-   }
-- 
-2.46.0
-
-
-From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
-
-This patch makes more use of force_lowpart_subreg, similarly
-to the recent patch for force_subreg.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-gcc/
-	PR target/115464
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
-	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
-	simplify_gen_subreg and lowpart_subreg.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-sme.cc
-	(add_load_store_slice_operand): Likewise.
-	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
-	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
-
-(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
---
- gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
- gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
- gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
- gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
- .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
- 5 files changed, 23 insertions(+), 17 deletions(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index b2e46a073a8..264b9560709 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-   int lane = INTVAL (lane_idx);
- 
-   if (lane < nunits / 4)
-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
-			       subreg_lowpart_offset (d->mode, quadmode));
-+    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
-   else
-     {
-       /* Select the upper 64 bits, either a V2SF or V4HF, this however
-@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
- 	 gen_highpart_mode generates code that isn't optimal.  */
-       rtx temp1 = gen_reg_rtx (d->mode);
-       rtx temp2 = gen_reg_rtx (DImode);
-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
-				   subreg_lowpart_offset (d->mode, quadmode));
-+      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
-       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
- 	case AARCH64_WSR64:
- 	case AARCH64_WSRF64:
- 	case AARCH64_WSR128:
-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
-+	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
- 	  break;
- 	case AARCH64_WSRF:
- 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
-@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
-     case AARCH64_RSR64:
-     case AARCH64_RSRF64:
-     case AARCH64_RSR128:
-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
-+      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
-+				   target, sysreg_mode);
-     case AARCH64_RSRF:
-       subreg = gen_lowpart_SUBREG (SImode, target);
-       return gen_lowpart_SUBREG (SFmode, subreg);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 2c95da79572..3c970e9c5f8 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1183,7 +1183,7 @@ public:
-     if (BYTES_BIG_ENDIAN)
-       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
-     insn_code icode = code_for_vcond_mask (mode, mode);
-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-+    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-     e.add_output_operand (icode);
-     e.add_input_operand (icode, e.args[1]);
-     e.add_input_operand (icode, e.args[0]);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-index f4c91bcbb95..b66b35ae60b 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
-   rtx base = e.args[argno];
-   if (e.mode_suffix_id == MODE_vnum)
-     {
-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-+      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-       base = simplify_gen_binary (PLUS, SImode, base, vnum);
-     }
-   e.add_input_operand (icode, base);
-diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
-index 1beec94629d..a064aeecbc0 100644
--- a/gcc/config/aarch64/aarch64.cc
-+++ b/gcc/config/aarch64/aarch64.cc
-@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
-   /* can_change_mode_class must only return true if subregs and svreinterprets
-      have the same semantics.  */
-   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
-    return lowpart_subreg (mode, x, GET_MODE (x));
-+    return force_lowpart_subreg (mode, x, GET_MODE (x));
- 
-   rtx res = gen_reg_rtx (mode);
-   x = force_reg (GET_MODE (x), x);
-@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			    rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = gen_lowpart (DImode, op1);
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
-   *high_in1 = gen_highpart (DImode, op1);
-   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			     rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
- 
-   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-new file mode 100644
-index 00000000000..f561c34f732
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-@@ -0,0 +1,11 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
-+{
-+    return svset_neonq_u16 (a, permute_tbl.val[1]);
-+}
-- 
-2.46.0
-
-
-From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 4/4] Add force_lowpart_subreg
-
-optabs had a local function called lowpart_subreg_maybe_copy
-that is very similar to the lowpart version of force_subreg.
-This patch adds a force_lowpart_subreg wrapper around
-force_subreg and uses it in optabs.cc.
-
-The only difference between the old and new functions is that
-the old one asserted success while the new one doesn't.
-It's common not to assert elsewhere when taking subregs;
-normally a null result is enough.
-
-Later patches will make more use of the new function.
-
-gcc/
-	* explow.h (force_lowpart_subreg): Declare.
-	* explow.cc (force_lowpart_subreg): New function.
-	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
-	(expand_absneg_bit): Use force_lowpart_subreg instead of
-	lowpart_subreg_maybe_copy.
-	(expand_copysign_bit): Likewise.
-
-(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
---
- gcc/explow.cc | 14 ++++++++++++++
- gcc/explow.h  |  1 +
- gcc/optabs.cc | 24 ++----------------------
- 3 files changed, 17 insertions(+), 22 deletions(-)
-
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index f6843398c4b..5fdfa81f69b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
-   return simplify_gen_subreg (outermode, op, innermode, byte);
- }
- 
-+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
-+   which has mode INNERMODE.  Allow OP to be forced into a new register
-+   if necessary.
-+
-+   Return null on failure.  */
-+
-+rtx
-+force_lowpart_subreg (machine_mode outermode, rtx op,
-+		      machine_mode innermode)
-+{
-+  auto byte = subreg_lowpart_offset (outermode, innermode);
-+  return force_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index cbd1fcb7eb3..dd654649b06 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
- extern rtx force_reg (machine_mode, rtx);
- 
- extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
- 
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
-diff --git a/gcc/optabs.cc b/gcc/optabs.cc
-index ce91f94ed43..804c0dc73ba 100644
--- a/gcc/optabs.cc
-+++ b/gcc/optabs.cc
-@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
-   return 0;
- }
- 
-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
-   conditions, VAL may already be a SUBREG against which we cannot generate
-   a further SUBREG.  In this case, we expect forcing the value into a
-   register will work around the situation.  */
-
-static rtx
-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
-			   machine_mode imode)
-{
-  rtx ret;
-  ret = lowpart_subreg (omode, val, imode);
-  if (ret == NULL)
-    {
-      val = force_reg (imode, val);
-      ret = lowpart_subreg (omode, val, imode);
-      gcc_assert (ret != NULL);
-    }
-  return ret;
-}
-
- /* Expand a floating point absolute value or negation operation via a
-    logical operation on the sign bit.  */
- 
-@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
- 			   gen_lowpart (imode, op0),
- 			   immed_wide_int_const (mask, imode),
- 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
- 
-       set_dst_reg_note (get_last_insn (), REG_EQUAL,
- 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
-@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
- 
-       temp = expand_binop (imode, ior_optab, op0, op1,
- 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
-     }
- 
-   return target;
-- 
-2.46.0
-
@@ -150,13 +150,13 @@ diff --git a/gcc/gcc.cc b/gcc/gcc.cc
 index 16bb07f2cdc..33b56e721d2 100644
 --- a/gcc/gcc.cc
 +++ b/gcc/gcc.cc
-@@ -1177,6 +1187,8 @@ proper position among the other output files.  */
-    "-z now " \
+@@ -1146,6 +1146,8 @@ proper position among the other output files.  */
+    "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
    "%X %{o*} %{e*} %{N} %{n} %{r}\
     %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
 +    %{Wno-poison-system-directories:--no-poison-system-directories} \
 +    %{Werror=poison-system-directories:--error-poison-system-directories} \
-     %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \
+     %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \
     VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \
     %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\
 diff --git a/gcc/incpath.cc b/gcc/incpath.cc
@@ -9,22 +9,23 @@ Subject: [PATCH 13/35] nopie
 2 files changed, 40 insertions(+)

 diff --git a/gcc/configure b/gcc/configure
-index 23da7d55d..f38732bb2 100755
+index 8c46369f73f..e59cbee1767 100755
 --- a/gcc/configure
 +++ b/gcc/configure
-@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \
- fi
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5
+@@ -32268,6 +32268,33 @@ fi
 $as_echo "$gcc_cv_no_pie" >&6; }
-+# Check if -nopie works.
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
 +$as_echo_n "checking for -nopie option... " >&6; }
-+if ${gcc_cv_nopie+:} false; then :
+if test "${gcc_cv_nopie+set}" = set; then :
 +  $as_echo_n "(cached) " >&6
 +else
 +  saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+     LDFLAGS="$LDFLAGS -nopie"
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 +/* end confdefs.h.  */
 +int main(void) {return 0;}
 +_ACEOF
@@ -35,51 +36,40 @@ index 23da7d55d..f38732bb2 100755
 +fi
 +rm -f core conftest.err conftest.$ac_objext \
 +    conftest$ac_exeext conftest.$ac_ext
-+   LDFLAGS="$saved_LDFLAGS"
+     LDFLAGS="$saved_LDFLAGS"
 +fi
 +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_nopie" >&5
 +$as_echo "$gcc_cv_nopie" >&6; }
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ 
+ 
 diff --git a/gcc/configure.ac b/gcc/configure.ac
-index d7cf0b92c..db2e2c802 100644
+index 5504bf6eb01..57268319de1 100644
 --- a/gcc/configure.ac
 +++ b/gcc/configure.ac
-@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option],
-      [gcc_cv_no_pie=yes],
-      [gcc_cv_no_pie=no])
+@@ -7552,6 +7552,19 @@ AC_CACHE_CHECK([for -no-pie option],
    LDFLAGS="$saved_LDFLAGS"])
-+# Check if -nopie works.
-+AC_CACHE_CHECK([for -nopie option],
-+  [gcc_cv_nopie],
-+  [saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   AC_LINK_IFELSE([AC_LANG_SOURCE([int main(void) {return 0;}])],
-+     [gcc_cv_nopie=yes],
-+     [gcc_cv_nopie=no])
-+   LDFLAGS="$saved_LDFLAGS"])
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  AC_CACHE_CHECK([for -nopie option],
+    [gcc_cv_nopie],
+    [saved_LDFLAGS="$LDFLAGS"
+     LDFLAGS="$LDFLAGS -nopie"
+     AC_LINK_IFELSE([int main(void) {return 0;}],
+       [gcc_cv_nopie=yes],
+       [gcc_cv_nopie=no])
+     LDFLAGS="$saved_LDFLAGS"])
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ AC_SUBST([NO_PIE_FLAG])
+ 
 -- 
 2.41.0

@@ -46,10 +46,10 @@ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
 index f8c2c351e5a..8d9881eadeb 100644
 --- a/gcc/config/riscv/linux.h
 +++ b/gcc/config/riscv/linux.h
-@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3.  If not see
- 	%{rdynamic:-export-dynamic} \
- 	-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
-     %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}"
+@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3.  If not see
+     %{static:-static}}"
+ 
+ #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 -
 -#define STARTFILE_PREFIX_SPEC 			\
 -   "/lib" XLEN_SPEC "/" ABI_SPEC "/ "		\
@@ -41,15 +41,6 @@ index 96306f8cc9a..090b6770ae5 100644
   LIBGNAT_TARGET_PAIRS = \
   a-intnam.ads<libgnarl/a-intnam__linux.ads \
   s-inmaop.adb<libgnarl/s-inmaop__posix.adb \
-@@ -2311,7 +2311,7 @@ ifeq ($(strip $(filter-out aarch64% linux%,$(target_cpu) $(target_os))),)
-   s-intman.adb<libgnarl/s-intman__posix.adb \
-   s-linux.ads<libgnarl/s-linux.ads \
-   $(TRASYM_DWARF_UNIX_PAIRS) \
-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
-+  s-tsmona.adb<libgnat/s-tsmona.adb \
-   s-mudido.adb<libgnarl/s-mudido__affinity.adb \
-   s-osinte.ads<libgnarl/s-osinte__linux.ads \
-   s-osinte.adb<libgnarl/s-osinte__posix.adb \
@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
   s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
@@ -1,32 +0,0 @@
-From c4f484f465a32e796ae384aa3f90e79fa218b4e9 Mon Sep 17 00:00:00 2001
-From: Jingyun Hua <huajingyun@loongson.cn>
-Date: Mon, 7 Aug 2023 15:25:58 +0800
-Subject: [PATCH] loongarch disable multilib support
-
-Signed-off-by: Jingyun Hua <huajingyun@loongson.cn>
---
- gcc/config/loongarch/t-linux    | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux
-index 23e1fb979..c2753abb8 100644
--- a/gcc/config/loongarch/t-linux
-+++ b/gcc/config/loongarch/t-linux
-@@ -21,11 +21,6 @@ MULTIOSDIR_lp64f := ../lib64/f32$(call if_multiarch,:loongarch64-linux-gnuf32)
- MULTIOSDIR_lp64s := ../lib64/sf$(call if_multiarch,:loongarch64-linux-gnusf)
- 
- # Don't define MULTILIB_OSDIRNAMES if multilib is disabled.
-ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),)
-
-    MULTILIB_OSDIRNAMES = .=$(MULTIOSDIR_$(mlib_default))
-    MULTILIB_OSDIRNAMES += mabi.lp64d=$(MULTIOSDIR_lp64d)
-    MULTILIB_OSDIRNAMES += mabi.lp64f=$(MULTIOSDIR_lp64f)
-    MULTILIB_OSDIRNAMES += mabi.lp64s=$(MULTIOSDIR_lp64s)
-
-endif
-+    MULTILIB_OSDIRNAMES =  mabi.lp64d=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64f=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64s=../lib
-- 
-2.41.0
-
@@ -0,0 +1,186 @@
+https://gcc.gnu.org/PR110792
+https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=790c1f60a5662b16eb19eb4b81922995863c7571
+https://github.com/randombit/botan/issues/3637
+
+From 85628c5653ff40963158a24c60eeec6a3b5a8e56 Mon Sep 17 00:00:00 2001
+From: Roger Sayle <roger@nextmovesoftware.com>
+Date: Thu, 3 Aug 2023 07:12:04 +0100
+Subject: [PATCH] PR target/110792: Early clobber issues with
+ rot32di2_doubleword on i386.
+
+This patch is a conservative fix for PR target/110792, a wrong-code
+regression affecting doubleword rotations by BITS_PER_WORD, which
+effectively swaps the highpart and lowpart words, when the source to be
+rotated resides in memory. The issue is that if the register used to
+hold the lowpart of the destination is mentioned in the address of
+the memory operand, the current define_insn_and_split unintentionally
+clobbers it before reading the highpart.
+
+Hence, for the testcase, the incorrectly generated code looks like:
+
+        salq    $4, %rdi		// calculate address
+        movq    WHIRL_S+8(%rdi), %rdi	// accidentally clobber addr
+        movq    WHIRL_S(%rdi), %rbp	// load (wrong) lowpart
+
+Traditionally, the textbook way to fix this would be to add an
+explicit early clobber to the instruction's constraints.
+
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ [(set (match_operand:DI 0 "register_operand" "=r,r,&r")
+        (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+                       (const_int 32)))]
+
+but unfortunately this currently generates significantly worse code,
+due to a strange choice of reloads (effectively memcpy), which ends up
+looking like:
+
+        salq    $4, %rdi		// calculate address
+        movdqa  WHIRL_S(%rdi), %xmm0	// load the double word in SSE reg.
+        movaps  %xmm0, -16(%rsp)	// store the SSE reg back to the stack
+        movq    -8(%rsp), %rdi		// load highpart
+        movq    -16(%rsp), %rbp		// load lowpart
+
+Note that reload's "&" doesn't distinguish between the memory being
+early clobbered, vs the registers used in an addressing mode being
+early clobbered.
+
+The fix proposed in this patch is to remove the third alternative, that
+allowed offsetable memory as an operand, forcing reload to place the
+operand into a register before the rotation.  This results in:
+
+        salq    $4, %rdi
+        movq    WHIRL_S(%rdi), %rax
+        movq    WHIRL_S+8(%rdi), %rdi
+        movq    %rax, %rbp
+
+I believe there's a more advanced solution, by swapping the order of
+the loads (if first destination register is mentioned in the address),
+or inserting a lea insn (if both destination registers are mentioned
+in the address), but this fix is a minimal "safe" solution, that
+should hopefully be suitable for backporting.
+
+2023-08-03  Roger Sayle  <roger@nextmovesoftware.com>
+
+gcc/ChangeLog
+	PR target/110792
+	* config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
+	place operand in a register before gen_<insn>64ti2_doubleword.
+	(<any_rotate>di3): Likewise, for rotations by 32 bits, place
+	operand in a register before gen_<insn>32di2_doubleword.
+	(<any_rotate>32di2_doubleword): Constrain operand to be in register.
+	(<any_rotate>64ti2_doubleword): Likewise.
+
+gcc/testsuite/ChangeLog
+	PR target/110792
+	* g++.target/i386/pr110792.C: New 32-bit C++ test case.
+	* gcc.target/i386/pr110792.c: New 64-bit C test case.
+
+(cherry picked from commit 790c1f60a5662b16eb19eb4b81922995863c7571)
+---
+ gcc/config/i386/i386.md                  | 18 ++++++++++++------
+ gcc/testsuite/g++.target/i386/pr110792.C | 16 ++++++++++++++++
+ gcc/testsuite/gcc.target/i386/pr110792.c | 18 ++++++++++++++++++
+ 3 files changed, 46 insertions(+), 6 deletions(-)
+ create mode 100644 gcc/testsuite/g++.target/i386/pr110792.C
+ create mode 100644 gcc/testsuite/gcc.target/i386/pr110792.c
+
+diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
+index f3a3305..a71e837 100644
+--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
+@@ -14359,7 +14359,10 @@
+     emit_insn (gen_ix86_<insn>ti3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 64)
+-    emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (TImode, operands[1]);
+      emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    }
+   else
+     {
+       rtx amount = force_reg (QImode, operands[2]);
+@@ -14394,7 +14397,10 @@
+     emit_insn (gen_ix86_<insn>di3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 32)
+-    emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    }
+   else
+     FAIL;
+ 
+@@ -14562,8 +14568,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+-       (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
+       (any_rotate:DI (match_operand:DI 1 "register_operand" "0,r")
+                       (const_int 32)))]
+  "!TARGET_64BIT"
+  "#"
+@@ -14580,8 +14586,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>64ti2_doubleword"
+- [(set (match_operand:TI 0 "register_operand" "=r,r,r")
+-       (any_rotate:TI (match_operand:TI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:TI 0 "register_operand" "=r,r")
+       (any_rotate:TI (match_operand:TI 1 "register_operand" "0,r")
+                       (const_int 64)))]
+  "TARGET_64BIT"
+  "#"
+diff --git a/gcc/testsuite/g++.target/i386/pr110792.C b/gcc/testsuite/g++.target/i386/pr110792.C
+new file mode 100644
+index 0000000..ce21a7a
+--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr110792.C
+@@ -0,0 +1,16 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+template <int ROT, typename T>
+inline T rotr(T input)
+{
+   return static_cast<T>((input >> ROT) | (input << (8 * sizeof(T) - ROT)));
+}
+
+unsigned long long WHIRL_S[256] = {0x18186018C07830D8};
+unsigned long long whirl(unsigned char x0)
+{
+   const unsigned long long s4 = WHIRL_S[x0&0xFF];
+   return rotr<32>(s4);
+}
+/* { dg-final { scan-assembler-not "movl\tWHIRL_S\\+4\\(,%eax,8\\), %eax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr110792.c b/gcc/testsuite/gcc.target/i386/pr110792.c
+new file mode 100644
+index 0000000..b65125c
+--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr110792.c
+@@ -0,0 +1,18 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+
+static inline unsigned __int128 rotr(unsigned __int128 input)
+{
+   return ((input >> 64) | (input << (64)));
+}
+
+unsigned __int128 WHIRL_S[256] = {((__int128)0x18186018C07830D8) << 64 |0x18186018C07830D8};
+unsigned __int128 whirl(unsigned char x0)
+{
+   register int t __asm("rdi") = x0&0xFF;
+   const unsigned __int128 s4 = WHIRL_S[t];
+   register unsigned __int128 tt  __asm("rdi") = rotr(s4);
+   asm("":::"memory");
+   return tt;
+}
+/* { dg-final { scan-assembler-not "movq\tWHIRL_S\\+8\\(%rdi\\), %rdi" } } */
+-- 
+2.41.0
+
@@ -24,7 +24,7 @@ CBUILDROOT="/"
 _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET"

 pkgname=gcc-armv7
-pkgver=14.2.0
+pkgver=13.2.1_git20231014
 # i.e. 13.2.1, must match gcc/BASE-VER
 _pkgbase="${pkgver%%_git*}"
 # date component from snapshots
@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""

 pkgname=gcc-armv7
-pkgrel=2
+pkgrel=0
 pkgdesc="Stage2 cross-compiler for armv7"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -46,7 +46,6 @@ makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-
 subpackages="g++-armv7:gpp libstdc++-dev-armv7:libcxx_dev"
 [ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc$_target"
 replaces="libstdc++ binutils"
-options="!strip"

 : "${LANG_CXX:=true}"
 : "${LANG_D:=true}"
@@ -144,7 +143,7 @@ case "$CARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -156,7 +155,6 @@ case "$CTARGET_ARCH" in
 arm*)		_libitm=false ;;
 mips*)		_libitm=false ;;
 riscv64)	_libitm=false ;;
-loongarch64)	_libitm=false ;;
 esac

 # Internal libffi fails to build on MIPS at the moment, need to
@@ -164,14 +162,13 @@ esac
 # the internal libffi.
 case "$CTARGET_ARCH" in
 mips*)		LANG_GO=false ;;
-loongarch64)	LANG_GO=false ;;
 esac

 # Fortran uses libquadmath if toolchain has __float128
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac

@@ -189,11 +186,6 @@ riscv64)
 LANG_ADA=false;;
 esac

-case "$CTARGET_ARCH" in
-loongarch64)
-LANG_ADA=false;;
-esac
-
 _languages=c
 if $LANG_CXX; then
 	_languages="$_languages,c++"
@@ -241,8 +233,7 @@ makedepends="$makedepends_build $makedepends_host"
 #
 # PLEASE submit all patches to gcc to https://gitlab.alpinelinux.org/kaniini/alpine-gcc-patches,
 # so that they can be properly tracked and easily rebased if needed.
-#source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
-source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkgbase:-$pkgver}.tar.xz
+source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
 	0001-posix_memalign.patch
 	0002-gcc-poison-system-directories.patch
 	0003-specs-turn-on-Wl-z-now-by-default.patch
@@ -277,8 +268,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
-	0035-loongarch-disable-multilib-support.patch
-	fix-arm64.patch
+	0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 	"

 # secfixes:
@@ -286,8 +276,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 #     - CVE-2023-4039

 # we build out-of-tree
-#_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
-_gccdir="$srcdir"/gcc-${_pkgbase:-$pkgver}
+_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
 _gcclibdir="/usr/lib/gcc/$CTARGET/${_pkgbase:-$pkgver}"
 _gcclibexec="/usr/libexec/gcc/$CTARGET/${_pkgbase:-$pkgver}"

@@ -339,7 +328,6 @@ build() {
 	i586-*-*-*)		_arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";;
 	s390x-*-*-*)		_arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";;
 	riscv64-*-*-*)		_arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";;
-	loongarch64-*-*-*)      _arch_configure="--with-arch=loongarch64 --with-abi=lp64d --with-tls=trad";;
 	esac

 	case "$CTARGET_ARCH" in
@@ -366,14 +354,7 @@ build() {
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"

 	msg "Building the following:"
 	echo ""
@@ -702,6 +683,10 @@ go() {
 	depends="gcc=$_gccrel libgo=$_gccrel !go"
 	install="$pkgname-go.post-install"

+	# See https://lists.alpinelinux.org/~alpine/devel/%3C33KG0XO61I4IL.2Z7RTAZ5J3SY6%408pit.net%3E
+	provides="go-bootstrap"
+	provider_priority=1 # lowest, see community/go
+
 	mkdir -p "$subpkgdir"/$_gcclibexec \
 		"$subpkgdir"/usr/lib \
 		"$subpkgdir"/usr/bin
@@ -802,9 +787,9 @@ gdb() {
 }

 sha512sums="
-932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396  gcc-14.2.0.tar.xz
+406673a62deba759fc0532a801b3f57cabf894ea328587b23e62a707ba5767b0e3ae9b3f86bf3c6fcf13e8a3c30bc470e6598b625c8231efb629034211c162c2  gcc-13-20231014.tar.xz
 1ecffba1b07d60e1b4422302b032bbea918b674c8e12b30aa6965b544d700ce86b61e9f7b8d402c6caf59257f491a394dd0912f0948565d6eae9335ee54f3b35  0001-posix_memalign.patch
-1d102a7b17683909dde4d8591dd889149299e77a2b2003cdc0635dc816666be940e41ae534b469485391a9bed183cd5cd337f130e4e1ecb62cb9ad86c4a081db  0002-gcc-poison-system-directories.patch
+163f282455b6a4df33f011bcd8b0440566ba0ffaeeab30d8ac52d39948980a56881ca0eff60687129d59556389a58b9d64e7768750bd70b1fe0fedbc9fc30dc2  0002-gcc-poison-system-directories.patch
 3f24bb6a50d3c45b71ea05590e32fe3e69b91377ab185352891d5035c76ed193117c6d0b314a4c364bcf136b9a9dd5c926d6c7c30ab436976c121ebfea8d3ddd  0003-specs-turn-on-Wl-z-now-by-default.patch
 17a2993027d3ddf8595952ebcae425695ddc7b1cf73b384d2e55fddecb9cbf3f6482860a502ff69b14075e12badf27300fd3039f3a9005e851fd8d121d258c2b  0004-Turn-on-D_FORTIFY_SOURCE-2-by-default-for-C-C-ObjC-O.patch
 444550e55491ff89fe8cbbb4b73d017c9c147cdce1ad5c0561fe7d6ab3834515a814c7676c408cfeec18e1aaace27b3c26a2ffe4a75042285df5124976c38672  0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch
@@ -815,7 +800,7 @@ sha512sums="
 da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02daf8e34f60c08b61f5d3959305886dca9bbcdc84db057258d9  0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch
 35b9aafe7eee8138cb7aad7164a8f77c15ccdce26843cee78b5871ef91d76cad22ed0871b20f51c4b89b71afd9cfe4ba4227086e158c466558513708fe7d2a1a  0011-libiberty-copy-PIC-objects-during-build-process.patch
 9d43f844fad0ac6e1c35a2b6f461f9278ae09e468f2c9ae8adc43accbe6934994aa10d3a433644d1393a4a76e3caed69e3191db7f3c0c24b4e7a0a0a0cbac3f1  0012-libgcc_s.patch
-91dde3079c1400c124ab5604597f5857185d075809649603aa3641a4581b34029bfcbd4281a5bd925d1c5e6e3b1f5f3322efda34345c6930652d685a6c9525f4  0013-nopie.patch
+b2c4921c5eef33ee43a92ab5ec7f09d5d3adb49a2416595001e6376ffdf652ef9d0dc21778c3a86e45334290dbe467a4e891ed34a6522e0c72f746def22e8663  0013-nopie.patch
 0b50ad15115192699efa9fda3d4fb1c2fa95da06d7880ba34615b40c19a8256e1fe364da39f5c70dc22fbccf21db2de5900932afef68948722eeb25e435262f8  0014-ada-fix-shared-linking.patch
 00097c7106625ccf02149a757366f434c48f2abe824bb8b4bf067d29308889cb6039a5e5b2d3bd2683617693b47707d549252c56eea6bc3cdc2450a8d14f46a7  0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch
 7f0bc42b93a389b614054e700b851abfbc53db391aa10cbdf6990d41396b293af78980bb39f1cf0967184d3fbf3d46ac7c7f096717b8f193ea34cbf7f37d7e91  0016-add-fortify-headers-paths.patch
@@ -825,10 +810,10 @@ da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02da
 a9567947471c3ba8a547a79c55e183974554bf823d9a97a165c966d7b3caad8789980e096e3b78452ece5de062bd9bb006af464bbf0c5a35b689eac3ee21e5c5  0020-s390x-disable-multilib-support.patch
 f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8b7944fa17487478e73958be45d5782ccb9ef501961fb9a96  0021-ppc64-le-disable-multilib-support.patch
 44ab86feb8e41e7c2b2e27accdf46194c9b80ee6a39543303dc04824f669d9fad182aabd40c9c7f6c265cf9bb71be830c257be115dc9d701d54eca3aa9ef174e  0022-x86_64-disable-multilib-support.patch
-abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
+e0763083c31485e8ac0b3724376a28af01bb6f50e1a054780b61886e4e3de2a35d127e6e353eb8d8729964ada9b5751bf05bdd51df539667008216db38f228a3  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+30369bea84020c32d514196ba3adb3d09d2d0359af5550bd3f9719aa357e44b2f695623c1d2a99416e120dc86896c196c5dd4f638183dced4799604137385367  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,6 +822,5 @@ d47b559075f40d526235f47b91da1d0cf6bfe6c5b7311bbfe08af9dd6e8f27e6c7cd82e3b2d529aa
 b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95e21c9ffbf2412193f8b9fc89a4c36fa5a6a041661ac7399d  0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
-65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+cc1e10ac6e72db816f09325e301103109cc212a6f3de3ce0b9b038d149233c467319d203941695dbf3d7b9e2dcbbcd17609cdb056e831fcc323cd592423882d8  0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 "
@@ -1,544 +0,0 @@
-From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Thu, 13 Jun 2024 12:48:21 +0100
-Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
-
-The testcase extracts one arm_neon.h vector from a pair (one subreg)
-and then reinterprets the result as an SVE vector (another subreg).
-Each subreg makes sense individually, but we can't fold them together
-into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
-but the interpretation of 32 bytes -> 16*N bytes depends on
-whether N==1 or N>1.
-
-Since the second subreg makes sense individually, simplify_subreg
-should bail out rather than ICE on it.  simplify_gen_subreg will
-then do the same (because it already checks validate_subreg).
-This leaves simplify_gen_subreg returning null, requiring the
-caller to take appropriate action.
-
-I think this is relatively likely to occur elsewhere, so the patch
-adds a helper for forcing a subreg, allowing a temporary pseudo to
-be created where necessary.
-
-I'll follow up by using force_subreg in more places.  This patch
-is intended to be a minimal backportable fix for the PR.
-
-gcc/
-	PR target/115464
-	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
-	to fold two subregs together if their relationship isn't known
-	at compile time.
-	* explow.h (force_subreg): Declare.
-	* explow.cc (force_subreg): New function.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
-
-(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
---
- gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
- gcc/explow.cc                                     | 15 +++++++++++++++
- gcc/explow.h                                      |  2 ++
- gcc/simplify-rtx.cc                               |  5 +++++
- .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
- 5 files changed, 36 insertions(+), 1 deletion(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 0d2edf3f19e..c9182594bc1 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1174,7 +1174,7 @@ public:
-        Advanced SIMD argument as an SVE vector.  */
-     if (!BYTES_BIG_ENDIAN
- 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
-+      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
- 
-     rtx_vector_builder builder (VNx16BImode, 16, 2);
-     for (unsigned int i = 0; i < 16; i++)
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index 8e5f6b8e680..f6843398c4b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
-   return temp;
- }
- 
-+/* Like simplify_gen_subreg, but force OP into a new register if the
-+   subreg cannot be formed directly.  */
-+
-+rtx
-+force_subreg (machine_mode outermode, rtx op,
-+	      machine_mode innermode, poly_uint64 byte)
-+{
-+  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
-+  if (x)
-+    return x;
-+
-+  op = copy_to_mode_reg (innermode, op);
-+  return simplify_gen_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index 16aa02cfb68..cbd1fcb7eb3 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
-    Args are mode (in case value is a constant) and the value.  */
- extern rtx force_reg (machine_mode, rtx);
- 
-+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
- 
-diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
-index dceaa13333c..729d408aa55 100644
--- a/gcc/simplify-rtx.cc
-+++ b/gcc/simplify-rtx.cc
-@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
-       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
-       rtx newx;
- 
-+      /* Make sure that the relationship between the two subregs is
-+	 known at compile time.  */
-+      if (!ordered_p (outersize, innermostsize))
-+	return NULL_RTX;
-+
-       if (outermode == innermostmode
- 	  && known_eq (byte, 0U)
- 	  && known_eq (SUBREG_BYTE (op), 0))
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-new file mode 100644
-index 00000000000..d728d1325ed
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-@@ -0,0 +1,13 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl)
-+{
-+    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
-+}
-+
-+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
-- 
-2.46.0
-
-
-From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:30 +0100
-Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
-
-This patch makes the aarch64 code use force_subreg instead of
-simplify_gen_subreg in more places.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-(3) The offset wasn't a simple lowpart or highpart calculation;
-    a later patch will deal with those.
-
-gcc/
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
-	Use force_subreg instead of simplify_gen_subreg.
-	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svget_impl::expand): Likewise.
-	(svget_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-functions.h
-	(multireg_permute::expand): Likewise.
-
-(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
---
- gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
- gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
- gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
- gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
- 4 files changed, 10 insertions(+), 12 deletions(-)
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index 75d21de1401..b2e46a073a8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-       rtx temp2 = gen_reg_rtx (DImode);
-       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
- 				   subreg_lowpart_offset (d->mode, quadmode));
-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
-+      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-       else
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
-+      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
- 
-       /* And recalculate the index.  */
-       lane -= nunits / 4;
-diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
-index 33ab0741e87..5b9efe0b165 100644
--- a/gcc/config/aarch64/aarch64-simd.md
-+++ b/gcc/config/aarch64/aarch64-simd.md
-@@ -412,8 +412,8 @@
-   "TARGET_SIMD"
-   {
-      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
-					     <MODE>mode, 0);
-+     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
-+				       <MODE>mode, 0);
-      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
-      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
-      DONE;
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index c9182594bc1..2c95da79572 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1121,9 +1121,8 @@ public:
-   expand (function_expander &e) const override
-   {
-     /* Fold the access into a subreg rvalue.  */
-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
-				GET_MODE (e.args[0]),
-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-+    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
-+			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-   }
- };
- 
-@@ -1157,8 +1156,7 @@ public:
- 	e.add_fixed_operand (indices);
- 	return e.generate_insn (icode);
-       }
-    return simplify_gen_subreg (e.result_mode (), e.args[0],
-				GET_MODE (e.args[0]), 0);
-+    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
-   }
- };
- 
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-index 3b8e575e98e..7d06a57ff83 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-@@ -639,9 +639,9 @@ public:
-       {
- 	machine_mode elt_mode = e.vector_mode (0);
- 	rtx arg = e.args[0];
-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
-					       GET_MODE_SIZE (elt_mode)));
-+	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
-+	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
-+					GET_MODE_SIZE (elt_mode)));
-       }
-     return e.use_exact_insn (icode);
-   }
-- 
-2.46.0
-
-
-From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
-
-This patch makes more use of force_lowpart_subreg, similarly
-to the recent patch for force_subreg.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-gcc/
-	PR target/115464
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
-	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
-	simplify_gen_subreg and lowpart_subreg.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-sme.cc
-	(add_load_store_slice_operand): Likewise.
-	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
-	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
-
-(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
---
- gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
- gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
- gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
- gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
- .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
- 5 files changed, 23 insertions(+), 17 deletions(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index b2e46a073a8..264b9560709 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-   int lane = INTVAL (lane_idx);
- 
-   if (lane < nunits / 4)
-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
-			       subreg_lowpart_offset (d->mode, quadmode));
-+    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
-   else
-     {
-       /* Select the upper 64 bits, either a V2SF or V4HF, this however
-@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
- 	 gen_highpart_mode generates code that isn't optimal.  */
-       rtx temp1 = gen_reg_rtx (d->mode);
-       rtx temp2 = gen_reg_rtx (DImode);
-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
-				   subreg_lowpart_offset (d->mode, quadmode));
-+      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
-       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
- 	case AARCH64_WSR64:
- 	case AARCH64_WSRF64:
- 	case AARCH64_WSR128:
-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
-+	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
- 	  break;
- 	case AARCH64_WSRF:
- 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
-@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
-     case AARCH64_RSR64:
-     case AARCH64_RSRF64:
-     case AARCH64_RSR128:
-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
-+      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
-+				   target, sysreg_mode);
-     case AARCH64_RSRF:
-       subreg = gen_lowpart_SUBREG (SImode, target);
-       return gen_lowpart_SUBREG (SFmode, subreg);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 2c95da79572..3c970e9c5f8 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1183,7 +1183,7 @@ public:
-     if (BYTES_BIG_ENDIAN)
-       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
-     insn_code icode = code_for_vcond_mask (mode, mode);
-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-+    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-     e.add_output_operand (icode);
-     e.add_input_operand (icode, e.args[1]);
-     e.add_input_operand (icode, e.args[0]);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-index f4c91bcbb95..b66b35ae60b 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
-   rtx base = e.args[argno];
-   if (e.mode_suffix_id == MODE_vnum)
-     {
-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-+      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-       base = simplify_gen_binary (PLUS, SImode, base, vnum);
-     }
-   e.add_input_operand (icode, base);
-diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
-index 1beec94629d..a064aeecbc0 100644
--- a/gcc/config/aarch64/aarch64.cc
-+++ b/gcc/config/aarch64/aarch64.cc
-@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
-   /* can_change_mode_class must only return true if subregs and svreinterprets
-      have the same semantics.  */
-   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
-    return lowpart_subreg (mode, x, GET_MODE (x));
-+    return force_lowpart_subreg (mode, x, GET_MODE (x));
- 
-   rtx res = gen_reg_rtx (mode);
-   x = force_reg (GET_MODE (x), x);
-@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			    rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = gen_lowpart (DImode, op1);
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
-   *high_in1 = gen_highpart (DImode, op1);
-   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			     rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
- 
-   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-new file mode 100644
-index 00000000000..f561c34f732
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-@@ -0,0 +1,11 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
-+{
-+    return svset_neonq_u16 (a, permute_tbl.val[1]);
-+}
-- 
-2.46.0
-
-
-From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 4/4] Add force_lowpart_subreg
-
-optabs had a local function called lowpart_subreg_maybe_copy
-that is very similar to the lowpart version of force_subreg.
-This patch adds a force_lowpart_subreg wrapper around
-force_subreg and uses it in optabs.cc.
-
-The only difference between the old and new functions is that
-the old one asserted success while the new one doesn't.
-It's common not to assert elsewhere when taking subregs;
-normally a null result is enough.
-
-Later patches will make more use of the new function.
-
-gcc/
-	* explow.h (force_lowpart_subreg): Declare.
-	* explow.cc (force_lowpart_subreg): New function.
-	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
-	(expand_absneg_bit): Use force_lowpart_subreg instead of
-	lowpart_subreg_maybe_copy.
-	(expand_copysign_bit): Likewise.
-
-(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
---
- gcc/explow.cc | 14 ++++++++++++++
- gcc/explow.h  |  1 +
- gcc/optabs.cc | 24 ++----------------------
- 3 files changed, 17 insertions(+), 22 deletions(-)
-
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index f6843398c4b..5fdfa81f69b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
-   return simplify_gen_subreg (outermode, op, innermode, byte);
- }
- 
-+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
-+   which has mode INNERMODE.  Allow OP to be forced into a new register
-+   if necessary.
-+
-+   Return null on failure.  */
-+
-+rtx
-+force_lowpart_subreg (machine_mode outermode, rtx op,
-+		      machine_mode innermode)
-+{
-+  auto byte = subreg_lowpart_offset (outermode, innermode);
-+  return force_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index cbd1fcb7eb3..dd654649b06 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
- extern rtx force_reg (machine_mode, rtx);
- 
- extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
- 
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
-diff --git a/gcc/optabs.cc b/gcc/optabs.cc
-index ce91f94ed43..804c0dc73ba 100644
--- a/gcc/optabs.cc
-+++ b/gcc/optabs.cc
-@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
-   return 0;
- }
- 
-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
-   conditions, VAL may already be a SUBREG against which we cannot generate
-   a further SUBREG.  In this case, we expect forcing the value into a
-   register will work around the situation.  */
-
-static rtx
-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
-			   machine_mode imode)
-{
-  rtx ret;
-  ret = lowpart_subreg (omode, val, imode);
-  if (ret == NULL)
-    {
-      val = force_reg (imode, val);
-      ret = lowpart_subreg (omode, val, imode);
-      gcc_assert (ret != NULL);
-    }
-  return ret;
-}
-
- /* Expand a floating point absolute value or negation operation via a
-    logical operation on the sign bit.  */
- 
-@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
- 			   gen_lowpart (imode, op0),
- 			   immed_wide_int_const (mask, imode),
- 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
- 
-       set_dst_reg_note (get_last_insn (), REG_EQUAL,
- 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
-@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
- 
-       temp = expand_binop (imode, ior_optab, op0, op1,
- 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
-     }
- 
-   return target;
-- 
-2.46.0
-
@@ -150,13 +150,13 @@ diff --git a/gcc/gcc.cc b/gcc/gcc.cc
 index 16bb07f2cdc..33b56e721d2 100644
 --- a/gcc/gcc.cc
 +++ b/gcc/gcc.cc
-@@ -1177,6 +1187,8 @@ proper position among the other output files.  */
-    "-z now " \
+@@ -1146,6 +1146,8 @@ proper position among the other output files.  */
+    "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
    "%X %{o*} %{e*} %{N} %{n} %{r}\
     %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
 +    %{Wno-poison-system-directories:--no-poison-system-directories} \
 +    %{Werror=poison-system-directories:--error-poison-system-directories} \
-     %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \
+     %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \
     VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \
     %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\
 diff --git a/gcc/incpath.cc b/gcc/incpath.cc
@@ -9,22 +9,23 @@ Subject: [PATCH 13/35] nopie
 2 files changed, 40 insertions(+)

 diff --git a/gcc/configure b/gcc/configure
-index 23da7d55d..f38732bb2 100755
+index 8c46369f73f..e59cbee1767 100755
 --- a/gcc/configure
 +++ b/gcc/configure
-@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \
- fi
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5
+@@ -32268,6 +32268,33 @@ fi
 $as_echo "$gcc_cv_no_pie" >&6; }
-+# Check if -nopie works.
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
 +$as_echo_n "checking for -nopie option... " >&6; }
-+if ${gcc_cv_nopie+:} false; then :
+if test "${gcc_cv_nopie+set}" = set; then :
 +  $as_echo_n "(cached) " >&6
 +else
 +  saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+     LDFLAGS="$LDFLAGS -nopie"
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 +/* end confdefs.h.  */
 +int main(void) {return 0;}
 +_ACEOF
@@ -35,51 +36,40 @@ index 23da7d55d..f38732bb2 100755
 +fi
 +rm -f core conftest.err conftest.$ac_objext \
 +    conftest$ac_exeext conftest.$ac_ext
-+   LDFLAGS="$saved_LDFLAGS"
+     LDFLAGS="$saved_LDFLAGS"
 +fi
 +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_nopie" >&5
 +$as_echo "$gcc_cv_nopie" >&6; }
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ 
+ 
 diff --git a/gcc/configure.ac b/gcc/configure.ac
-index d7cf0b92c..db2e2c802 100644
+index 5504bf6eb01..57268319de1 100644
 --- a/gcc/configure.ac
 +++ b/gcc/configure.ac
-@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option],
-      [gcc_cv_no_pie=yes],
-      [gcc_cv_no_pie=no])
+@@ -7552,6 +7552,19 @@ AC_CACHE_CHECK([for -no-pie option],
    LDFLAGS="$saved_LDFLAGS"])
-+# Check if -nopie works.
-+AC_CACHE_CHECK([for -nopie option],
-+  [gcc_cv_nopie],
-+  [saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   AC_LINK_IFELSE([AC_LANG_SOURCE([int main(void) {return 0;}])],
-+     [gcc_cv_nopie=yes],
-+     [gcc_cv_nopie=no])
-+   LDFLAGS="$saved_LDFLAGS"])
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  AC_CACHE_CHECK([for -nopie option],
+    [gcc_cv_nopie],
+    [saved_LDFLAGS="$LDFLAGS"
+     LDFLAGS="$LDFLAGS -nopie"
+     AC_LINK_IFELSE([int main(void) {return 0;}],
+       [gcc_cv_nopie=yes],
+       [gcc_cv_nopie=no])
+     LDFLAGS="$saved_LDFLAGS"])
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ AC_SUBST([NO_PIE_FLAG])
+ 
 -- 
 2.41.0

@@ -46,10 +46,10 @@ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
 index f8c2c351e5a..8d9881eadeb 100644
 --- a/gcc/config/riscv/linux.h
 +++ b/gcc/config/riscv/linux.h
-@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3.  If not see
- 	%{rdynamic:-export-dynamic} \
- 	-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
-     %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}"
+@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3.  If not see
+     %{static:-static}}"
+ 
+ #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 -
 -#define STARTFILE_PREFIX_SPEC 			\
 -   "/lib" XLEN_SPEC "/" ABI_SPEC "/ "		\
@@ -41,15 +41,6 @@ index 96306f8cc9a..090b6770ae5 100644
   LIBGNAT_TARGET_PAIRS = \
   a-intnam.ads<libgnarl/a-intnam__linux.ads \
   s-inmaop.adb<libgnarl/s-inmaop__posix.adb \
-@@ -2311,7 +2311,7 @@ ifeq ($(strip $(filter-out aarch64% linux%,$(target_cpu) $(target_os))),)
-   s-intman.adb<libgnarl/s-intman__posix.adb \
-   s-linux.ads<libgnarl/s-linux.ads \
-   $(TRASYM_DWARF_UNIX_PAIRS) \
-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
-+  s-tsmona.adb<libgnat/s-tsmona.adb \
-   s-mudido.adb<libgnarl/s-mudido__affinity.adb \
-   s-osinte.ads<libgnarl/s-osinte__linux.ads \
-   s-osinte.adb<libgnarl/s-osinte__posix.adb \
@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
   s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
@@ -1,32 +0,0 @@
-From c4f484f465a32e796ae384aa3f90e79fa218b4e9 Mon Sep 17 00:00:00 2001
-From: Jingyun Hua <huajingyun@loongson.cn>
-Date: Mon, 7 Aug 2023 15:25:58 +0800
-Subject: [PATCH] loongarch disable multilib support
-
-Signed-off-by: Jingyun Hua <huajingyun@loongson.cn>
---
- gcc/config/loongarch/t-linux    | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux
-index 23e1fb979..c2753abb8 100644
--- a/gcc/config/loongarch/t-linux
-+++ b/gcc/config/loongarch/t-linux
-@@ -21,11 +21,6 @@ MULTIOSDIR_lp64f := ../lib64/f32$(call if_multiarch,:loongarch64-linux-gnuf32)
- MULTIOSDIR_lp64s := ../lib64/sf$(call if_multiarch,:loongarch64-linux-gnusf)
- 
- # Don't define MULTILIB_OSDIRNAMES if multilib is disabled.
-ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),)
-
-    MULTILIB_OSDIRNAMES = .=$(MULTIOSDIR_$(mlib_default))
-    MULTILIB_OSDIRNAMES += mabi.lp64d=$(MULTIOSDIR_lp64d)
-    MULTILIB_OSDIRNAMES += mabi.lp64f=$(MULTIOSDIR_lp64f)
-    MULTILIB_OSDIRNAMES += mabi.lp64s=$(MULTIOSDIR_lp64s)
-
-endif
-+    MULTILIB_OSDIRNAMES =  mabi.lp64d=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64f=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64s=../lib
-- 
-2.41.0
-
@@ -0,0 +1,186 @@
+https://gcc.gnu.org/PR110792
+https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=790c1f60a5662b16eb19eb4b81922995863c7571
+https://github.com/randombit/botan/issues/3637
+
+From 85628c5653ff40963158a24c60eeec6a3b5a8e56 Mon Sep 17 00:00:00 2001
+From: Roger Sayle <roger@nextmovesoftware.com>
+Date: Thu, 3 Aug 2023 07:12:04 +0100
+Subject: [PATCH] PR target/110792: Early clobber issues with
+ rot32di2_doubleword on i386.
+
+This patch is a conservative fix for PR target/110792, a wrong-code
+regression affecting doubleword rotations by BITS_PER_WORD, which
+effectively swaps the highpart and lowpart words, when the source to be
+rotated resides in memory. The issue is that if the register used to
+hold the lowpart of the destination is mentioned in the address of
+the memory operand, the current define_insn_and_split unintentionally
+clobbers it before reading the highpart.
+
+Hence, for the testcase, the incorrectly generated code looks like:
+
+        salq    $4, %rdi		// calculate address
+        movq    WHIRL_S+8(%rdi), %rdi	// accidentally clobber addr
+        movq    WHIRL_S(%rdi), %rbp	// load (wrong) lowpart
+
+Traditionally, the textbook way to fix this would be to add an
+explicit early clobber to the instruction's constraints.
+
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ [(set (match_operand:DI 0 "register_operand" "=r,r,&r")
+        (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+                       (const_int 32)))]
+
+but unfortunately this currently generates significantly worse code,
+due to a strange choice of reloads (effectively memcpy), which ends up
+looking like:
+
+        salq    $4, %rdi		// calculate address
+        movdqa  WHIRL_S(%rdi), %xmm0	// load the double word in SSE reg.
+        movaps  %xmm0, -16(%rsp)	// store the SSE reg back to the stack
+        movq    -8(%rsp), %rdi		// load highpart
+        movq    -16(%rsp), %rbp		// load lowpart
+
+Note that reload's "&" doesn't distinguish between the memory being
+early clobbered, vs the registers used in an addressing mode being
+early clobbered.
+
+The fix proposed in this patch is to remove the third alternative, that
+allowed offsetable memory as an operand, forcing reload to place the
+operand into a register before the rotation.  This results in:
+
+        salq    $4, %rdi
+        movq    WHIRL_S(%rdi), %rax
+        movq    WHIRL_S+8(%rdi), %rdi
+        movq    %rax, %rbp
+
+I believe there's a more advanced solution, by swapping the order of
+the loads (if first destination register is mentioned in the address),
+or inserting a lea insn (if both destination registers are mentioned
+in the address), but this fix is a minimal "safe" solution, that
+should hopefully be suitable for backporting.
+
+2023-08-03  Roger Sayle  <roger@nextmovesoftware.com>
+
+gcc/ChangeLog
+	PR target/110792
+	* config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
+	place operand in a register before gen_<insn>64ti2_doubleword.
+	(<any_rotate>di3): Likewise, for rotations by 32 bits, place
+	operand in a register before gen_<insn>32di2_doubleword.
+	(<any_rotate>32di2_doubleword): Constrain operand to be in register.
+	(<any_rotate>64ti2_doubleword): Likewise.
+
+gcc/testsuite/ChangeLog
+	PR target/110792
+	* g++.target/i386/pr110792.C: New 32-bit C++ test case.
+	* gcc.target/i386/pr110792.c: New 64-bit C test case.
+
+(cherry picked from commit 790c1f60a5662b16eb19eb4b81922995863c7571)
+---
+ gcc/config/i386/i386.md                  | 18 ++++++++++++------
+ gcc/testsuite/g++.target/i386/pr110792.C | 16 ++++++++++++++++
+ gcc/testsuite/gcc.target/i386/pr110792.c | 18 ++++++++++++++++++
+ 3 files changed, 46 insertions(+), 6 deletions(-)
+ create mode 100644 gcc/testsuite/g++.target/i386/pr110792.C
+ create mode 100644 gcc/testsuite/gcc.target/i386/pr110792.c
+
+diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
+index f3a3305..a71e837 100644
+--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
+@@ -14359,7 +14359,10 @@
+     emit_insn (gen_ix86_<insn>ti3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 64)
+-    emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (TImode, operands[1]);
+      emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    }
+   else
+     {
+       rtx amount = force_reg (QImode, operands[2]);
+@@ -14394,7 +14397,10 @@
+     emit_insn (gen_ix86_<insn>di3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 32)
+-    emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    }
+   else
+     FAIL;
+ 
+@@ -14562,8 +14568,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+-       (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
+       (any_rotate:DI (match_operand:DI 1 "register_operand" "0,r")
+                       (const_int 32)))]
+  "!TARGET_64BIT"
+  "#"
+@@ -14580,8 +14586,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>64ti2_doubleword"
+- [(set (match_operand:TI 0 "register_operand" "=r,r,r")
+-       (any_rotate:TI (match_operand:TI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:TI 0 "register_operand" "=r,r")
+       (any_rotate:TI (match_operand:TI 1 "register_operand" "0,r")
+                       (const_int 64)))]
+  "TARGET_64BIT"
+  "#"
+diff --git a/gcc/testsuite/g++.target/i386/pr110792.C b/gcc/testsuite/g++.target/i386/pr110792.C
+new file mode 100644
+index 0000000..ce21a7a
+--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr110792.C
+@@ -0,0 +1,16 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+template <int ROT, typename T>
+inline T rotr(T input)
+{
+   return static_cast<T>((input >> ROT) | (input << (8 * sizeof(T) - ROT)));
+}
+
+unsigned long long WHIRL_S[256] = {0x18186018C07830D8};
+unsigned long long whirl(unsigned char x0)
+{
+   const unsigned long long s4 = WHIRL_S[x0&0xFF];
+   return rotr<32>(s4);
+}
+/* { dg-final { scan-assembler-not "movl\tWHIRL_S\\+4\\(,%eax,8\\), %eax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr110792.c b/gcc/testsuite/gcc.target/i386/pr110792.c
+new file mode 100644
+index 0000000..b65125c
+--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr110792.c
+@@ -0,0 +1,18 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+
+static inline unsigned __int128 rotr(unsigned __int128 input)
+{
+   return ((input >> 64) | (input << (64)));
+}
+
+unsigned __int128 WHIRL_S[256] = {((__int128)0x18186018C07830D8) << 64 |0x18186018C07830D8};
+unsigned __int128 whirl(unsigned char x0)
+{
+   register int t __asm("rdi") = x0&0xFF;
+   const unsigned __int128 s4 = WHIRL_S[t];
+   register unsigned __int128 tt  __asm("rdi") = rotr(s4);
+   asm("":::"memory");
+   return tt;
+}
+/* { dg-final { scan-assembler-not "movq\tWHIRL_S\\+8\\(%rdi\\), %rdi" } } */
+-- 
+2.41.0
+
@@ -24,7 +24,7 @@ CBUILDROOT="/"
 _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET"

 pkgname=gcc-riscv64
-pkgver=14.2.0
+pkgver=13.2.1_git20231014
 # i.e. 13.2.1, must match gcc/BASE-VER
 _pkgbase="${pkgver%%_git*}"
 # date component from snapshots
@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""

 pkgname=gcc-riscv64
-pkgrel=2
+pkgrel=0
 pkgdesc="Stage2 cross-compiler for riscv64"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -46,7 +46,6 @@ makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-
 subpackages="g++-riscv64:gpp libstdc++-dev-riscv64:libcxx_dev"
 [ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc$_target"
 replaces="libstdc++ binutils"
-options="!strip"

 : "${LANG_CXX:=true}"
 : "${LANG_D:=true}"
@@ -144,7 +143,7 @@ case "$CARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -156,7 +155,6 @@ case "$CTARGET_ARCH" in
 arm*)		_libitm=false ;;
 mips*)		_libitm=false ;;
 riscv64)	_libitm=false ;;
-loongarch64)	_libitm=false ;;
 esac

 # Internal libffi fails to build on MIPS at the moment, need to
@@ -164,14 +162,13 @@ esac
 # the internal libffi.
 case "$CTARGET_ARCH" in
 mips*)		LANG_GO=false ;;
-loongarch64)	LANG_GO=false ;;
 esac

 # Fortran uses libquadmath if toolchain has __float128
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac

@@ -189,11 +186,6 @@ riscv64)
 LANG_ADA=false;;
 esac

-case "$CTARGET_ARCH" in
-loongarch64)
-LANG_ADA=false;;
-esac
-
 _languages=c
 if $LANG_CXX; then
 	_languages="$_languages,c++"
@@ -241,8 +233,7 @@ makedepends="$makedepends_build $makedepends_host"
 #
 # PLEASE submit all patches to gcc to https://gitlab.alpinelinux.org/kaniini/alpine-gcc-patches,
 # so that they can be properly tracked and easily rebased if needed.
-#source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
-source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkgbase:-$pkgver}.tar.xz
+source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
 	0001-posix_memalign.patch
 	0002-gcc-poison-system-directories.patch
 	0003-specs-turn-on-Wl-z-now-by-default.patch
@@ -277,8 +268,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
-	0035-loongarch-disable-multilib-support.patch
-	fix-arm64.patch
+	0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 	"

 # secfixes:
@@ -286,8 +276,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 #     - CVE-2023-4039

 # we build out-of-tree
-#_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
-_gccdir="$srcdir"/gcc-${_pkgbase:-$pkgver}
+_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
 _gcclibdir="/usr/lib/gcc/$CTARGET/${_pkgbase:-$pkgver}"
 _gcclibexec="/usr/libexec/gcc/$CTARGET/${_pkgbase:-$pkgver}"

@@ -339,7 +328,6 @@ build() {
 	i586-*-*-*)		_arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";;
 	s390x-*-*-*)		_arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";;
 	riscv64-*-*-*)		_arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";;
-	loongarch64-*-*-*)      _arch_configure="--with-arch=loongarch64 --with-abi=lp64d --with-tls=trad";;
 	esac

 	case "$CTARGET_ARCH" in
@@ -366,14 +354,7 @@ build() {
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"

 	msg "Building the following:"
 	echo ""
@@ -702,6 +683,10 @@ go() {
 	depends="gcc=$_gccrel libgo=$_gccrel !go"
 	install="$pkgname-go.post-install"

+	# See https://lists.alpinelinux.org/~alpine/devel/%3C33KG0XO61I4IL.2Z7RTAZ5J3SY6%408pit.net%3E
+	provides="go-bootstrap"
+	provider_priority=1 # lowest, see community/go
+
 	mkdir -p "$subpkgdir"/$_gcclibexec \
 		"$subpkgdir"/usr/lib \
 		"$subpkgdir"/usr/bin
@@ -802,9 +787,9 @@ gdb() {
 }

 sha512sums="
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+406673a62deba759fc0532a801b3f57cabf894ea328587b23e62a707ba5767b0e3ae9b3f86bf3c6fcf13e8a3c30bc470e6598b625c8231efb629034211c162c2  gcc-13-20231014.tar.xz
 1ecffba1b07d60e1b4422302b032bbea918b674c8e12b30aa6965b544d700ce86b61e9f7b8d402c6caf59257f491a394dd0912f0948565d6eae9335ee54f3b35  0001-posix_memalign.patch
-1d102a7b17683909dde4d8591dd889149299e77a2b2003cdc0635dc816666be940e41ae534b469485391a9bed183cd5cd337f130e4e1ecb62cb9ad86c4a081db  0002-gcc-poison-system-directories.patch
+163f282455b6a4df33f011bcd8b0440566ba0ffaeeab30d8ac52d39948980a56881ca0eff60687129d59556389a58b9d64e7768750bd70b1fe0fedbc9fc30dc2  0002-gcc-poison-system-directories.patch
 3f24bb6a50d3c45b71ea05590e32fe3e69b91377ab185352891d5035c76ed193117c6d0b314a4c364bcf136b9a9dd5c926d6c7c30ab436976c121ebfea8d3ddd  0003-specs-turn-on-Wl-z-now-by-default.patch
 17a2993027d3ddf8595952ebcae425695ddc7b1cf73b384d2e55fddecb9cbf3f6482860a502ff69b14075e12badf27300fd3039f3a9005e851fd8d121d258c2b  0004-Turn-on-D_FORTIFY_SOURCE-2-by-default-for-C-C-ObjC-O.patch
 444550e55491ff89fe8cbbb4b73d017c9c147cdce1ad5c0561fe7d6ab3834515a814c7676c408cfeec18e1aaace27b3c26a2ffe4a75042285df5124976c38672  0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch
@@ -815,7 +800,7 @@ sha512sums="
 da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02daf8e34f60c08b61f5d3959305886dca9bbcdc84db057258d9  0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch
 35b9aafe7eee8138cb7aad7164a8f77c15ccdce26843cee78b5871ef91d76cad22ed0871b20f51c4b89b71afd9cfe4ba4227086e158c466558513708fe7d2a1a  0011-libiberty-copy-PIC-objects-during-build-process.patch
 9d43f844fad0ac6e1c35a2b6f461f9278ae09e468f2c9ae8adc43accbe6934994aa10d3a433644d1393a4a76e3caed69e3191db7f3c0c24b4e7a0a0a0cbac3f1  0012-libgcc_s.patch
-91dde3079c1400c124ab5604597f5857185d075809649603aa3641a4581b34029bfcbd4281a5bd925d1c5e6e3b1f5f3322efda34345c6930652d685a6c9525f4  0013-nopie.patch
+b2c4921c5eef33ee43a92ab5ec7f09d5d3adb49a2416595001e6376ffdf652ef9d0dc21778c3a86e45334290dbe467a4e891ed34a6522e0c72f746def22e8663  0013-nopie.patch
 0b50ad15115192699efa9fda3d4fb1c2fa95da06d7880ba34615b40c19a8256e1fe364da39f5c70dc22fbccf21db2de5900932afef68948722eeb25e435262f8  0014-ada-fix-shared-linking.patch
 00097c7106625ccf02149a757366f434c48f2abe824bb8b4bf067d29308889cb6039a5e5b2d3bd2683617693b47707d549252c56eea6bc3cdc2450a8d14f46a7  0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch
 7f0bc42b93a389b614054e700b851abfbc53db391aa10cbdf6990d41396b293af78980bb39f1cf0967184d3fbf3d46ac7c7f096717b8f193ea34cbf7f37d7e91  0016-add-fortify-headers-paths.patch
@@ -825,10 +810,10 @@ da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02da
 a9567947471c3ba8a547a79c55e183974554bf823d9a97a165c966d7b3caad8789980e096e3b78452ece5de062bd9bb006af464bbf0c5a35b689eac3ee21e5c5  0020-s390x-disable-multilib-support.patch
 f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8b7944fa17487478e73958be45d5782ccb9ef501961fb9a96  0021-ppc64-le-disable-multilib-support.patch
 44ab86feb8e41e7c2b2e27accdf46194c9b80ee6a39543303dc04824f669d9fad182aabd40c9c7f6c265cf9bb71be830c257be115dc9d701d54eca3aa9ef174e  0022-x86_64-disable-multilib-support.patch
-abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
+e0763083c31485e8ac0b3724376a28af01bb6f50e1a054780b61886e4e3de2a35d127e6e353eb8d8729964ada9b5751bf05bdd51df539667008216db38f228a3  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+30369bea84020c32d514196ba3adb3d09d2d0359af5550bd3f9719aa357e44b2f695623c1d2a99416e120dc86896c196c5dd4f638183dced4799604137385367  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,6 +822,5 @@ d47b559075f40d526235f47b91da1d0cf6bfe6c5b7311bbfe08af9dd6e8f27e6c7cd82e3b2d529aa
 b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95e21c9ffbf2412193f8b9fc89a4c36fa5a6a041661ac7399d  0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
-65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+cc1e10ac6e72db816f09325e301103109cc212a6f3de3ce0b9b038d149233c467319d203941695dbf3d7b9e2dcbbcd17609cdb056e831fcc323cd592423882d8  0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 "
@@ -1,544 +0,0 @@
-From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Thu, 13 Jun 2024 12:48:21 +0100
-Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
-
-The testcase extracts one arm_neon.h vector from a pair (one subreg)
-and then reinterprets the result as an SVE vector (another subreg).
-Each subreg makes sense individually, but we can't fold them together
-into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
-but the interpretation of 32 bytes -> 16*N bytes depends on
-whether N==1 or N>1.
-
-Since the second subreg makes sense individually, simplify_subreg
-should bail out rather than ICE on it.  simplify_gen_subreg will
-then do the same (because it already checks validate_subreg).
-This leaves simplify_gen_subreg returning null, requiring the
-caller to take appropriate action.
-
-I think this is relatively likely to occur elsewhere, so the patch
-adds a helper for forcing a subreg, allowing a temporary pseudo to
-be created where necessary.
-
-I'll follow up by using force_subreg in more places.  This patch
-is intended to be a minimal backportable fix for the PR.
-
-gcc/
-	PR target/115464
-	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
-	to fold two subregs together if their relationship isn't known
-	at compile time.
-	* explow.h (force_subreg): Declare.
-	* explow.cc (force_subreg): New function.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
-
-(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
---
- gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
- gcc/explow.cc                                     | 15 +++++++++++++++
- gcc/explow.h                                      |  2 ++
- gcc/simplify-rtx.cc                               |  5 +++++
- .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
- 5 files changed, 36 insertions(+), 1 deletion(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 0d2edf3f19e..c9182594bc1 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1174,7 +1174,7 @@ public:
-        Advanced SIMD argument as an SVE vector.  */
-     if (!BYTES_BIG_ENDIAN
- 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
-+      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
- 
-     rtx_vector_builder builder (VNx16BImode, 16, 2);
-     for (unsigned int i = 0; i < 16; i++)
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index 8e5f6b8e680..f6843398c4b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
-   return temp;
- }
- 
-+/* Like simplify_gen_subreg, but force OP into a new register if the
-+   subreg cannot be formed directly.  */
-+
-+rtx
-+force_subreg (machine_mode outermode, rtx op,
-+	      machine_mode innermode, poly_uint64 byte)
-+{
-+  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
-+  if (x)
-+    return x;
-+
-+  op = copy_to_mode_reg (innermode, op);
-+  return simplify_gen_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index 16aa02cfb68..cbd1fcb7eb3 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
-    Args are mode (in case value is a constant) and the value.  */
- extern rtx force_reg (machine_mode, rtx);
- 
-+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
- 
-diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
-index dceaa13333c..729d408aa55 100644
--- a/gcc/simplify-rtx.cc
-+++ b/gcc/simplify-rtx.cc
-@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
-       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
-       rtx newx;
- 
-+      /* Make sure that the relationship between the two subregs is
-+	 known at compile time.  */
-+      if (!ordered_p (outersize, innermostsize))
-+	return NULL_RTX;
-+
-       if (outermode == innermostmode
- 	  && known_eq (byte, 0U)
- 	  && known_eq (SUBREG_BYTE (op), 0))
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-new file mode 100644
-index 00000000000..d728d1325ed
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-@@ -0,0 +1,13 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl)
-+{
-+    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
-+}
-+
-+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
-- 
-2.46.0
-
-
-From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:30 +0100
-Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
-
-This patch makes the aarch64 code use force_subreg instead of
-simplify_gen_subreg in more places.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-(3) The offset wasn't a simple lowpart or highpart calculation;
-    a later patch will deal with those.
-
-gcc/
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
-	Use force_subreg instead of simplify_gen_subreg.
-	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svget_impl::expand): Likewise.
-	(svget_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-functions.h
-	(multireg_permute::expand): Likewise.
-
-(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
---
- gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
- gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
- gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
- gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
- 4 files changed, 10 insertions(+), 12 deletions(-)
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index 75d21de1401..b2e46a073a8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-       rtx temp2 = gen_reg_rtx (DImode);
-       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
- 				   subreg_lowpart_offset (d->mode, quadmode));
-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
-+      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-       else
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
-+      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
- 
-       /* And recalculate the index.  */
-       lane -= nunits / 4;
-diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
-index 33ab0741e87..5b9efe0b165 100644
--- a/gcc/config/aarch64/aarch64-simd.md
-+++ b/gcc/config/aarch64/aarch64-simd.md
-@@ -412,8 +412,8 @@
-   "TARGET_SIMD"
-   {
-      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
-					     <MODE>mode, 0);
-+     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
-+				       <MODE>mode, 0);
-      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
-      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
-      DONE;
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index c9182594bc1..2c95da79572 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1121,9 +1121,8 @@ public:
-   expand (function_expander &e) const override
-   {
-     /* Fold the access into a subreg rvalue.  */
-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
-				GET_MODE (e.args[0]),
-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-+    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
-+			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-   }
- };
- 
-@@ -1157,8 +1156,7 @@ public:
- 	e.add_fixed_operand (indices);
- 	return e.generate_insn (icode);
-       }
-    return simplify_gen_subreg (e.result_mode (), e.args[0],
-				GET_MODE (e.args[0]), 0);
-+    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
-   }
- };
- 
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-index 3b8e575e98e..7d06a57ff83 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-@@ -639,9 +639,9 @@ public:
-       {
- 	machine_mode elt_mode = e.vector_mode (0);
- 	rtx arg = e.args[0];
-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
-					       GET_MODE_SIZE (elt_mode)));
-+	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
-+	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
-+					GET_MODE_SIZE (elt_mode)));
-       }
-     return e.use_exact_insn (icode);
-   }
-- 
-2.46.0
-
-
-From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
-
-This patch makes more use of force_lowpart_subreg, similarly
-to the recent patch for force_subreg.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-gcc/
-	PR target/115464
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
-	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
-	simplify_gen_subreg and lowpart_subreg.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-sme.cc
-	(add_load_store_slice_operand): Likewise.
-	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
-	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
-
-(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
---
- gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
- gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
- gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
- gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
- .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
- 5 files changed, 23 insertions(+), 17 deletions(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index b2e46a073a8..264b9560709 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-   int lane = INTVAL (lane_idx);
- 
-   if (lane < nunits / 4)
-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
-			       subreg_lowpart_offset (d->mode, quadmode));
-+    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
-   else
-     {
-       /* Select the upper 64 bits, either a V2SF or V4HF, this however
-@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
- 	 gen_highpart_mode generates code that isn't optimal.  */
-       rtx temp1 = gen_reg_rtx (d->mode);
-       rtx temp2 = gen_reg_rtx (DImode);
-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
-				   subreg_lowpart_offset (d->mode, quadmode));
-+      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
-       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
- 	case AARCH64_WSR64:
- 	case AARCH64_WSRF64:
- 	case AARCH64_WSR128:
-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
-+	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
- 	  break;
- 	case AARCH64_WSRF:
- 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
-@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
-     case AARCH64_RSR64:
-     case AARCH64_RSRF64:
-     case AARCH64_RSR128:
-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
-+      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
-+				   target, sysreg_mode);
-     case AARCH64_RSRF:
-       subreg = gen_lowpart_SUBREG (SImode, target);
-       return gen_lowpart_SUBREG (SFmode, subreg);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 2c95da79572..3c970e9c5f8 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1183,7 +1183,7 @@ public:
-     if (BYTES_BIG_ENDIAN)
-       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
-     insn_code icode = code_for_vcond_mask (mode, mode);
-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-+    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-     e.add_output_operand (icode);
-     e.add_input_operand (icode, e.args[1]);
-     e.add_input_operand (icode, e.args[0]);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-index f4c91bcbb95..b66b35ae60b 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
-   rtx base = e.args[argno];
-   if (e.mode_suffix_id == MODE_vnum)
-     {
-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-+      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-       base = simplify_gen_binary (PLUS, SImode, base, vnum);
-     }
-   e.add_input_operand (icode, base);
-diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
-index 1beec94629d..a064aeecbc0 100644
--- a/gcc/config/aarch64/aarch64.cc
-+++ b/gcc/config/aarch64/aarch64.cc
-@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
-   /* can_change_mode_class must only return true if subregs and svreinterprets
-      have the same semantics.  */
-   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
-    return lowpart_subreg (mode, x, GET_MODE (x));
-+    return force_lowpart_subreg (mode, x, GET_MODE (x));
- 
-   rtx res = gen_reg_rtx (mode);
-   x = force_reg (GET_MODE (x), x);
-@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			    rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = gen_lowpart (DImode, op1);
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
-   *high_in1 = gen_highpart (DImode, op1);
-   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			     rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
- 
-   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-new file mode 100644
-index 00000000000..f561c34f732
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-@@ -0,0 +1,11 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
-+{
-+    return svset_neonq_u16 (a, permute_tbl.val[1]);
-+}
-- 
-2.46.0
-
-
-From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 4/4] Add force_lowpart_subreg
-
-optabs had a local function called lowpart_subreg_maybe_copy
-that is very similar to the lowpart version of force_subreg.
-This patch adds a force_lowpart_subreg wrapper around
-force_subreg and uses it in optabs.cc.
-
-The only difference between the old and new functions is that
-the old one asserted success while the new one doesn't.
-It's common not to assert elsewhere when taking subregs;
-normally a null result is enough.
-
-Later patches will make more use of the new function.
-
-gcc/
-	* explow.h (force_lowpart_subreg): Declare.
-	* explow.cc (force_lowpart_subreg): New function.
-	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
-	(expand_absneg_bit): Use force_lowpart_subreg instead of
-	lowpart_subreg_maybe_copy.
-	(expand_copysign_bit): Likewise.
-
-(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
---
- gcc/explow.cc | 14 ++++++++++++++
- gcc/explow.h  |  1 +
- gcc/optabs.cc | 24 ++----------------------
- 3 files changed, 17 insertions(+), 22 deletions(-)
-
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index f6843398c4b..5fdfa81f69b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
-   return simplify_gen_subreg (outermode, op, innermode, byte);
- }
- 
-+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
-+   which has mode INNERMODE.  Allow OP to be forced into a new register
-+   if necessary.
-+
-+   Return null on failure.  */
-+
-+rtx
-+force_lowpart_subreg (machine_mode outermode, rtx op,
-+		      machine_mode innermode)
-+{
-+  auto byte = subreg_lowpart_offset (outermode, innermode);
-+  return force_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index cbd1fcb7eb3..dd654649b06 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
- extern rtx force_reg (machine_mode, rtx);
- 
- extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
- 
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
-diff --git a/gcc/optabs.cc b/gcc/optabs.cc
-index ce91f94ed43..804c0dc73ba 100644
--- a/gcc/optabs.cc
-+++ b/gcc/optabs.cc
-@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
-   return 0;
- }
- 
-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
-   conditions, VAL may already be a SUBREG against which we cannot generate
-   a further SUBREG.  In this case, we expect forcing the value into a
-   register will work around the situation.  */
-
-static rtx
-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
-			   machine_mode imode)
-{
-  rtx ret;
-  ret = lowpart_subreg (omode, val, imode);
-  if (ret == NULL)
-    {
-      val = force_reg (imode, val);
-      ret = lowpart_subreg (omode, val, imode);
-      gcc_assert (ret != NULL);
-    }
-  return ret;
-}
-
- /* Expand a floating point absolute value or negation operation via a
-    logical operation on the sign bit.  */
- 
-@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
- 			   gen_lowpart (imode, op0),
- 			   immed_wide_int_const (mask, imode),
- 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
- 
-       set_dst_reg_note (get_last_insn (), REG_EQUAL,
- 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
-@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
- 
-       temp = expand_binop (imode, ior_optab, op0, op1,
- 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
-     }
- 
-   return target;
-- 
-2.46.0
-
@@ -150,13 +150,13 @@ diff --git a/gcc/gcc.cc b/gcc/gcc.cc
 index 16bb07f2cdc..33b56e721d2 100644
 --- a/gcc/gcc.cc
 +++ b/gcc/gcc.cc
-@@ -1177,6 +1187,8 @@ proper position among the other output files.  */
-    "-z now " \
+@@ -1146,6 +1146,8 @@ proper position among the other output files.  */
+    "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
    "%X %{o*} %{e*} %{N} %{n} %{r}\
     %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
 +    %{Wno-poison-system-directories:--no-poison-system-directories} \
 +    %{Werror=poison-system-directories:--error-poison-system-directories} \
-     %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \
+     %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \
     VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \
     %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\
 diff --git a/gcc/incpath.cc b/gcc/incpath.cc
@@ -9,22 +9,23 @@ Subject: [PATCH 13/35] nopie
 2 files changed, 40 insertions(+)

 diff --git a/gcc/configure b/gcc/configure
-index 23da7d55d..f38732bb2 100755
+index 8c46369f73f..e59cbee1767 100755
 --- a/gcc/configure
 +++ b/gcc/configure
-@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \
- fi
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5
+@@ -32268,6 +32268,33 @@ fi
 $as_echo "$gcc_cv_no_pie" >&6; }
-+# Check if -nopie works.
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
 +$as_echo_n "checking for -nopie option... " >&6; }
-+if ${gcc_cv_nopie+:} false; then :
+if test "${gcc_cv_nopie+set}" = set; then :
 +  $as_echo_n "(cached) " >&6
 +else
 +  saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+     LDFLAGS="$LDFLAGS -nopie"
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 +/* end confdefs.h.  */
 +int main(void) {return 0;}
 +_ACEOF
@@ -35,51 +36,40 @@ index 23da7d55d..f38732bb2 100755
 +fi
 +rm -f core conftest.err conftest.$ac_objext \
 +    conftest$ac_exeext conftest.$ac_ext
-+   LDFLAGS="$saved_LDFLAGS"
+     LDFLAGS="$saved_LDFLAGS"
 +fi
 +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_nopie" >&5
 +$as_echo "$gcc_cv_nopie" >&6; }
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ 
+ 
 diff --git a/gcc/configure.ac b/gcc/configure.ac
-index d7cf0b92c..db2e2c802 100644
+index 5504bf6eb01..57268319de1 100644
 --- a/gcc/configure.ac
 +++ b/gcc/configure.ac
-@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option],
-      [gcc_cv_no_pie=yes],
-      [gcc_cv_no_pie=no])
+@@ -7552,6 +7552,19 @@ AC_CACHE_CHECK([for -no-pie option],
    LDFLAGS="$saved_LDFLAGS"])
-+# Check if -nopie works.
-+AC_CACHE_CHECK([for -nopie option],
-+  [gcc_cv_nopie],
-+  [saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   AC_LINK_IFELSE([AC_LANG_SOURCE([int main(void) {return 0;}])],
-+     [gcc_cv_nopie=yes],
-+     [gcc_cv_nopie=no])
-+   LDFLAGS="$saved_LDFLAGS"])
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  AC_CACHE_CHECK([for -nopie option],
+    [gcc_cv_nopie],
+    [saved_LDFLAGS="$LDFLAGS"
+     LDFLAGS="$LDFLAGS -nopie"
+     AC_LINK_IFELSE([int main(void) {return 0;}],
+       [gcc_cv_nopie=yes],
+       [gcc_cv_nopie=no])
+     LDFLAGS="$saved_LDFLAGS"])
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ AC_SUBST([NO_PIE_FLAG])
+ 
 -- 
 2.41.0

@@ -46,10 +46,10 @@ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
 index f8c2c351e5a..8d9881eadeb 100644
 --- a/gcc/config/riscv/linux.h
 +++ b/gcc/config/riscv/linux.h
-@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3.  If not see
- 	%{rdynamic:-export-dynamic} \
- 	-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
-     %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}"
+@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3.  If not see
+     %{static:-static}}"
+ 
+ #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 -
 -#define STARTFILE_PREFIX_SPEC 			\
 -   "/lib" XLEN_SPEC "/" ABI_SPEC "/ "		\
@@ -41,15 +41,6 @@ index 96306f8cc9a..090b6770ae5 100644
   LIBGNAT_TARGET_PAIRS = \
   a-intnam.ads<libgnarl/a-intnam__linux.ads \
   s-inmaop.adb<libgnarl/s-inmaop__posix.adb \
-@@ -2311,7 +2311,7 @@ ifeq ($(strip $(filter-out aarch64% linux%,$(target_cpu) $(target_os))),)
-   s-intman.adb<libgnarl/s-intman__posix.adb \
-   s-linux.ads<libgnarl/s-linux.ads \
-   $(TRASYM_DWARF_UNIX_PAIRS) \
-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
-+  s-tsmona.adb<libgnat/s-tsmona.adb \
-   s-mudido.adb<libgnarl/s-mudido__affinity.adb \
-   s-osinte.ads<libgnarl/s-osinte__linux.ads \
-   s-osinte.adb<libgnarl/s-osinte__posix.adb \
@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
   s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
@@ -1,32 +0,0 @@
-From c4f484f465a32e796ae384aa3f90e79fa218b4e9 Mon Sep 17 00:00:00 2001
-From: Jingyun Hua <huajingyun@loongson.cn>
-Date: Mon, 7 Aug 2023 15:25:58 +0800
-Subject: [PATCH] loongarch disable multilib support
-
-Signed-off-by: Jingyun Hua <huajingyun@loongson.cn>
---
- gcc/config/loongarch/t-linux    | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux
-index 23e1fb979..c2753abb8 100644
--- a/gcc/config/loongarch/t-linux
-+++ b/gcc/config/loongarch/t-linux
-@@ -21,11 +21,6 @@ MULTIOSDIR_lp64f := ../lib64/f32$(call if_multiarch,:loongarch64-linux-gnuf32)
- MULTIOSDIR_lp64s := ../lib64/sf$(call if_multiarch,:loongarch64-linux-gnusf)
- 
- # Don't define MULTILIB_OSDIRNAMES if multilib is disabled.
-ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),)
-
-    MULTILIB_OSDIRNAMES = .=$(MULTIOSDIR_$(mlib_default))
-    MULTILIB_OSDIRNAMES += mabi.lp64d=$(MULTIOSDIR_lp64d)
-    MULTILIB_OSDIRNAMES += mabi.lp64f=$(MULTIOSDIR_lp64f)
-    MULTILIB_OSDIRNAMES += mabi.lp64s=$(MULTIOSDIR_lp64s)
-
-endif
-+    MULTILIB_OSDIRNAMES =  mabi.lp64d=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64f=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64s=../lib
-- 
-2.41.0
-
@@ -0,0 +1,186 @@
+https://gcc.gnu.org/PR110792
+https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=790c1f60a5662b16eb19eb4b81922995863c7571
+https://github.com/randombit/botan/issues/3637
+
+From 85628c5653ff40963158a24c60eeec6a3b5a8e56 Mon Sep 17 00:00:00 2001
+From: Roger Sayle <roger@nextmovesoftware.com>
+Date: Thu, 3 Aug 2023 07:12:04 +0100
+Subject: [PATCH] PR target/110792: Early clobber issues with
+ rot32di2_doubleword on i386.
+
+This patch is a conservative fix for PR target/110792, a wrong-code
+regression affecting doubleword rotations by BITS_PER_WORD, which
+effectively swaps the highpart and lowpart words, when the source to be
+rotated resides in memory. The issue is that if the register used to
+hold the lowpart of the destination is mentioned in the address of
+the memory operand, the current define_insn_and_split unintentionally
+clobbers it before reading the highpart.
+
+Hence, for the testcase, the incorrectly generated code looks like:
+
+        salq    $4, %rdi		// calculate address
+        movq    WHIRL_S+8(%rdi), %rdi	// accidentally clobber addr
+        movq    WHIRL_S(%rdi), %rbp	// load (wrong) lowpart
+
+Traditionally, the textbook way to fix this would be to add an
+explicit early clobber to the instruction's constraints.
+
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ [(set (match_operand:DI 0 "register_operand" "=r,r,&r")
+        (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+                       (const_int 32)))]
+
+but unfortunately this currently generates significantly worse code,
+due to a strange choice of reloads (effectively memcpy), which ends up
+looking like:
+
+        salq    $4, %rdi		// calculate address
+        movdqa  WHIRL_S(%rdi), %xmm0	// load the double word in SSE reg.
+        movaps  %xmm0, -16(%rsp)	// store the SSE reg back to the stack
+        movq    -8(%rsp), %rdi		// load highpart
+        movq    -16(%rsp), %rbp		// load lowpart
+
+Note that reload's "&" doesn't distinguish between the memory being
+early clobbered, vs the registers used in an addressing mode being
+early clobbered.
+
+The fix proposed in this patch is to remove the third alternative, that
+allowed offsetable memory as an operand, forcing reload to place the
+operand into a register before the rotation.  This results in:
+
+        salq    $4, %rdi
+        movq    WHIRL_S(%rdi), %rax
+        movq    WHIRL_S+8(%rdi), %rdi
+        movq    %rax, %rbp
+
+I believe there's a more advanced solution, by swapping the order of
+the loads (if first destination register is mentioned in the address),
+or inserting a lea insn (if both destination registers are mentioned
+in the address), but this fix is a minimal "safe" solution, that
+should hopefully be suitable for backporting.
+
+2023-08-03  Roger Sayle  <roger@nextmovesoftware.com>
+
+gcc/ChangeLog
+	PR target/110792
+	* config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
+	place operand in a register before gen_<insn>64ti2_doubleword.
+	(<any_rotate>di3): Likewise, for rotations by 32 bits, place
+	operand in a register before gen_<insn>32di2_doubleword.
+	(<any_rotate>32di2_doubleword): Constrain operand to be in register.
+	(<any_rotate>64ti2_doubleword): Likewise.
+
+gcc/testsuite/ChangeLog
+	PR target/110792
+	* g++.target/i386/pr110792.C: New 32-bit C++ test case.
+	* gcc.target/i386/pr110792.c: New 64-bit C test case.
+
+(cherry picked from commit 790c1f60a5662b16eb19eb4b81922995863c7571)
+---
+ gcc/config/i386/i386.md                  | 18 ++++++++++++------
+ gcc/testsuite/g++.target/i386/pr110792.C | 16 ++++++++++++++++
+ gcc/testsuite/gcc.target/i386/pr110792.c | 18 ++++++++++++++++++
+ 3 files changed, 46 insertions(+), 6 deletions(-)
+ create mode 100644 gcc/testsuite/g++.target/i386/pr110792.C
+ create mode 100644 gcc/testsuite/gcc.target/i386/pr110792.c
+
+diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
+index f3a3305..a71e837 100644
+--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
+@@ -14359,7 +14359,10 @@
+     emit_insn (gen_ix86_<insn>ti3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 64)
+-    emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (TImode, operands[1]);
+      emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    }
+   else
+     {
+       rtx amount = force_reg (QImode, operands[2]);
+@@ -14394,7 +14397,10 @@
+     emit_insn (gen_ix86_<insn>di3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 32)
+-    emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    }
+   else
+     FAIL;
+ 
+@@ -14562,8 +14568,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+-       (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
+       (any_rotate:DI (match_operand:DI 1 "register_operand" "0,r")
+                       (const_int 32)))]
+  "!TARGET_64BIT"
+  "#"
+@@ -14580,8 +14586,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>64ti2_doubleword"
+- [(set (match_operand:TI 0 "register_operand" "=r,r,r")
+-       (any_rotate:TI (match_operand:TI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:TI 0 "register_operand" "=r,r")
+       (any_rotate:TI (match_operand:TI 1 "register_operand" "0,r")
+                       (const_int 64)))]
+  "TARGET_64BIT"
+  "#"
+diff --git a/gcc/testsuite/g++.target/i386/pr110792.C b/gcc/testsuite/g++.target/i386/pr110792.C
+new file mode 100644
+index 0000000..ce21a7a
+--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr110792.C
+@@ -0,0 +1,16 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+template <int ROT, typename T>
+inline T rotr(T input)
+{
+   return static_cast<T>((input >> ROT) | (input << (8 * sizeof(T) - ROT)));
+}
+
+unsigned long long WHIRL_S[256] = {0x18186018C07830D8};
+unsigned long long whirl(unsigned char x0)
+{
+   const unsigned long long s4 = WHIRL_S[x0&0xFF];
+   return rotr<32>(s4);
+}
+/* { dg-final { scan-assembler-not "movl\tWHIRL_S\\+4\\(,%eax,8\\), %eax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr110792.c b/gcc/testsuite/gcc.target/i386/pr110792.c
+new file mode 100644
+index 0000000..b65125c
+--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr110792.c
+@@ -0,0 +1,18 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+
+static inline unsigned __int128 rotr(unsigned __int128 input)
+{
+   return ((input >> 64) | (input << (64)));
+}
+
+unsigned __int128 WHIRL_S[256] = {((__int128)0x18186018C07830D8) << 64 |0x18186018C07830D8};
+unsigned __int128 whirl(unsigned char x0)
+{
+   register int t __asm("rdi") = x0&0xFF;
+   const unsigned __int128 s4 = WHIRL_S[t];
+   register unsigned __int128 tt  __asm("rdi") = rotr(s4);
+   asm("":::"memory");
+   return tt;
+}
+/* { dg-final { scan-assembler-not "movq\tWHIRL_S\\+8\\(%rdi\\), %rdi" } } */
+-- 
+2.41.0
+
@@ -24,7 +24,7 @@ CBUILDROOT="/"
 _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET"

 pkgname=gcc-x86
-pkgver=14.2.0
+pkgver=13.2.1_git20231014
 # i.e. 13.2.1, must match gcc/BASE-VER
 _pkgbase="${pkgver%%_git*}"
 # date component from snapshots
@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""

 pkgname=gcc-x86
-pkgrel=2
+pkgrel=0
 pkgdesc="Stage2 cross-compiler for x86"
 url="https://gcc.gnu.org"
 arch="x86_64"
@@ -46,7 +46,6 @@ makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-
 subpackages="g++-x86:gpp libstdc++-dev-x86:libcxx_dev"
 [ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc$_target"
 replaces="libstdc++ binutils"
-options="!strip"

 : "${LANG_CXX:=true}"
 : "${LANG_D:=true}"
@@ -144,7 +143,7 @@ case "$CARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -156,7 +155,6 @@ case "$CTARGET_ARCH" in
 arm*)		_libitm=false ;;
 mips*)		_libitm=false ;;
 riscv64)	_libitm=false ;;
-loongarch64)	_libitm=false ;;
 esac

 # Internal libffi fails to build on MIPS at the moment, need to
@@ -164,14 +162,13 @@ esac
 # the internal libffi.
 case "$CTARGET_ARCH" in
 mips*)		LANG_GO=false ;;
-loongarch64)	LANG_GO=false ;;
 esac

 # Fortran uses libquadmath if toolchain has __float128
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac

@@ -189,11 +186,6 @@ riscv64)
 LANG_ADA=false;;
 esac

-case "$CTARGET_ARCH" in
-loongarch64)
-LANG_ADA=false;;
-esac
-
 _languages=c
 if $LANG_CXX; then
 	_languages="$_languages,c++"
@@ -241,8 +233,7 @@ makedepends="$makedepends_build $makedepends_host"
 #
 # PLEASE submit all patches to gcc to https://gitlab.alpinelinux.org/kaniini/alpine-gcc-patches,
 # so that they can be properly tracked and easily rebased if needed.
-#source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
-source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkgbase:-$pkgver}.tar.xz
+source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
 	0001-posix_memalign.patch
 	0002-gcc-poison-system-directories.patch
 	0003-specs-turn-on-Wl-z-now-by-default.patch
@@ -277,8 +268,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
-	0035-loongarch-disable-multilib-support.patch
-	fix-arm64.patch
+	0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 	"

 # secfixes:
@@ -286,8 +276,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 #     - CVE-2023-4039

 # we build out-of-tree
-#_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
-_gccdir="$srcdir"/gcc-${_pkgbase:-$pkgver}
+_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
 _gcclibdir="/usr/lib/gcc/$CTARGET/${_pkgbase:-$pkgver}"
 _gcclibexec="/usr/libexec/gcc/$CTARGET/${_pkgbase:-$pkgver}"

@@ -339,7 +328,6 @@ build() {
 	i586-*-*-*)		_arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";;
 	s390x-*-*-*)		_arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";;
 	riscv64-*-*-*)		_arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";;
-	loongarch64-*-*-*)      _arch_configure="--with-arch=loongarch64 --with-abi=lp64d --with-tls=trad";;
 	esac

 	case "$CTARGET_ARCH" in
@@ -366,14 +354,7 @@ build() {
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"

 	msg "Building the following:"
 	echo ""
@@ -702,6 +683,10 @@ go() {
 	depends="gcc=$_gccrel libgo=$_gccrel !go"
 	install="$pkgname-go.post-install"

+	# See https://lists.alpinelinux.org/~alpine/devel/%3C33KG0XO61I4IL.2Z7RTAZ5J3SY6%408pit.net%3E
+	provides="go-bootstrap"
+	provider_priority=1 # lowest, see community/go
+
 	mkdir -p "$subpkgdir"/$_gcclibexec \
 		"$subpkgdir"/usr/lib \
 		"$subpkgdir"/usr/bin
@@ -802,9 +787,9 @@ gdb() {
 }

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 17a2993027d3ddf8595952ebcae425695ddc7b1cf73b384d2e55fddecb9cbf3f6482860a502ff69b14075e12badf27300fd3039f3a9005e851fd8d121d258c2b  0004-Turn-on-D_FORTIFY_SOURCE-2-by-default-for-C-C-ObjC-O.patch
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@@ -815,7 +800,7 @@ sha512sums="
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@@ -825,10 +810,10 @@ da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02da
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 f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8b7944fa17487478e73958be45d5782ccb9ef501961fb9a96  0021-ppc64-le-disable-multilib-support.patch
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-abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
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 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+30369bea84020c32d514196ba3adb3d09d2d0359af5550bd3f9719aa357e44b2f695623c1d2a99416e120dc86896c196c5dd4f638183dced4799604137385367  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,6 +822,5 @@ d47b559075f40d526235f47b91da1d0cf6bfe6c5b7311bbfe08af9dd6e8f27e6c7cd82e3b2d529aa
 b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95e21c9ffbf2412193f8b9fc89a4c36fa5a6a041661ac7399d  0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
-65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+cc1e10ac6e72db816f09325e301103109cc212a6f3de3ce0b9b038d149233c467319d203941695dbf3d7b9e2dcbbcd17609cdb056e831fcc323cd592423882d8  0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 "
@@ -1,544 +0,0 @@
-From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Thu, 13 Jun 2024 12:48:21 +0100
-Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
-
-The testcase extracts one arm_neon.h vector from a pair (one subreg)
-and then reinterprets the result as an SVE vector (another subreg).
-Each subreg makes sense individually, but we can't fold them together
-into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
-but the interpretation of 32 bytes -> 16*N bytes depends on
-whether N==1 or N>1.
-
-Since the second subreg makes sense individually, simplify_subreg
-should bail out rather than ICE on it.  simplify_gen_subreg will
-then do the same (because it already checks validate_subreg).
-This leaves simplify_gen_subreg returning null, requiring the
-caller to take appropriate action.
-
-I think this is relatively likely to occur elsewhere, so the patch
-adds a helper for forcing a subreg, allowing a temporary pseudo to
-be created where necessary.
-
-I'll follow up by using force_subreg in more places.  This patch
-is intended to be a minimal backportable fix for the PR.
-
-gcc/
-	PR target/115464
-	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
-	to fold two subregs together if their relationship isn't known
-	at compile time.
-	* explow.h (force_subreg): Declare.
-	* explow.cc (force_subreg): New function.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
-
-(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
---
- gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
- gcc/explow.cc                                     | 15 +++++++++++++++
- gcc/explow.h                                      |  2 ++
- gcc/simplify-rtx.cc                               |  5 +++++
- .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
- 5 files changed, 36 insertions(+), 1 deletion(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 0d2edf3f19e..c9182594bc1 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1174,7 +1174,7 @@ public:
-        Advanced SIMD argument as an SVE vector.  */
-     if (!BYTES_BIG_ENDIAN
- 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
-+      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
- 
-     rtx_vector_builder builder (VNx16BImode, 16, 2);
-     for (unsigned int i = 0; i < 16; i++)
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index 8e5f6b8e680..f6843398c4b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
-   return temp;
- }
- 
-+/* Like simplify_gen_subreg, but force OP into a new register if the
-+   subreg cannot be formed directly.  */
-+
-+rtx
-+force_subreg (machine_mode outermode, rtx op,
-+	      machine_mode innermode, poly_uint64 byte)
-+{
-+  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
-+  if (x)
-+    return x;
-+
-+  op = copy_to_mode_reg (innermode, op);
-+  return simplify_gen_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index 16aa02cfb68..cbd1fcb7eb3 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
-    Args are mode (in case value is a constant) and the value.  */
- extern rtx force_reg (machine_mode, rtx);
- 
-+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
- 
-diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
-index dceaa13333c..729d408aa55 100644
--- a/gcc/simplify-rtx.cc
-+++ b/gcc/simplify-rtx.cc
-@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
-       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
-       rtx newx;
- 
-+      /* Make sure that the relationship between the two subregs is
-+	 known at compile time.  */
-+      if (!ordered_p (outersize, innermostsize))
-+	return NULL_RTX;
-+
-       if (outermode == innermostmode
- 	  && known_eq (byte, 0U)
- 	  && known_eq (SUBREG_BYTE (op), 0))
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-new file mode 100644
-index 00000000000..d728d1325ed
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-@@ -0,0 +1,13 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl)
-+{
-+    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
-+}
-+
-+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
-- 
-2.46.0
-
-
-From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:30 +0100
-Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
-
-This patch makes the aarch64 code use force_subreg instead of
-simplify_gen_subreg in more places.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-(3) The offset wasn't a simple lowpart or highpart calculation;
-    a later patch will deal with those.
-
-gcc/
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
-	Use force_subreg instead of simplify_gen_subreg.
-	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svget_impl::expand): Likewise.
-	(svget_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-functions.h
-	(multireg_permute::expand): Likewise.
-
-(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
---
- gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
- gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
- gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
- gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
- 4 files changed, 10 insertions(+), 12 deletions(-)
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index 75d21de1401..b2e46a073a8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-       rtx temp2 = gen_reg_rtx (DImode);
-       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
- 				   subreg_lowpart_offset (d->mode, quadmode));
-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
-+      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-       else
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
-+      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
- 
-       /* And recalculate the index.  */
-       lane -= nunits / 4;
-diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
-index 33ab0741e87..5b9efe0b165 100644
--- a/gcc/config/aarch64/aarch64-simd.md
-+++ b/gcc/config/aarch64/aarch64-simd.md
-@@ -412,8 +412,8 @@
-   "TARGET_SIMD"
-   {
-      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
-					     <MODE>mode, 0);
-+     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
-+				       <MODE>mode, 0);
-      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
-      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
-      DONE;
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index c9182594bc1..2c95da79572 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1121,9 +1121,8 @@ public:
-   expand (function_expander &e) const override
-   {
-     /* Fold the access into a subreg rvalue.  */
-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
-				GET_MODE (e.args[0]),
-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-+    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
-+			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-   }
- };
- 
-@@ -1157,8 +1156,7 @@ public:
- 	e.add_fixed_operand (indices);
- 	return e.generate_insn (icode);
-       }
-    return simplify_gen_subreg (e.result_mode (), e.args[0],
-				GET_MODE (e.args[0]), 0);
-+    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
-   }
- };
- 
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-index 3b8e575e98e..7d06a57ff83 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-@@ -639,9 +639,9 @@ public:
-       {
- 	machine_mode elt_mode = e.vector_mode (0);
- 	rtx arg = e.args[0];
-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
-					       GET_MODE_SIZE (elt_mode)));
-+	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
-+	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
-+					GET_MODE_SIZE (elt_mode)));
-       }
-     return e.use_exact_insn (icode);
-   }
-- 
-2.46.0
-
-
-From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
-
-This patch makes more use of force_lowpart_subreg, similarly
-to the recent patch for force_subreg.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-gcc/
-	PR target/115464
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
-	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
-	simplify_gen_subreg and lowpart_subreg.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-sme.cc
-	(add_load_store_slice_operand): Likewise.
-	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
-	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
-
-(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
---
- gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
- gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
- gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
- gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
- .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
- 5 files changed, 23 insertions(+), 17 deletions(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index b2e46a073a8..264b9560709 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-   int lane = INTVAL (lane_idx);
- 
-   if (lane < nunits / 4)
-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
-			       subreg_lowpart_offset (d->mode, quadmode));
-+    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
-   else
-     {
-       /* Select the upper 64 bits, either a V2SF or V4HF, this however
-@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
- 	 gen_highpart_mode generates code that isn't optimal.  */
-       rtx temp1 = gen_reg_rtx (d->mode);
-       rtx temp2 = gen_reg_rtx (DImode);
-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
-				   subreg_lowpart_offset (d->mode, quadmode));
-+      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
-       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
- 	case AARCH64_WSR64:
- 	case AARCH64_WSRF64:
- 	case AARCH64_WSR128:
-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
-+	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
- 	  break;
- 	case AARCH64_WSRF:
- 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
-@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
-     case AARCH64_RSR64:
-     case AARCH64_RSRF64:
-     case AARCH64_RSR128:
-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
-+      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
-+				   target, sysreg_mode);
-     case AARCH64_RSRF:
-       subreg = gen_lowpart_SUBREG (SImode, target);
-       return gen_lowpart_SUBREG (SFmode, subreg);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 2c95da79572..3c970e9c5f8 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1183,7 +1183,7 @@ public:
-     if (BYTES_BIG_ENDIAN)
-       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
-     insn_code icode = code_for_vcond_mask (mode, mode);
-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-+    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-     e.add_output_operand (icode);
-     e.add_input_operand (icode, e.args[1]);
-     e.add_input_operand (icode, e.args[0]);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-index f4c91bcbb95..b66b35ae60b 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
-   rtx base = e.args[argno];
-   if (e.mode_suffix_id == MODE_vnum)
-     {
-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-+      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-       base = simplify_gen_binary (PLUS, SImode, base, vnum);
-     }
-   e.add_input_operand (icode, base);
-diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
-index 1beec94629d..a064aeecbc0 100644
--- a/gcc/config/aarch64/aarch64.cc
-+++ b/gcc/config/aarch64/aarch64.cc
-@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
-   /* can_change_mode_class must only return true if subregs and svreinterprets
-      have the same semantics.  */
-   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
-    return lowpart_subreg (mode, x, GET_MODE (x));
-+    return force_lowpart_subreg (mode, x, GET_MODE (x));
- 
-   rtx res = gen_reg_rtx (mode);
-   x = force_reg (GET_MODE (x), x);
-@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			    rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = gen_lowpart (DImode, op1);
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
-   *high_in1 = gen_highpart (DImode, op1);
-   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			     rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
- 
-   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-new file mode 100644
-index 00000000000..f561c34f732
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-@@ -0,0 +1,11 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
-+{
-+    return svset_neonq_u16 (a, permute_tbl.val[1]);
-+}
-- 
-2.46.0
-
-
-From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 4/4] Add force_lowpart_subreg
-
-optabs had a local function called lowpart_subreg_maybe_copy
-that is very similar to the lowpart version of force_subreg.
-This patch adds a force_lowpart_subreg wrapper around
-force_subreg and uses it in optabs.cc.
-
-The only difference between the old and new functions is that
-the old one asserted success while the new one doesn't.
-It's common not to assert elsewhere when taking subregs;
-normally a null result is enough.
-
-Later patches will make more use of the new function.
-
-gcc/
-	* explow.h (force_lowpart_subreg): Declare.
-	* explow.cc (force_lowpart_subreg): New function.
-	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
-	(expand_absneg_bit): Use force_lowpart_subreg instead of
-	lowpart_subreg_maybe_copy.
-	(expand_copysign_bit): Likewise.
-
-(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
---
- gcc/explow.cc | 14 ++++++++++++++
- gcc/explow.h  |  1 +
- gcc/optabs.cc | 24 ++----------------------
- 3 files changed, 17 insertions(+), 22 deletions(-)
-
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index f6843398c4b..5fdfa81f69b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
-   return simplify_gen_subreg (outermode, op, innermode, byte);
- }
- 
-+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
-+   which has mode INNERMODE.  Allow OP to be forced into a new register
-+   if necessary.
-+
-+   Return null on failure.  */
-+
-+rtx
-+force_lowpart_subreg (machine_mode outermode, rtx op,
-+		      machine_mode innermode)
-+{
-+  auto byte = subreg_lowpart_offset (outermode, innermode);
-+  return force_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index cbd1fcb7eb3..dd654649b06 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
- extern rtx force_reg (machine_mode, rtx);
- 
- extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
- 
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
-diff --git a/gcc/optabs.cc b/gcc/optabs.cc
-index ce91f94ed43..804c0dc73ba 100644
--- a/gcc/optabs.cc
-+++ b/gcc/optabs.cc
-@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
-   return 0;
- }
- 
-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
-   conditions, VAL may already be a SUBREG against which we cannot generate
-   a further SUBREG.  In this case, we expect forcing the value into a
-   register will work around the situation.  */
-
-static rtx
-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
-			   machine_mode imode)
-{
-  rtx ret;
-  ret = lowpart_subreg (omode, val, imode);
-  if (ret == NULL)
-    {
-      val = force_reg (imode, val);
-      ret = lowpart_subreg (omode, val, imode);
-      gcc_assert (ret != NULL);
-    }
-  return ret;
-}
-
- /* Expand a floating point absolute value or negation operation via a
-    logical operation on the sign bit.  */
- 
-@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
- 			   gen_lowpart (imode, op0),
- 			   immed_wide_int_const (mask, imode),
- 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
- 
-       set_dst_reg_note (get_last_insn (), REG_EQUAL,
- 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
-@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
- 
-       temp = expand_binop (imode, ior_optab, op0, op1,
- 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
-     }
- 
-   return target;
-- 
-2.46.0
-
@@ -150,13 +150,13 @@ diff --git a/gcc/gcc.cc b/gcc/gcc.cc
 index 16bb07f2cdc..33b56e721d2 100644
 --- a/gcc/gcc.cc
 +++ b/gcc/gcc.cc
-@@ -1177,6 +1187,8 @@ proper position among the other output files.  */
-    "-z now " \
+@@ -1146,6 +1146,8 @@ proper position among the other output files.  */
+    "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
    "%X %{o*} %{e*} %{N} %{n} %{r}\
     %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \
 +    %{Wno-poison-system-directories:--no-poison-system-directories} \
 +    %{Werror=poison-system-directories:--error-poison-system-directories} \
-     %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \
+     %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \
     VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \
     %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\
 diff --git a/gcc/incpath.cc b/gcc/incpath.cc
@@ -9,22 +9,23 @@ Subject: [PATCH 13/35] nopie
 2 files changed, 40 insertions(+)

 diff --git a/gcc/configure b/gcc/configure
-index 23da7d55d..f38732bb2 100755
+index 8c46369f73f..e59cbee1767 100755
 --- a/gcc/configure
 +++ b/gcc/configure
-@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \
- fi
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5
+@@ -32268,6 +32268,33 @@ fi
 $as_echo "$gcc_cv_no_pie" >&6; }
-+# Check if -nopie works.
-+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -nopie option" >&5
 +$as_echo_n "checking for -nopie option... " >&6; }
-+if ${gcc_cv_nopie+:} false; then :
+if test "${gcc_cv_nopie+set}" = set; then :
 +  $as_echo_n "(cached) " >&6
 +else
 +  saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+     LDFLAGS="$LDFLAGS -nopie"
+     cat confdefs.h - <<_ACEOF >conftest.$ac_ext
 +/* end confdefs.h.  */
 +int main(void) {return 0;}
 +_ACEOF
@@ -35,51 +36,40 @@ index 23da7d55d..f38732bb2 100755
 +fi
 +rm -f core conftest.err conftest.$ac_objext \
 +    conftest$ac_exeext conftest.$ac_ext
-+   LDFLAGS="$saved_LDFLAGS"
+     LDFLAGS="$saved_LDFLAGS"
 +fi
 +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_nopie" >&5
 +$as_echo "$gcc_cv_nopie" >&6; }
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ 
+ 
 diff --git a/gcc/configure.ac b/gcc/configure.ac
-index d7cf0b92c..db2e2c802 100644
+index 5504bf6eb01..57268319de1 100644
 --- a/gcc/configure.ac
 +++ b/gcc/configure.ac
-@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option],
-      [gcc_cv_no_pie=yes],
-      [gcc_cv_no_pie=no])
+@@ -7552,6 +7552,19 @@ AC_CACHE_CHECK([for -no-pie option],
    LDFLAGS="$saved_LDFLAGS"])
-+# Check if -nopie works.
-+AC_CACHE_CHECK([for -nopie option],
-+  [gcc_cv_nopie],
-+  [saved_LDFLAGS="$LDFLAGS"
-+   LDFLAGS="$LDFLAGS -nopie"
-+   AC_LINK_IFELSE([AC_LANG_SOURCE([int main(void) {return 0;}])],
-+     [gcc_cv_nopie=yes],
-+     [gcc_cv_nopie=no])
-+   LDFLAGS="$saved_LDFLAGS"])
- 
- if test x$enable_host_shared = xyes; then
-   PICFLAG=-fPIC
-@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then
-   LD_PICFLAG=-pie
- elif test x$gcc_cv_no_pie = xyes; then
-   LD_PICFLAG=-no-pie
-+elif test x$gcc_cv_nopie = xyes; then
-+  LD_PICFLAG=-nopie
- else
-   LD_PICFLAG=
+ if test "$gcc_cv_no_pie" = "yes"; then
+   NO_PIE_FLAG="-no-pie"
+else
+  # Check if -nopie works.
+  AC_CACHE_CHECK([for -nopie option],
+    [gcc_cv_nopie],
+    [saved_LDFLAGS="$LDFLAGS"
+     LDFLAGS="$LDFLAGS -nopie"
+     AC_LINK_IFELSE([int main(void) {return 0;}],
+       [gcc_cv_nopie=yes],
+       [gcc_cv_nopie=no])
+     LDFLAGS="$saved_LDFLAGS"])
+  if test "$gcc_cv_nopie" = "yes"; then
+    NO_PIE_FLAG="-nopie"
+  fi
 fi
+ AC_SUBST([NO_PIE_FLAG])
+ 
 -- 
 2.41.0

@@ -46,10 +46,10 @@ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
 index f8c2c351e5a..8d9881eadeb 100644
 --- a/gcc/config/riscv/linux.h
 +++ b/gcc/config/riscv/linux.h
-@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3.  If not see
- 	%{rdynamic:-export-dynamic} \
- 	-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
-     %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}"
+@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3.  If not see
+     %{static:-static}}"
+ 
+ #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 -
 -#define STARTFILE_PREFIX_SPEC 			\
 -   "/lib" XLEN_SPEC "/" ABI_SPEC "/ "		\
@@ -41,15 +41,6 @@ index 96306f8cc9a..090b6770ae5 100644
   LIBGNAT_TARGET_PAIRS = \
   a-intnam.ads<libgnarl/a-intnam__linux.ads \
   s-inmaop.adb<libgnarl/s-inmaop__posix.adb \
-@@ -2311,7 +2311,7 @@ ifeq ($(strip $(filter-out aarch64% linux%,$(target_cpu) $(target_os))),)
-   s-intman.adb<libgnarl/s-intman__posix.adb \
-   s-linux.ads<libgnarl/s-linux.ads \
-   $(TRASYM_DWARF_UNIX_PAIRS) \
-  s-tsmona.adb<libgnat/s-tsmona__linux.adb \
-+  s-tsmona.adb<libgnat/s-tsmona.adb \
-   s-mudido.adb<libgnarl/s-mudido__affinity.adb \
-   s-osinte.ads<libgnarl/s-osinte__linux.ads \
-   s-osinte.adb<libgnarl/s-osinte__posix.adb \
@@ -2420,7 +2420,7 @@ ifeq ($(strip $(filter-out %ia64 linux%,$(target_cpu) $(target_os))),)
   s-tpopsp.adb<libgnarl/s-tpopsp__tls.adb \
   s-taspri.ads<libgnarl/s-taspri__posix-noaltstack.ads \
@@ -1,32 +0,0 @@
-From c4f484f465a32e796ae384aa3f90e79fa218b4e9 Mon Sep 17 00:00:00 2001
-From: Jingyun Hua <huajingyun@loongson.cn>
-Date: Mon, 7 Aug 2023 15:25:58 +0800
-Subject: [PATCH] loongarch disable multilib support
-
-Signed-off-by: Jingyun Hua <huajingyun@loongson.cn>
---
- gcc/config/loongarch/t-linux    | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/gcc/config/loongarch/t-linux b/gcc/config/loongarch/t-linux
-index 23e1fb979..c2753abb8 100644
--- a/gcc/config/loongarch/t-linux
-+++ b/gcc/config/loongarch/t-linux
-@@ -21,11 +21,6 @@ MULTIOSDIR_lp64f := ../lib64/f32$(call if_multiarch,:loongarch64-linux-gnuf32)
- MULTIOSDIR_lp64s := ../lib64/sf$(call if_multiarch,:loongarch64-linux-gnusf)
- 
- # Don't define MULTILIB_OSDIRNAMES if multilib is disabled.
-ifeq ($(filter LA_DISABLE_MULTILIB,$(tm_defines)),)
-
-    MULTILIB_OSDIRNAMES = .=$(MULTIOSDIR_$(mlib_default))
-    MULTILIB_OSDIRNAMES += mabi.lp64d=$(MULTIOSDIR_lp64d)
-    MULTILIB_OSDIRNAMES += mabi.lp64f=$(MULTIOSDIR_lp64f)
-    MULTILIB_OSDIRNAMES += mabi.lp64s=$(MULTIOSDIR_lp64s)
-
-endif
-+    MULTILIB_OSDIRNAMES =  mabi.lp64d=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64f=../lib
-+    MULTILIB_OSDIRNAMES += mabi.lp64s=../lib
-- 
-2.41.0
-
@@ -0,0 +1,186 @@
+https://gcc.gnu.org/PR110792
+https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=790c1f60a5662b16eb19eb4b81922995863c7571
+https://github.com/randombit/botan/issues/3637
+
+From 85628c5653ff40963158a24c60eeec6a3b5a8e56 Mon Sep 17 00:00:00 2001
+From: Roger Sayle <roger@nextmovesoftware.com>
+Date: Thu, 3 Aug 2023 07:12:04 +0100
+Subject: [PATCH] PR target/110792: Early clobber issues with
+ rot32di2_doubleword on i386.
+
+This patch is a conservative fix for PR target/110792, a wrong-code
+regression affecting doubleword rotations by BITS_PER_WORD, which
+effectively swaps the highpart and lowpart words, when the source to be
+rotated resides in memory. The issue is that if the register used to
+hold the lowpart of the destination is mentioned in the address of
+the memory operand, the current define_insn_and_split unintentionally
+clobbers it before reading the highpart.
+
+Hence, for the testcase, the incorrectly generated code looks like:
+
+        salq    $4, %rdi		// calculate address
+        movq    WHIRL_S+8(%rdi), %rdi	// accidentally clobber addr
+        movq    WHIRL_S(%rdi), %rbp	// load (wrong) lowpart
+
+Traditionally, the textbook way to fix this would be to add an
+explicit early clobber to the instruction's constraints.
+
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+ [(set (match_operand:DI 0 "register_operand" "=r,r,&r")
+        (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+                       (const_int 32)))]
+
+but unfortunately this currently generates significantly worse code,
+due to a strange choice of reloads (effectively memcpy), which ends up
+looking like:
+
+        salq    $4, %rdi		// calculate address
+        movdqa  WHIRL_S(%rdi), %xmm0	// load the double word in SSE reg.
+        movaps  %xmm0, -16(%rsp)	// store the SSE reg back to the stack
+        movq    -8(%rsp), %rdi		// load highpart
+        movq    -16(%rsp), %rbp		// load lowpart
+
+Note that reload's "&" doesn't distinguish between the memory being
+early clobbered, vs the registers used in an addressing mode being
+early clobbered.
+
+The fix proposed in this patch is to remove the third alternative, that
+allowed offsetable memory as an operand, forcing reload to place the
+operand into a register before the rotation.  This results in:
+
+        salq    $4, %rdi
+        movq    WHIRL_S(%rdi), %rax
+        movq    WHIRL_S+8(%rdi), %rdi
+        movq    %rax, %rbp
+
+I believe there's a more advanced solution, by swapping the order of
+the loads (if first destination register is mentioned in the address),
+or inserting a lea insn (if both destination registers are mentioned
+in the address), but this fix is a minimal "safe" solution, that
+should hopefully be suitable for backporting.
+
+2023-08-03  Roger Sayle  <roger@nextmovesoftware.com>
+
+gcc/ChangeLog
+	PR target/110792
+	* config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
+	place operand in a register before gen_<insn>64ti2_doubleword.
+	(<any_rotate>di3): Likewise, for rotations by 32 bits, place
+	operand in a register before gen_<insn>32di2_doubleword.
+	(<any_rotate>32di2_doubleword): Constrain operand to be in register.
+	(<any_rotate>64ti2_doubleword): Likewise.
+
+gcc/testsuite/ChangeLog
+	PR target/110792
+	* g++.target/i386/pr110792.C: New 32-bit C++ test case.
+	* gcc.target/i386/pr110792.c: New 64-bit C test case.
+
+(cherry picked from commit 790c1f60a5662b16eb19eb4b81922995863c7571)
+---
+ gcc/config/i386/i386.md                  | 18 ++++++++++++------
+ gcc/testsuite/g++.target/i386/pr110792.C | 16 ++++++++++++++++
+ gcc/testsuite/gcc.target/i386/pr110792.c | 18 ++++++++++++++++++
+ 3 files changed, 46 insertions(+), 6 deletions(-)
+ create mode 100644 gcc/testsuite/g++.target/i386/pr110792.C
+ create mode 100644 gcc/testsuite/gcc.target/i386/pr110792.c
+
+diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
+index f3a3305..a71e837 100644
+--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
+@@ -14359,7 +14359,10 @@
+     emit_insn (gen_ix86_<insn>ti3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 64)
+-    emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (TImode, operands[1]);
+      emit_insn (gen_<insn>64ti2_doubleword (operands[0], operands[1]));
+    }
+   else
+     {
+       rtx amount = force_reg (QImode, operands[2]);
+@@ -14394,7 +14397,10 @@
+     emit_insn (gen_ix86_<insn>di3_doubleword
+ 		(operands[0], operands[1], operands[2]));
+   else if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 32)
+-    emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    {
+      operands[1] = force_reg (DImode, operands[1]);
+      emit_insn (gen_<insn>32di2_doubleword (operands[0], operands[1]));
+    }
+   else
+     FAIL;
+ 
+@@ -14562,8 +14568,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>32di2_doubleword"
+- [(set (match_operand:DI 0 "register_operand" "=r,r,r")
+-       (any_rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:DI 0 "register_operand" "=r,r")
+       (any_rotate:DI (match_operand:DI 1 "register_operand" "0,r")
+                       (const_int 32)))]
+  "!TARGET_64BIT"
+  "#"
+@@ -14580,8 +14586,8 @@
+ })
+ 
+ (define_insn_and_split "<insn>64ti2_doubleword"
+- [(set (match_operand:TI 0 "register_operand" "=r,r,r")
+-       (any_rotate:TI (match_operand:TI 1 "nonimmediate_operand" "0,r,o")
+ [(set (match_operand:TI 0 "register_operand" "=r,r")
+       (any_rotate:TI (match_operand:TI 1 "register_operand" "0,r")
+                       (const_int 64)))]
+  "TARGET_64BIT"
+  "#"
+diff --git a/gcc/testsuite/g++.target/i386/pr110792.C b/gcc/testsuite/g++.target/i386/pr110792.C
+new file mode 100644
+index 0000000..ce21a7a
+--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr110792.C
+@@ -0,0 +1,16 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-O2" } */
+
+template <int ROT, typename T>
+inline T rotr(T input)
+{
+   return static_cast<T>((input >> ROT) | (input << (8 * sizeof(T) - ROT)));
+}
+
+unsigned long long WHIRL_S[256] = {0x18186018C07830D8};
+unsigned long long whirl(unsigned char x0)
+{
+   const unsigned long long s4 = WHIRL_S[x0&0xFF];
+   return rotr<32>(s4);
+}
+/* { dg-final { scan-assembler-not "movl\tWHIRL_S\\+4\\(,%eax,8\\), %eax" } } */
+diff --git a/gcc/testsuite/gcc.target/i386/pr110792.c b/gcc/testsuite/gcc.target/i386/pr110792.c
+new file mode 100644
+index 0000000..b65125c
+--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr110792.c
+@@ -0,0 +1,18 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2" } */
+
+static inline unsigned __int128 rotr(unsigned __int128 input)
+{
+   return ((input >> 64) | (input << (64)));
+}
+
+unsigned __int128 WHIRL_S[256] = {((__int128)0x18186018C07830D8) << 64 |0x18186018C07830D8};
+unsigned __int128 whirl(unsigned char x0)
+{
+   register int t __asm("rdi") = x0&0xFF;
+   const unsigned __int128 s4 = WHIRL_S[t];
+   register unsigned __int128 tt  __asm("rdi") = rotr(s4);
+   asm("":::"memory");
+   return tt;
+}
+/* { dg-final { scan-assembler-not "movq\tWHIRL_S\\+8\\(%rdi\\), %rdi" } } */
+-- 
+2.41.0
+
@@ -24,7 +24,7 @@ CBUILDROOT="/"
 _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET"

 pkgname=gcc-x86_64
-pkgver=14.2.0
+pkgver=13.2.1_git20231014
 # i.e. 13.2.1, must match gcc/BASE-VER
 _pkgbase="${pkgver%%_git*}"
 # date component from snapshots
@@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}"
 [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""

 pkgname=gcc-x86_64
-pkgrel=2
+pkgrel=0
 pkgdesc="Stage2 cross-compiler for x86_64"
 url="https://gcc.gnu.org"
 arch="aarch64"
@@ -46,7 +46,6 @@ makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-
 subpackages="g++-x86_64:gpp libstdc++-dev-x86_64:libcxx_dev"
 [ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc$_target"
 replaces="libstdc++ binutils"
-options="!strip"

 : "${LANG_CXX:=true}"
 : "${LANG_D:=true}"
@@ -144,7 +143,7 @@ case "$CARCH" in
 # GDC hasn't been ported to PowerPC
 # See libphobos/configure.tgt in GCC sources for supported targets
 # riscv fails with: error: static assert  "unimplemented"
-ppc64le|riscv64|loongarch64)	LANG_D=false ;;
+ppc64le|riscv64)	LANG_D=false ;;
 # GDC does currently not work on 32-bit musl architectures.
 # This is a known upstream issue.
 # See: https://github.com/dlang/druntime/pull/3383
@@ -156,7 +155,6 @@ case "$CTARGET_ARCH" in
 arm*)		_libitm=false ;;
 mips*)		_libitm=false ;;
 riscv64)	_libitm=false ;;
-loongarch64)	_libitm=false ;;
 esac

 # Internal libffi fails to build on MIPS at the moment, need to
@@ -164,14 +162,13 @@ esac
 # the internal libffi.
 case "$CTARGET_ARCH" in
 mips*)		LANG_GO=false ;;
-loongarch64)	LANG_GO=false ;;
 esac

 # Fortran uses libquadmath if toolchain has __float128
 # currently on x86, x86_64 and ia64
 _libquadmath=$LANG_FORTRAN
 case "$CTARGET_ARCH" in
-x86 | x86_64)	_libquadmath=$LANG_FORTRAN ;;
+x86 | x86_64 | ppc64le)	_libquadmath=$LANG_FORTRAN ;;
 *)		_libquadmath=false ;;
 esac

@@ -189,11 +186,6 @@ riscv64)
 LANG_ADA=false;;
 esac

-case "$CTARGET_ARCH" in
-loongarch64)
-LANG_ADA=false;;
-esac
-
 _languages=c
 if $LANG_CXX; then
 	_languages="$_languages,c++"
@@ -241,8 +233,7 @@ makedepends="$makedepends_build $makedepends_host"
 #
 # PLEASE submit all patches to gcc to https://gitlab.alpinelinux.org/kaniini/alpine-gcc-patches,
 # so that they can be properly tracked and easily rebased if needed.
-#source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
-source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkgbase:-$pkgver}.tar.xz
+source="https://dev.alpinelinux.org/archive/gcc/${_pkgbase%%.*}-$_pkgsnap/gcc-${_pkgbase%%.*}-$_pkgsnap.tar.xz
 	0001-posix_memalign.patch
 	0002-gcc-poison-system-directories.patch
 	0003-specs-turn-on-Wl-z-now-by-default.patch
@@ -277,8 +268,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 	0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 	0033-libphobos-do-not-use-LFS64-symbols.patch
 	0034-libgo-fix-lfs64-use.patch
-	0035-loongarch-disable-multilib-support.patch
-	fix-arm64.patch
+	0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 	"

 # secfixes:
@@ -286,8 +276,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-${_pkgbase:-$pkgver}/gcc-${_pkg
 #     - CVE-2023-4039

 # we build out-of-tree
-#_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
-_gccdir="$srcdir"/gcc-${_pkgbase:-$pkgver}
+_gccdir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap
 _gcclibdir="/usr/lib/gcc/$CTARGET/${_pkgbase:-$pkgver}"
 _gcclibexec="/usr/libexec/gcc/$CTARGET/${_pkgbase:-$pkgver}"

@@ -339,7 +328,6 @@ build() {
 	i586-*-*-*)		_arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";;
 	s390x-*-*-*)		_arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";;
 	riscv64-*-*-*)		_arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";;
-	loongarch64-*-*-*)      _arch_configure="--with-arch=loongarch64 --with-abi=lp64d --with-tls=trad";;
 	esac

 	case "$CTARGET_ARCH" in
@@ -366,14 +354,7 @@ build() {
 	$_libgomp	|| _bootstrap_configure="$_bootstrap_configure --disable-libgomp"
 	$_libatomic	|| _bootstrap_configure="$_bootstrap_configure --disable-libatomic"
 	$_libitm	|| _bootstrap_configure="$_bootstrap_configure --disable-libitm"
-	if ! $_libquadmath; then
-		_arch_configure="$_arch_configure --disable-libquadmath"
-		# ppc64le needs both --disable-libquadmath{,-support}
-		# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116007
-		[ "$CARCH" = "ppc64le" ] &&
-			_arch_configure="$_arch_configure
-				--disable-libquadmath-support"
-	fi
+	$_libquadmath	|| _arch_configure="$_arch_configure --disable-libquadmath"

 	msg "Building the following:"
 	echo ""
@@ -702,6 +683,10 @@ go() {
 	depends="gcc=$_gccrel libgo=$_gccrel !go"
 	install="$pkgname-go.post-install"

+	# See https://lists.alpinelinux.org/~alpine/devel/%3C33KG0XO61I4IL.2Z7RTAZ5J3SY6%408pit.net%3E
+	provides="go-bootstrap"
+	provider_priority=1 # lowest, see community/go
+
 	mkdir -p "$subpkgdir"/$_gcclibexec \
 		"$subpkgdir"/usr/lib \
 		"$subpkgdir"/usr/bin
@@ -802,9 +787,9 @@ gdb() {
 }

 sha512sums="
-932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396  gcc-14.2.0.tar.xz
+406673a62deba759fc0532a801b3f57cabf894ea328587b23e62a707ba5767b0e3ae9b3f86bf3c6fcf13e8a3c30bc470e6598b625c8231efb629034211c162c2  gcc-13-20231014.tar.xz
 1ecffba1b07d60e1b4422302b032bbea918b674c8e12b30aa6965b544d700ce86b61e9f7b8d402c6caf59257f491a394dd0912f0948565d6eae9335ee54f3b35  0001-posix_memalign.patch
-1d102a7b17683909dde4d8591dd889149299e77a2b2003cdc0635dc816666be940e41ae534b469485391a9bed183cd5cd337f130e4e1ecb62cb9ad86c4a081db  0002-gcc-poison-system-directories.patch
+163f282455b6a4df33f011bcd8b0440566ba0ffaeeab30d8ac52d39948980a56881ca0eff60687129d59556389a58b9d64e7768750bd70b1fe0fedbc9fc30dc2  0002-gcc-poison-system-directories.patch
 3f24bb6a50d3c45b71ea05590e32fe3e69b91377ab185352891d5035c76ed193117c6d0b314a4c364bcf136b9a9dd5c926d6c7c30ab436976c121ebfea8d3ddd  0003-specs-turn-on-Wl-z-now-by-default.patch
 17a2993027d3ddf8595952ebcae425695ddc7b1cf73b384d2e55fddecb9cbf3f6482860a502ff69b14075e12badf27300fd3039f3a9005e851fd8d121d258c2b  0004-Turn-on-D_FORTIFY_SOURCE-2-by-default-for-C-C-ObjC-O.patch
 444550e55491ff89fe8cbbb4b73d017c9c147cdce1ad5c0561fe7d6ab3834515a814c7676c408cfeec18e1aaace27b3c26a2ffe4a75042285df5124976c38672  0005-On-linux-targets-pass-as-needed-by-default-to-the-li.patch
@@ -815,7 +800,7 @@ sha512sums="
 da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02daf8e34f60c08b61f5d3959305886dca9bbcdc84db057258d9  0010-Don-t-declare-asprintf-if-defined-as-a-macro.patch
 35b9aafe7eee8138cb7aad7164a8f77c15ccdce26843cee78b5871ef91d76cad22ed0871b20f51c4b89b71afd9cfe4ba4227086e158c466558513708fe7d2a1a  0011-libiberty-copy-PIC-objects-during-build-process.patch
 9d43f844fad0ac6e1c35a2b6f461f9278ae09e468f2c9ae8adc43accbe6934994aa10d3a433644d1393a4a76e3caed69e3191db7f3c0c24b4e7a0a0a0cbac3f1  0012-libgcc_s.patch
-91dde3079c1400c124ab5604597f5857185d075809649603aa3641a4581b34029bfcbd4281a5bd925d1c5e6e3b1f5f3322efda34345c6930652d685a6c9525f4  0013-nopie.patch
+b2c4921c5eef33ee43a92ab5ec7f09d5d3adb49a2416595001e6376ffdf652ef9d0dc21778c3a86e45334290dbe467a4e891ed34a6522e0c72f746def22e8663  0013-nopie.patch
 0b50ad15115192699efa9fda3d4fb1c2fa95da06d7880ba34615b40c19a8256e1fe364da39f5c70dc22fbccf21db2de5900932afef68948722eeb25e435262f8  0014-ada-fix-shared-linking.patch
 00097c7106625ccf02149a757366f434c48f2abe824bb8b4bf067d29308889cb6039a5e5b2d3bd2683617693b47707d549252c56eea6bc3cdc2450a8d14f46a7  0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch
 7f0bc42b93a389b614054e700b851abfbc53db391aa10cbdf6990d41396b293af78980bb39f1cf0967184d3fbf3d46ac7c7f096717b8f193ea34cbf7f37d7e91  0016-add-fortify-headers-paths.patch
@@ -825,10 +810,10 @@ da9eaf2f0ddbec5ee14dc26053936587e6c76fbf16846db804a18cf4d318579426ebcc566aed02da
 a9567947471c3ba8a547a79c55e183974554bf823d9a97a165c966d7b3caad8789980e096e3b78452ece5de062bd9bb006af464bbf0c5a35b689eac3ee21e5c5  0020-s390x-disable-multilib-support.patch
 f382eb5f7c2c60c5a23fac587c9629a3059d7be0898e97a1feaf9b9cbe1ef4693cc1177eb29333e8b7944fa17487478e73958be45d5782ccb9ef501961fb9a96  0021-ppc64-le-disable-multilib-support.patch
 44ab86feb8e41e7c2b2e27accdf46194c9b80ee6a39543303dc04824f669d9fad182aabd40c9c7f6c265cf9bb71be830c257be115dc9d701d54eca3aa9ef174e  0022-x86_64-disable-multilib-support.patch
-abf845792433a21fed5dd06167b9f6cf5e8f8026a409acce93824e466c5148e192bf5f404a271931fe4b65283499329bf67bb01019f2f3e02501f20619404e6c  0023-riscv-disable-multilib-support.patch
+e0763083c31485e8ac0b3724376a28af01bb6f50e1a054780b61886e4e3de2a35d127e6e353eb8d8729964ada9b5751bf05bdd51df539667008216db38f228a3  0023-riscv-disable-multilib-support.patch
 ab88a2f63e3545bbc36537aa9a86f2c6c35e41bbf702d6e13743a405cdac4f901eed5737189b780da96647fea9f5d863fdc76373f25a00064106dcb5514d6d87  0024-always-build-libgcc_eh.a.patch
 8fdbe0c8bf4ca60f458a33e59027de03d15ac91933fe46d8ca62119346d20b9bc2447c0bf22bceb63d0cf8613ab61512d9197f4e6c2224af473b63ef9f254295  0025-ada-libgnarl-compatibility-for-musl.patch
-5fd23a506b55c88d4f000e01c539eb25d6da2516949c9d7a1c9ee20f4c6b627e4788541284d9c14c33bafa7cb43ce2e0469dd91006152f00e30815107150320f  0026-ada-musl-support-fixes.patch
+30369bea84020c32d514196ba3adb3d09d2d0359af5550bd3f9719aa357e44b2f695623c1d2a99416e120dc86896c196c5dd4f638183dced4799604137385367  0026-ada-musl-support-fixes.patch
 3f9a406d7d2ce34951215ffbcadb49a45e55ad5c24ab9097c0e5e92383e43b876872ccd2a7e7def2833ab204975ee5733f8bcf90934db9fa9c4f6f56c62081f6  0027-configure-Add-enable-autolink-libatomic-use-in-LINK_.patch
 720a4001f9a1fa4122e456077ecff8d3eb8af7c83d0a81f9da6a6cca05b23664206a82a349e34482c48bfe40e99aa5f21567613d0913f6a24f282bc84a994496  0028-configure-fix-detection-of-atomic-builtins-in-libato.patch
 2044c23b23726965c0a6fd39f616cc464badd650947cb40495eeabd906a3af629878c1d28b403b8eb46b30a1a0ba39083023290d62f0c99ccf070063226e3f8f  0029-libstdc-do-not-throw-exceptions-for-non-C-locales-on.patch
@@ -837,6 +822,5 @@ d47b559075f40d526235f47b91da1d0cf6bfe6c5b7311bbfe08af9dd6e8f27e6c7cd82e3b2d529aa
 b325035cb7122d79c6b42ca6d3fc9e02319ed2f7cddb0639dff25d2798d2ce63812cd623462cdf95e21c9ffbf2412193f8b9fc89a4c36fa5a6a041661ac7399d  0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch
 c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75  0033-libphobos-do-not-use-LFS64-symbols.patch
 c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c  0034-libgo-fix-lfs64-use.patch
-65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3  0035-loongarch-disable-multilib-support.patch
-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f  fix-arm64.patch
+cc1e10ac6e72db816f09325e301103109cc212a6f3de3ce0b9b038d149233c467319d203941695dbf3d7b9e2dcbbcd17609cdb056e831fcc323cd592423882d8  0036-PR110792-Early-clobber-issues-with-rot32di2-on-i386.patch
 "
@@ -1,544 +0,0 @@
-From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Thu, 13 Jun 2024 12:48:21 +0100
-Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464]
-
-The testcase extracts one arm_neon.h vector from a pair (one subreg)
-and then reinterprets the result as an SVE vector (another subreg).
-Each subreg makes sense individually, but we can't fold them together
-into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
-but the interpretation of 32 bytes -> 16*N bytes depends on
-whether N==1 or N>1.
-
-Since the second subreg makes sense individually, simplify_subreg
-should bail out rather than ICE on it.  simplify_gen_subreg will
-then do the same (because it already checks validate_subreg).
-This leaves simplify_gen_subreg returning null, requiring the
-caller to take appropriate action.
-
-I think this is relatively likely to occur elsewhere, so the patch
-adds a helper for forcing a subreg, allowing a temporary pseudo to
-be created where necessary.
-
-I'll follow up by using force_subreg in more places.  This patch
-is intended to be a minimal backportable fix for the PR.
-
-gcc/
-	PR target/115464
-	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
-	to fold two subregs together if their relationship isn't known
-	at compile time.
-	* explow.h (force_subreg): Declare.
-	* explow.cc (force_subreg): New function.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
-
-(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0)
---
- gcc/config/aarch64/aarch64-sve-builtins-base.cc   |  2 +-
- gcc/explow.cc                                     | 15 +++++++++++++++
- gcc/explow.h                                      |  2 ++
- gcc/simplify-rtx.cc                               |  5 +++++
- .../aarch64/sve/acle/general/pr115464.c           | 13 +++++++++++++
- 5 files changed, 36 insertions(+), 1 deletion(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 0d2edf3f19e..c9182594bc1 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1174,7 +1174,7 @@ public:
-        Advanced SIMD argument as an SVE vector.  */
-     if (!BYTES_BIG_ENDIAN
- 	&& is_undef (CALL_EXPR_ARG (e.call_expr, 0)))
-      return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
-+      return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0);
- 
-     rtx_vector_builder builder (VNx16BImode, 16, 2);
-     for (unsigned int i = 0; i < 16; i++)
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index 8e5f6b8e680..f6843398c4b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x)
-   return temp;
- }
- 
-+/* Like simplify_gen_subreg, but force OP into a new register if the
-+   subreg cannot be formed directly.  */
-+
-+rtx
-+force_subreg (machine_mode outermode, rtx op,
-+	      machine_mode innermode, poly_uint64 byte)
-+{
-+  rtx x = simplify_gen_subreg (outermode, op, innermode, byte);
-+  if (x)
-+    return x;
-+
-+  op = copy_to_mode_reg (innermode, op);
-+  return simplify_gen_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index 16aa02cfb68..cbd1fcb7eb3 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
-    Args are mode (in case value is a constant) and the value.  */
- extern rtx force_reg (machine_mode, rtx);
- 
-+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
- 
-diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
-index dceaa13333c..729d408aa55 100644
--- a/gcc/simplify-rtx.cc
-+++ b/gcc/simplify-rtx.cc
-@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op,
-       poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode);
-       rtx newx;
- 
-+      /* Make sure that the relationship between the two subregs is
-+	 known at compile time.  */
-+      if (!ordered_p (outersize, innermostsize))
-+	return NULL_RTX;
-+
-       if (outermode == innermostmode
- 	  && known_eq (byte, 0U)
- 	  && known_eq (SUBREG_BYTE (op), 0))
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-new file mode 100644
-index 00000000000..d728d1325ed
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c
-@@ -0,0 +1,13 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl)
-+{
-+    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
-+}
-+
-+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
-- 
-2.46.0
-
-
-From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:30 +0100
-Subject: [PATCH 2/4] aarch64: Use force_subreg in more places
-
-This patch makes the aarch64 code use force_subreg instead of
-simplify_gen_subreg in more places.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-(3) The offset wasn't a simple lowpart or highpart calculation;
-    a later patch will deal with those.
-
-gcc/
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
-	Use force_subreg instead of simplify_gen_subreg.
-	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svget_impl::expand): Likewise.
-	(svget_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-functions.h
-	(multireg_permute::expand): Likewise.
-
-(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4)
---
- gcc/config/aarch64/aarch64-builtins.cc              | 4 ++--
- gcc/config/aarch64/aarch64-simd.md                  | 4 ++--
- gcc/config/aarch64/aarch64-sve-builtins-base.cc     | 8 +++-----
- gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++---
- 4 files changed, 10 insertions(+), 12 deletions(-)
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index 75d21de1401..b2e46a073a8 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-       rtx temp2 = gen_reg_rtx (DImode);
-       temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
- 				   subreg_lowpart_offset (d->mode, quadmode));
-      temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0);
-+      temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-       else
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx));
-      op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0);
-+      op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0);
- 
-       /* And recalculate the index.  */
-       lane -= nunits / 4;
-diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
-index 33ab0741e87..5b9efe0b165 100644
--- a/gcc/config/aarch64/aarch64-simd.md
-+++ b/gcc/config/aarch64/aarch64-simd.md
-@@ -412,8 +412,8 @@
-   "TARGET_SIMD"
-   {
-      emit_insn (gen_bswap<mode>2 (operands[0], operands[1]));
-     rtx op0_castsi2qi = simplify_gen_subreg(<VS:VSI2QI>mode, operands[0],
-					     <MODE>mode, 0);
-+     rtx op0_castsi2qi = force_subreg (<VS:VSI2QI>mode, operands[0],
-+				       <MODE>mode, 0);
-      emit_insn (gen_aarch64_rbit<VS:vsi2qi> (op0_castsi2qi, op0_castsi2qi));
-      emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
-      DONE;
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index c9182594bc1..2c95da79572 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1121,9 +1121,8 @@ public:
-   expand (function_expander &e) const override
-   {
-     /* Fold the access into a subreg rvalue.  */
-    return simplify_gen_subreg (e.vector_mode (0), e.args[0],
-				GET_MODE (e.args[0]),
-				INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-+    return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]),
-+			 INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR);
-   }
- };
- 
-@@ -1157,8 +1156,7 @@ public:
- 	e.add_fixed_operand (indices);
- 	return e.generate_insn (icode);
-       }
-    return simplify_gen_subreg (e.result_mode (), e.args[0],
-				GET_MODE (e.args[0]), 0);
-+    return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0);
-   }
- };
- 
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-index 3b8e575e98e..7d06a57ff83 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h
-@@ -639,9 +639,9 @@ public:
-       {
- 	machine_mode elt_mode = e.vector_mode (0);
- 	rtx arg = e.args[0];
-	e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0);
-	e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg),
-					       GET_MODE_SIZE (elt_mode)));
-+	e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0);
-+	e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg),
-+					GET_MODE_SIZE (elt_mode)));
-       }
-     return e.use_exact_insn (icode);
-   }
-- 
-2.46.0
-
-
-From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg
-
-This patch makes more use of force_lowpart_subreg, similarly
-to the recent patch for force_subreg.  The criteria were:
-
-(1) The code is obviously specific to expand (where new pseudos
-    can be created).
-
-(2) The value is obviously an rvalue rather than an lvalue.
-
-gcc/
-	PR target/115464
-	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
-	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
-	simplify_gen_subreg and lowpart_subreg.
-	* config/aarch64/aarch64-sve-builtins-base.cc
-	(svset_neonq_impl::expand): Likewise.
-	* config/aarch64/aarch64-sve-builtins-sme.cc
-	(add_load_store_slice_operand): Likewise.
-	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
-	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
-
-gcc/testsuite/
-	PR target/115464
-	* gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.
-
-(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def)
---
- gcc/config/aarch64/aarch64-builtins.cc             | 11 +++++------
- gcc/config/aarch64/aarch64-sve-builtins-base.cc    |  2 +-
- gcc/config/aarch64/aarch64-sve-builtins-sme.cc     |  2 +-
- gcc/config/aarch64/aarch64.cc                      | 14 +++++---------
- .../aarch64/sve/acle/general/pr115464_2.c          | 11 +++++++++++
- 5 files changed, 23 insertions(+), 17 deletions(-)
- create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-
-diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
-index b2e46a073a8..264b9560709 100644
--- a/gcc/config/aarch64/aarch64-builtins.cc
-+++ b/gcc/config/aarch64/aarch64-builtins.cc
-@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
-   int lane = INTVAL (lane_idx);
- 
-   if (lane < nunits / 4)
-    op2 = simplify_gen_subreg (d->mode, op2, quadmode,
-			       subreg_lowpart_offset (d->mode, quadmode));
-+    op2 = force_lowpart_subreg (d->mode, op2, quadmode);
-   else
-     {
-       /* Select the upper 64 bits, either a V2SF or V4HF, this however
-@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode)
- 	 gen_highpart_mode generates code that isn't optimal.  */
-       rtx temp1 = gen_reg_rtx (d->mode);
-       rtx temp2 = gen_reg_rtx (DImode);
-      temp1 = simplify_gen_subreg (d->mode, op2, quadmode,
-				   subreg_lowpart_offset (d->mode, quadmode));
-+      temp1 = force_lowpart_subreg (d->mode, op2, quadmode);
-       temp1 = force_subreg (V2DImode, temp1, d->mode, 0);
-       if (BYTES_BIG_ENDIAN)
- 	emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx));
-@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
- 	case AARCH64_WSR64:
- 	case AARCH64_WSRF64:
- 	case AARCH64_WSR128:
-	  subreg = lowpart_subreg (sysreg_mode, input_val, mode);
-+	  subreg = force_lowpart_subreg (sysreg_mode, input_val, mode);
- 	  break;
- 	case AARCH64_WSRF:
- 	  subreg = gen_lowpart_SUBREG (SImode, input_val);
-@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode)
-     case AARCH64_RSR64:
-     case AARCH64_RSRF64:
-     case AARCH64_RSR128:
-      return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode);
-+      return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)),
-+				   target, sysreg_mode);
-     case AARCH64_RSRF:
-       subreg = gen_lowpart_SUBREG (SImode, target);
-       return gen_lowpart_SUBREG (SFmode, subreg);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-index 2c95da79572..3c970e9c5f8 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
-@@ -1183,7 +1183,7 @@ public:
-     if (BYTES_BIG_ENDIAN)
-       return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode));
-     insn_code icode = code_for_vcond_mask (mode, mode);
-    e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-+    e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1]));
-     e.add_output_operand (icode);
-     e.add_input_operand (icode, e.args[1]);
-     e.add_input_operand (icode, e.args[0]);
-diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-index f4c91bcbb95..b66b35ae60b 100644
--- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc
-@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode,
-   rtx base = e.args[argno];
-   if (e.mode_suffix_id == MODE_vnum)
-     {
-      rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-+      rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode);
-       base = simplify_gen_binary (PLUS, SImode, base, vnum);
-     }
-   e.add_input_operand (icode, base);
-diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
-index 1beec94629d..a064aeecbc0 100644
--- a/gcc/config/aarch64/aarch64.cc
-+++ b/gcc/config/aarch64/aarch64.cc
-@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x)
-   /* can_change_mode_class must only return true if subregs and svreinterprets
-      have the same semantics.  */
-   if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS))
-    return lowpart_subreg (mode, x, GET_MODE (x));
-+    return force_lowpart_subreg (mode, x, GET_MODE (x));
- 
-   rtx res = gen_reg_rtx (mode);
-   x = force_reg (GET_MODE (x), x);
-@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			    rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = gen_lowpart (DImode, op1);
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
-   *high_in1 = gen_highpart (DImode, op1);
-   *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
- 			     rtx *high_in2)
- {
-   *low_dest = gen_reg_rtx (DImode);
-  *low_in1 = simplify_gen_subreg (DImode, op1, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-
-  *low_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				  subreg_lowpart_offset (DImode, TImode));
-+  *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
-+  *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
-   *high_dest = gen_reg_rtx (DImode);
- 
-   *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
-diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-new file mode 100644
-index 00000000000..f561c34f732
--- /dev/null
-+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c
-@@ -0,0 +1,11 @@
-+/* { dg-options "-O2" } */
-+
-+#include <arm_neon.h>
-+#include <arm_sve.h>
-+#include <arm_neon_sve_bridge.h>
-+
-+svuint16_t
-+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
-+{
-+    return svset_neonq_u16 (a, permute_tbl.val[1]);
-+}
-- 
-2.46.0
-
-
-From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001
-From: Richard Sandiford <richard.sandiford@arm.com>
-Date: Tue, 18 Jun 2024 12:22:31 +0100
-Subject: [PATCH 4/4] Add force_lowpart_subreg
-
-optabs had a local function called lowpart_subreg_maybe_copy
-that is very similar to the lowpart version of force_subreg.
-This patch adds a force_lowpart_subreg wrapper around
-force_subreg and uses it in optabs.cc.
-
-The only difference between the old and new functions is that
-the old one asserted success while the new one doesn't.
-It's common not to assert elsewhere when taking subregs;
-normally a null result is enough.
-
-Later patches will make more use of the new function.
-
-gcc/
-	* explow.h (force_lowpart_subreg): Declare.
-	* explow.cc (force_lowpart_subreg): New function.
-	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
-	(expand_absneg_bit): Use force_lowpart_subreg instead of
-	lowpart_subreg_maybe_copy.
-	(expand_copysign_bit): Likewise.
-
-(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c)
---
- gcc/explow.cc | 14 ++++++++++++++
- gcc/explow.h  |  1 +
- gcc/optabs.cc | 24 ++----------------------
- 3 files changed, 17 insertions(+), 22 deletions(-)
-
-diff --git a/gcc/explow.cc b/gcc/explow.cc
-index f6843398c4b..5fdfa81f69b 100644
--- a/gcc/explow.cc
-+++ b/gcc/explow.cc
-@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op,
-   return simplify_gen_subreg (outermode, op, innermode, byte);
- }
- 
-+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP,
-+   which has mode INNERMODE.  Allow OP to be forced into a new register
-+   if necessary.
-+
-+   Return null on failure.  */
-+
-+rtx
-+force_lowpart_subreg (machine_mode outermode, rtx op,
-+		      machine_mode innermode)
-+{
-+  auto byte = subreg_lowpart_offset (outermode, innermode);
-+  return force_subreg (outermode, op, innermode, byte);
-+}
-+
- /* If X is a memory ref, copy its contents to a new temp reg and return
-    that reg.  Otherwise, return X.  */
- 
-diff --git a/gcc/explow.h b/gcc/explow.h
-index cbd1fcb7eb3..dd654649b06 100644
--- a/gcc/explow.h
-+++ b/gcc/explow.h
-@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode);
- extern rtx force_reg (machine_mode, rtx);
- 
- extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64);
-+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode);
- 
- /* Return given rtx, copied into a new temp reg if it was in memory.  */
- extern rtx force_not_mem (rtx);
-diff --git a/gcc/optabs.cc b/gcc/optabs.cc
-index ce91f94ed43..804c0dc73ba 100644
--- a/gcc/optabs.cc
-+++ b/gcc/optabs.cc
-@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target)
-   return 0;
- }
- 
-/* Extract the OMODE lowpart from VAL, which has IMODE.  Under certain
-   conditions, VAL may already be a SUBREG against which we cannot generate
-   a further SUBREG.  In this case, we expect forcing the value into a
-   register will work around the situation.  */
-
-static rtx
-lowpart_subreg_maybe_copy (machine_mode omode, rtx val,
-			   machine_mode imode)
-{
-  rtx ret;
-  ret = lowpart_subreg (omode, val, imode);
-  if (ret == NULL)
-    {
-      val = force_reg (imode, val);
-      ret = lowpart_subreg (omode, val, imode);
-      gcc_assert (ret != NULL);
-    }
-  return ret;
-}
-
- /* Expand a floating point absolute value or negation operation via a
-    logical operation on the sign bit.  */
- 
-@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode,
- 			   gen_lowpart (imode, op0),
- 			   immed_wide_int_const (mask, imode),
- 		           gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
- 
-       set_dst_reg_note (get_last_insn (), REG_EQUAL,
- 			gen_rtx_fmt_e (code, mode, copy_rtx (op0)),
-@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target,
- 
-       temp = expand_binop (imode, ior_optab, op0, op1,
- 			   gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN);
-      target = lowpart_subreg_maybe_copy (mode, temp, imode);
-+      target = force_lowpart_subreg (mode, temp, imode);
-     }
- 
-   return target;
-- 
-2.46.0
-
@@ -3,7 +3,7 @@

 pkgname=grub-efi-x86
 pkgver=2.12
-pkgrel=6
+pkgrel=0

 _arch="x86"
 _mirror="http://dl-4.alpinelinux.org/alpine/"
@@ -22,5 +22,5 @@ package() {
 }

 sha512sums="
-bad54187b4fbb9f78f2d619ff9a652a4927c557070c2c39334fd9900ae5aeb956144055602ca56295d7966c2d10090ef142a073dd67eb14f7b41ba0d54c78d4d  grub-efi-2.12-r6-x86-edge.apk
+2958746c0c05271d3bb27912973ddf9180bbf060f9909037f0b9dcf3da2036dd81b69a37e1c43414def0e26942f83bccab04554ae6ddd6b3b9dc94d5e3744ac4  grub-efi-2.12-r0-x86-edge.apk
 "
@@ -7,8 +7,8 @@ if [ -z "$(type -t arch_to_hostspec)" ]; then
 fi

 pkgname=musl-aarch64
-pkgver=1.2.5
-pkgrel=2
+pkgver=1.2.4_git20230717
+pkgrel=5
 arch="x86_64"
 subpackages="musl-dev-aarch64:package_dev"

@@ -57,6 +57,6 @@ package_dev() {
 }

 sha512sums="
-a3c660153e2cd1859a83e692c4d1c9f92bb442948ec4ed63412ac1d75502fa40a5a383bb548c8ac98d83fdd27f067304e876be1e15f41eaa09f1414cf5d4e189  musl-1.2.5-r2-aarch64-edge.apk
-6e921c1a761125e768e78e072585b226180c1447f04a4d5fc50564787b30f9c1520b3bfe90d835cfba1716fc4672d3df95a0883187adb50627eed9a3c4249a04  musl-dev-1.2.5-r2-aarch64-edge.apk
+478704707b55072b9be8747e8c3bf3a20832d0329f63429fae2048e6b9a0674e31e92b4c1b8af87f65f84270711fef6b7ce54653448e580e532fa2c94e3761e1  musl-1.2.4_git20230717-r5-aarch64-edge.apk
+24471c9d781ce9920d06ab79296afb30ce61563729bb319ee8cd8feb960d1c05e5f96edb9464fcdb95b6c16fde788400408dd2e768e69ce13cc15ad3be54a969  musl-dev-1.2.4_git20230717-r5-aarch64-edge.apk
 "
@@ -7,8 +7,8 @@ if [ -z "$(type -t arch_to_hostspec)" ]; then
 fi

 pkgname=musl-armhf
-pkgver=1.2.5
-pkgrel=2
+pkgver=1.2.4_git20230717
+pkgrel=5
 arch="x86_64"
 subpackages="musl-dev-armhf:package_dev"

@@ -57,6 +57,6 @@ package_dev() {
 }

 sha512sums="
-20f07f25e5267acac97f7f7bf98763869c9a193bf44d1ef2b79f46f2e854aeabe2baa74d0311057541fb99179addbd43c08c56d1361ed349ae22973141f639c5  musl-1.2.5-r2-armhf-edge.apk
-4afb4520885704849bec649f5488add0a3a7b25005172d69f03337cf5b0a82d9f564cba11bbfa84a43a9386e027a8516fcc4573210b4e1fe340cc295a7f52499  musl-dev-1.2.5-r2-armhf-edge.apk
+c0bdfbfc2c1f475c17850e7462cf286e9d8ce874deb03d536d208fcdeb45b35c761737f693be3be9711c15547cd9d2bbafae45280fc9b0291192c2489da0790f  musl-1.2.4_git20230717-r5-armhf-edge.apk
+1197968b53adca7c482d23ea2ca99d21fe905b554b83c30b960a4e64dda6ff40009745cd18621bd363b4994ccbc8b9b763b6c3105f6f6283dc8ee1305ab7206e  musl-dev-1.2.4_git20230717-r5-armhf-edge.apk
 "
@@ -7,8 +7,8 @@ if [ -z "$(type -t arch_to_hostspec)" ]; then
 fi

 pkgname=musl-armv7
-pkgver=1.2.5
-pkgrel=2
+pkgver=1.2.4_git20230717
+pkgrel=5
 arch="x86_64"
 subpackages="musl-dev-armv7:package_dev"

@@ -57,6 +57,6 @@ package_dev() {
 }

 sha512sums="
-0a542c678cfc7ed0cc4246985bd1ecce63247ca4db0ea9fde7c1ee2b30f683b46d7c4011b21931d19fc7c3faeb787413d243580417ec90f745b77534277a6f68  musl-1.2.5-r2-armv7-edge.apk
-26516f5ffc1f04223cce8bae2122a2eab17ec59ce1ef0c1d2382394d9dd0e014ac77336639592f24d15f0ec5120ea7b8329febab1bbbaf3dfecb777b944d6337  musl-dev-1.2.5-r2-armv7-edge.apk
+5236dadbdb41e9543426592cf7e64e548fec59742e4943a99bb18e3cb93c9ae1287c9ac34c2de7fcb58bd1f94df4313324e8afa1160acc4929fb91f06754c77c  musl-1.2.4_git20230717-r5-armv7-edge.apk
+1877267544198d867752d02cb8cbe6672c4bd1fcd20ac8e5e4c614675b31921f3da9bc2a68f769fbd726ffc0c7125406387e01a9ebf49d0e56d49e1ce257e71d  musl-dev-1.2.4_git20230717-r5-armv7-edge.apk
 "
@@ -7,8 +7,8 @@ if [ -z "$(type -t arch_to_hostspec)" ]; then
 fi

 pkgname=musl-riscv64
-pkgver=1.2.5
-pkgrel=2
+pkgver=1.2.4_git20230717
+pkgrel=5
 arch="x86_64"
 subpackages="musl-dev-riscv64:package_dev"

@@ -57,6 +57,6 @@ package_dev() {
 }

 sha512sums="
-ebc1f6759f73c492c00429fd735bd1f3f67bb5a1530156f0c0a821f693b415ba7b8807c22134ce8bd4043f18b12356151c4bfaff59946d059cd0523ebc8aad57  musl-1.2.5-r2-riscv64-edge.apk
-d5209392baedcee71455faa51f6a2e60a90b2bc51c1f5f2c9fb03ff6692b246225d8db7dd5f9165d76bd9d2463e797c9b3c805e04887a4b4b90ec55e96ced627  musl-dev-1.2.5-r2-riscv64-edge.apk
+3f924270fb0ec0fa8fb5a23f0f9d6d9148affcac89cae413940dc04465d375415fcf0aff734754e2ac0b9ba2113c10f836b186908d75cdccec4d923eacafb961  musl-1.2.4_git20230717-r5-riscv64-edge.apk
+76ae321a9d3895f8367968226a6a492b268ae582a83e74d4152cf88dd48aaa79814532e8e1a057cba7c29b926f48d2309f2c12a16b991649cb8f713455aa5501  musl-dev-1.2.4_git20230717-r5-riscv64-edge.apk
 "
@@ -7,8 +7,8 @@ if [ -z "$(type -t arch_to_hostspec)" ]; then
 fi

 pkgname=musl-x86
-pkgver=1.2.5
-pkgrel=2
+pkgver=1.2.4_git20230717
+pkgrel=5
 arch="x86_64"
 subpackages="musl-dev-x86:package_dev"

@@ -57,6 +57,6 @@ package_dev() {
 }

 sha512sums="
-bde9b17b3f8b696dd863509713113b720bdff8d125e98eed5165f5fa0934d3a8adc317ffb319e3c045b99389ebb0ac08896c0bedd6d0e7461c9f2d98ffee62f9  musl-1.2.5-r2-x86-edge.apk
-cfd0b502e1237024736b6215ac944299664f4b44802533f5cf6b5239a15c22bdc7782004e1485e15d8184ca0cc9afbf704c12cc39d4fe93611f65c8915d595a7  musl-dev-1.2.5-r2-x86-edge.apk
+c93eec26b3bd7b2bc5c8859d71a9dfcfc3c0d346183d97b8600d57270585ce57ac9f84dd633b8d8ae4eae0324aa6f8e98c67a0bdd33e2e8994d721e208e07a3c  musl-1.2.4_git20230717-r5-x86-edge.apk
+77723100d0b2ae558816e4b9eb86c07d9ed64c69a84d6a07904d0806646e800a0f81b3a158948d5681394b9e3304a10bd0ca26445f5d4630f921bb87328d3afe  musl-dev-1.2.4_git20230717-r5-x86-edge.apk
 "
@@ -7,8 +7,8 @@ if [ -z "$(type -t arch_to_hostspec)" ]; then
 fi

 pkgname=musl-x86_64
-pkgver=1.2.5
-pkgrel=2
+pkgver=1.2.4_git20230717
+pkgrel=5
 arch="aarch64"
 subpackages="musl-dev-x86_64:package_dev"

@@ -57,6 +57,6 @@ package_dev() {
 }

 sha512sums="
-2554e2ac0b3f02904197de5317db836e5dbd2631d2ab6e59c3453eeff9b1647b9110005cfe7922470512e7d8b561c94769bf348f7f959754fdb1ca05b403d99b  musl-1.2.5-r2-x86_64-edge.apk
-9a29dcb8cd82da7eb929269c75d2c6637a0ce457526c4960164bcff424f6a0cf581b5a4b2f0020624360d1e5c71b10042dbe59db21df4cd6ffa14b0845c71802  musl-dev-1.2.5-r2-x86_64-edge.apk
+4ea90456fcff08cb7c9065f4c790c5d0a3b2b17224f2490f6954c2de7ddb64559a6e1f0df1f13629da5d8f619fc1d9737a6982bb438120641bf1d717004e2688  musl-1.2.4_git20230717-r5-x86_64-edge.apk
+0ce4a260cb8c6fc9d412d5164d848ee6155d4ea4fca9dff89d5b08b8e2c0fcde5e635846ca762be54a6df139aa178902fc2594ffe76f94ae1e5414a67f0707a3  musl-dev-1.2.4_git20230717-r5-x86_64-edge.apk
 "
@@ -1,25 +0,0 @@
-It seems that newer versions of GNU Make do not allow to use variables before
-defining it.
-
-diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
-index 844bc9da..911c6ba1 100644
--- a/scripts/kconfig/Makefile
-+++ b/scripts/kconfig/Makefile
-@@ -192,6 +192,8 @@ clean-files	+= zconf.tab.c zconf.lex.c zconf.hash.c gconf.glade.h
- clean-files     += mconf qconf gconf nconf
- clean-files     += config.pot linux.pot
- 
-+HOSTLOADLIBES_mconf   = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC))
-+
- # Check that we have the required ncurses stuff installed for lxdialog (menuconfig)
- PHONY += $(obj)/dochecklxdialog
- $(addprefix $(obj)/,$(lxdialog)): $(obj)/dochecklxdialog
-@@ -217,8 +219,6 @@ HOSTLOADLIBES_gconf	= `pkg-config --libs gtk+-2.0 gmodule-2.0 libglade-2.0`
- HOSTCFLAGS_gconf.o	= `pkg-config --cflags gtk+-2.0 gmodule-2.0 libglade-2.0` \
-                           -Wno-missing-prototypes
- 
-HOSTLOADLIBES_mconf   = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC))
-
- HOSTLOADLIBES_nconf	= $(shell \
- 				pkg-config --libs menu panel ncurses 2>/dev/null \
- 				|| echo "-lmenu -lpanel -lncurses"  )
@@ -1,15 +0,0 @@
-Fix pre-ANSI C code in check-lxdialog.sh.
-
-diff --git a/scripts/kconfig/lxdialog/check-lxdialog.sh b/scripts/kconfig/lxdialog/check-lxdialog.sh
-index 9d2a4c58..364eaecb 100644
--- a/scripts/kconfig/lxdialog/check-lxdialog.sh
-+++ b/scripts/kconfig/lxdialog/check-lxdialog.sh
-@@ -43,7 +43,7 @@ trap "rm -f $tmp" 0 1 2 3 15
- check() {
-         $cc -x c - -o $tmp 2>/dev/null <<'EOF'
- #include CURSES_LOC
-main() {}
-+int main() { return 0; }
- EOF
- 	if [ $? != 0 ]; then
- 	    echo " *** Unable to find the ncurses libraries or the"       1>&2
@@ -1,70 +0,0 @@
-From 3810f128e9ecf04cf07d243cd377fcb6046cfd73 Mon Sep 17 00:00:00 2001
-From: Newbyte <newbyte@postmarketos.org>
-Date: Tue, 30 Apr 2024 17:57:20 +0200
-Subject: [PATCH] ARM: 8933/1: replace Sun/Solaris style flag on section
-
-Taken from
-linux3.4-ARM-8933-1-replace-Sun-Solaris-style-flag-on-section.patch
-and adapted for the Exynos 4412 vendor sources.
---
- arch/arm/boot/bootp/init.S            | 2 +-
- arch/arm/boot/compressed/big-endian.S | 2 +-
- arch/arm/boot/compressed/head.S       | 2 +-
- arch/arm/mm/proc-v7.S                 | 2 +-
- 4 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S
-index 78b50807516..868eeeaaa46 100644
--- a/arch/arm/boot/bootp/init.S
-+++ b/arch/arm/boot/bootp/init.S
-@@ -16,7 +16,7 @@
-  *  size immediately following the kernel, we could build this into
-  *  a binary blob, and concatenate the zImage using the cat command.
-  */
-		.section .start,#alloc,#execinstr
-+		.section .start, "ax"
- 		.type	_start, #function
- 		.globl	_start
- 
-diff --git a/arch/arm/boot/compressed/big-endian.S b/arch/arm/boot/compressed/big-endian.S
-index 25ab26f1c6f..f22428e275f 100644
--- a/arch/arm/boot/compressed/big-endian.S
-+++ b/arch/arm/boot/compressed/big-endian.S
-@@ -5,7 +5,7 @@
-  *  Author: Nicolas Pitre
-  */
- 
-	.section ".start", #alloc, #execinstr
-+	.section ".start", "ax"
- 
- 	mrc	p15, 0, r0, c1, c0, 0	@ read control reg
- 	orr	r0, r0, #(1 << 7)	@ enable big endian mode
-diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
-index 63cfa2e9236..3cd67aa3855 100644
--- a/arch/arm/boot/compressed/head.S
-+++ b/arch/arm/boot/compressed/head.S
-@@ -112,7 +112,7 @@
- #endif
- 		.endm
- 
-		.section ".start", #alloc, #execinstr
-+		.section ".start", "ax"
- /*
-  * sort out different calling conventions
-  */
-diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
-index e1687990af9..a479702f198 100644
--- a/arch/arm/mm/proc-v7.S
-+++ b/arch/arm/mm/proc-v7.S
-@@ -519,7 +519,7 @@ __v7_setup_stack:
- 	string	cpu_elf_name, "v7"
- 	.align
- 
-	.section ".proc.info.init", #alloc, #execinstr
-+	.section ".proc.info.init", "ax"
- 
- 	/*
- 	 * Standard v7 proc info content
-- 
-2.44.0
-
@@ -1,22 +0,0 @@
-From c6b821b1281f7ce2b54aad3b0b2acd0e29039c8f Mon Sep 17 00:00:00 2001
-From: Stefan Hansson <newbyte@postmarketos.org>
-Date: Mon, 6 May 2024 10:59:58 +0200
-Subject: [PATCH] Fix lzma piggy
-
---
- arch/arm/boot/compressed/piggy.lzma.S | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/compressed/piggy.lzma.S b/arch/arm/boot/compressed/piggy.lzma.S
-index d7e69cffbc0..cfea81ae8f4 100644
--- a/arch/arm/boot/compressed/piggy.lzma.S
-+++ b/arch/arm/boot/compressed/piggy.lzma.S
-@@ -1,4 +1,4 @@
-	.section .piggydata,#alloc
-+	.section .piggydata, "a"
- 	.globl	input_data
- input_data:
- 	.incbin	"arch/arm/boot/compressed/piggy.lzma"
-- 
-2.45.0
-
@@ -1,22 +0,0 @@
-From 6083916292864215fe4af6c0829186d5cc520f7f Mon Sep 17 00:00:00 2001
-From: Stefan Hansson <newbyte@postmarketos.org>
-Date: Mon, 6 May 2024 19:08:35 +0200
-Subject: [PATCH] Fix lzo piggy
-
---
- arch/arm/boot/compressed/piggy.lzo.S | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/compressed/piggy.lzo.S b/arch/arm/boot/compressed/piggy.lzo.S
-index a425ad95..236976d8 100644
--- a/arch/arm/boot/compressed/piggy.lzo.S
-+++ b/arch/arm/boot/compressed/piggy.lzo.S
-@@ -1,4 +1,4 @@
-	.section .piggydata,#alloc
-+	.section .piggydata, "a"
- 	.globl	input_data
- input_data:
- 	.incbin	"arch/arm/boot/compressed/piggy.lzo"
-- 
-2.45.0
-
@@ -1,10 +0,0 @@
-diff --git a/arch/arm/boot/compressed/piggy.gzip.S b/arch/arm/boot/compressed/piggy.gzip.S
-index a68adf91a16..175ed02a6ac 100644
--- a/arch/arm/boot/compressed/piggy.gzip.S
-+++ b/arch/arm/boot/compressed/piggy.gzip.S
-@@ -1,4 +1,4 @@
-	.section .piggydata,#alloc
-+	.section .piggydata, "a"
- 	.globl	input_data
- input_data:
- 	.incbin	"arch/arm/boot/compressed/piggy.gzip"
@@ -1,12 +0,0 @@
-diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
-index d2f2cedf..7e2cbc74 100644
--- a/arch/arm64/mm/proc.S
-+++ b/arch/arm64/mm/proc.S
-@@ -171,7 +171,6 @@ ENTRY(cpu_do_switch_mm)
- 	ret
- ENDPROC(cpu_do_switch_mm)
- 
-	.section ".text.init", #alloc, #execinstr
- 
- /*
-  *	__cpu_setup
@@ -1,46 +0,0 @@
-# Archived: Downstream port, maybe useful for EPDC performance improvement
-# needs special userspace to show up anything
-# Reference: <https://postmarketos.org/devicepkg>
-pkgname=device-kobo-clara-downstream
-pkgdesc="Kobo Clara HD downstream"
-pkgver=0.1
-pkgrel=0
-url="https://postmarketos.org"
-license="MIT"
-arch="armv7"
-options="!check !archcheck"
-depends="
-	postmarketos-base
-	u-boot-kobo-clara-downstream
-	u-boot-tools
-	linux-kobo-clara-downstream
-"
-makedepends="devicepkg-dev"
-subpackages="$pkgname-nonfree-firmware:nonfree_firmware"
-
-source="
-	deviceinfo
-	uboot-script-downstream.cmd
-"
-
-build() {
-	devicepkg_build $startdir $pkgname
-}
-
-package() {
-	devicepkg_package $startdir $pkgname
-	mkimage -A arm -O linux -T script -n postmarketOS \
-		-d "$srcdir"/uboot-script-downstream.cmd "$srcdir/boot-downstream.scr"
-	install -Dm644 "$srcdir/boot-downstream.scr" "$pkgdir/boot/boot.scr"
-}
-
-nonfree_firmware() {
-	pkgdesc="Kobo Clara HD firmware"
-	depends="firmware-kobo-clara-downstream"
-	mkdir "$subpkgdir"
-}
-
-sha512sums="
-84b9e5385b7fd77af6891b31d7e95ec424645f741d54168d3d38f6f703071d622829d9f7cf5a29136bf6eb9ec5b2a50a05efe76ddc3e047bb4a69e197fbfde24  deviceinfo
-4bfc2714a2670efc451860bd97d36ba12559e00aed41afdde1ac3e01b41458390358ac7f6bc96a6dee6be6a34f534da52d845b02df0566b25f4868774ef69b1d  uboot-script-downstream.cmd
-"
@@ -1,28 +0,0 @@
-# Reference: <https://postmarketos.org/deviceinfo>
-# Please use double quotes only. You can source this file in shell
-# scripts.
-
-deviceinfo_format_version="0"
-deviceinfo_name="Kobo Clara HD"
-deviceinfo_manufacturer="Kobo"
-deviceinfo_codename="kobo-clara-downstream"
-deviceinfo_year="2018"
-deviceinfo_arch="armv7"
-deviceinfo_dtb="imx6sll-e60k02"
-
-# Device related
-deviceinfo_chassis="tablet"
-deviceinfo_keyboard="false"
-deviceinfo_external_storage="true"
-deviceinfo_screen_width="1072"
-deviceinfo_screen_height="1448"
-
-# Bootloader related
-deviceinfo_flash_method="none"
-deviceinfo_boot_part_start="49152"
-deviceinfo_getty="ttymxc0;115200"
-deviceinfo_generate_legacy_uboot_initfs="true"
-deviceinfo_no_framebuffer="true"
-
-deviceinfo_sd_embed_firmware_step_size="512"
-deviceinfo_sd_embed_firmware="u-boot/kobo-clara/u-boot.imx:2,firmware/kobo-clara/hwcfg+header.bin:1023,firmware/kobo-clara/ntxfw-E60K00+header.bin:1029,u-boot/kobo-clara/u-boot-env.bin:1536"
@@ -1,59 +0,0 @@
-# Archived: Downstream port, only for testing. Use mainline port (samsung-on7xelte)!
-# Reference: <https://postmarketos.org/devicepkg>
-pkgname=device-samsung-on7xelte-downstream
-pkgdesc="Samsung Galaxy J7 Prime"
-pkgver=1
-pkgrel=0
-url="https://postmarketos.org"
-license="MIT"
-arch="aarch64"
-options="!check !archcheck"
-depends="
-	linux-samsung-on7xelte
-	mkbootimg
-	msm-fb-refresher
-	postmarketos-base
-	samsungipcd
-"
-subpackages="$pkgname-nonfree-firmware:nonfree_firmware $pkgname-lightdm"
-makedepends="devicepkg-dev"
-install="$pkgname.post-install"
-source="
-	deviceinfo
-	lightdm.conf
-	mount-efs.rc-init
-	samsungipcd.rc-conf
-"
-
-build() {
-	devicepkg_build $startdir $pkgname
-}
-
-package() {
-	devicepkg_package $startdir $pkgname
-
-	# Mounting EFS Partition
-	install -Dm755 mount-efs.rc-init "$pkgdir"/etc/init.d/mount-efs
-
-	# Modem Configuration - samsungipcd
-	install -Dm644 samsungipcd.rc-conf "$pkgdir"/etc/conf.d/samsungipcd
-}
-
-nonfree_firmware() {
-	pkgdesc="Proprietary Firmware blobs"
-	depends="firmware-samsung-on7xelte"
-	mkdir "$subpkgdir"
-}
-
-lightdm() {
-	install_if="$pkgname=$pkgver-r$pkgrel lightdm"
-	install -Dm644 lightdm.conf \
-		"$subpkgdir"/etc/lightdm/lightdm.conf.d/00-on7xelte.conf
-}
-
-sha512sums="
-d342e7d79922d2e4a313e6c0ad20172e841886aa9517522460699da0dc66cd83cfeab986e468b0427ebcd64d54ffbc39cf3ba56c5d839b560e34cbe6e36526f1  deviceinfo
-baee319b6d2f49a15680b0f322ec3e398a071d73fbf7713d14f26a1d027f8950457a482ac3f019605af3dfcf25bbb33ebaa0ffde181f7f96d911d56251c81eef  lightdm.conf
-efbe3d6217854c0131e61f9f3722100d349cb0673f4923bc3d56dae30a6346b0c33e676a39fc4c080150f6ea9457bf268abf870eea916a7d5daae1a22642a2b8  mount-efs.rc-init
-3e5bb764529010d2b6b1f2759a7799f665d140aebcee2dd63433e68cd4282e09b5d3b34fb7c21e737595b406501e7f02ece4592651c60e4c2b9419de4aedb438  samsungipcd.rc-conf
-"
@@ -1,33 +0,0 @@
-# Reference: <https://postmarketos.org/deviceinfo>
-# Please use double quotes only. You can source this file in shell
-# scripts.
-
-deviceinfo_format_version="0"
-deviceinfo_name="Samsung Galaxy J7 Prime"
-deviceinfo_manufacturer="Samsung"
-deviceinfo_codename="samsung-on7xelte-downstream"
-deviceinfo_year="2016"
-deviceinfo_arch="aarch64"
-
-# Device related
-deviceinfo_chassis="handset"
-deviceinfo_keyboard="false"
-deviceinfo_external_storage="true"
-deviceinfo_screen_width="1080"
-deviceinfo_screen_height="1920"
-
-# Bootloader related
-deviceinfo_flash_method="heimdall-bootimg"
-deviceinfo_kernel_cmdline="androidboot.selinux=permissive androidboot.selinux=permissive"
-deviceinfo_generate_bootimg="true"
-deviceinfo_bootimg_qcdt="true"
-deviceinfo_bootimg_mtk_mkimage="false"
-deviceinfo_bootimg_dtb_second="false"
-deviceinfo_flash_pagesize="2048"
-deviceinfo_flash_offset_base="0x10000000"
-deviceinfo_flash_offset_kernel="0x00008000"
-deviceinfo_flash_offset_ramdisk="0x01000000"
-deviceinfo_flash_offset_second="0x00f00000"
-deviceinfo_flash_offset_tags="0x00000100"
-deviceinfo_flash_heimdall_partition_kernel="BOOT"
-deviceinfo_flash_heimdall_partition_rootfs="SYSTEM"
@@ -1,43 +0,0 @@
-# Archived: Only used by archived downstream kernel
-# Reference: <https://postmarketos.org/devicepkg>
-pkgname=firmware-samsung-on7xelte-downstream
-pkgver=1
-pkgrel=0
-pkgdesc="Samsung Galaxy J7 Prime Firmware"
-url="https://github.com/DevOtag-Open-Source/android_vendor_samsung_on7xelte"
-arch="aarch64"
-license="proprietary"
-options="!check !archcheck !tracedeps pmb:cross-native"
-
-_commit="51b221e521ff93e51c40366f0245d6815248f817"
-_repo="https://raw.githubusercontent.com/DevOtag-Open-Source/android_vendor_samsung_on7xelte/eleven/proprietary/"
-_prefix=$pkgname-$_commit
-
-_files_etc="bcmdhd_sta.bin nvram_net.txt"
-_files_vendor="mfc_fw.bin fimc_is_lib.bin bcm43438A1_V0068.0286.hcd setfile_4h5yc.bin setfile_imx258.bin"
-
-for _file in $_files_etc; do
-	source="$source $_prefix-$_file::$_repo/etc/wifi/$_file"
-done
-
-for _file in $_files_vendor; do
-	source="$source $_prefix-$_file::$_repo/vendor/firmware/$_file"
-done
-
-package() {
-	local file
-	for file in $_files_etc $_files_vendor; do
-		install -Dm644 "$srcdir/$_prefix-$file" \
-		"$pkgdir/lib/firmware/postmarketos/$file"
-	done
-
-}
-sha512sums="
-fa250eecbbea53e0a5dbe8317e9a40ee189d4f016122fedff93d299cd799b8f95761643ce4042709a83705189348cf5d5b5bcf74acbeb7d84dc30ec3a62ee6c5  firmware-samsung-on7xelte-downstream-51b221e521ff93e51c40366f0245d6815248f817-bcmdhd_sta.bin
-183fa0fc0bb87602154d23b6fcaf699f0556919b4a9625ff83df4ba2514beb79a1abcb4fb7d2d18e2d57bc726caea579715c377225c7efffb03a65fa5aa2ab56  firmware-samsung-on7xelte-downstream-51b221e521ff93e51c40366f0245d6815248f817-nvram_net.txt
-ef58a1c6bfebd7ef43cc16de834a8446cc373a3e304dac279c6d7f061bda80f96a9f5b9e2b6d21de7eb53f4abfddeb597306bbf2eed579b1441a247e29bf888e  firmware-samsung-on7xelte-downstream-51b221e521ff93e51c40366f0245d6815248f817-mfc_fw.bin
-2eacf2bac885578d1619978b33a9cf14357dda024705c7a88449b460aec08d94e499d5c5ff7f96862591dbf667729a3b0f772a3f00c0c06ebe07f9d227d89086  firmware-samsung-on7xelte-downstream-51b221e521ff93e51c40366f0245d6815248f817-fimc_is_lib.bin
-a86e5021f8c3e8fd4f568a412ae9052e70ada65cbf8cf46b7d6c27ec8ef6e925d0eeff843214451959e783b04a06803ed5bb39e064fbbaae7421e41dbb93d19e  firmware-samsung-on7xelte-downstream-51b221e521ff93e51c40366f0245d6815248f817-bcm43438A1_V0068.0286.hcd
-4da1d0b5cfd608a5d22d1b8b35c4b7bc6915a2da3a999d9d4c1a38404686c9aefb9508e90b4c84c7d88b6a715ff71b8de04c8959f7cc830c82cb45485ad152fc  firmware-samsung-on7xelte-downstream-51b221e521ff93e51c40366f0245d6815248f817-setfile_4h5yc.bin
-29d8601d4f77fe49a38ec974d7ad432f1815e55a7f9d011fcdaa45580653c395a7f89debdea7588f693a111043f9dee286948ed1e4fbb1b1b4807ec6799ba34f  firmware-samsung-on7xelte-downstream-51b221e521ff93e51c40366f0245d6815248f817-setfile_imx258.bin
-"
@@ -1 +0,0 @@
-../../.shared-patches/linux/linux3.4-ARM-8933-1-replace-Sun-Solaris-style-flag-on-section.patch
				`@@ -1 +0,0 @@`
				`../../.shared-patches/linux/linux3.4-ARM-8933-1-replace-Sun-Solaris-style-flag-on-section.patch`