u-boot-veyron: new aport

This packages u-boot.rom files for 4 boards supported in U-Boot (mickey, jerry, minnie, speedy). This file is about to be flashed to SPI flash and replace stock bootloader. I tested it only on speedy, so I promote this only on speedy wiki page. I've tried to package it so that if a new board is added to U-Boot, we only have to add another value to $_boards variable. Link: https://wiki.postmarketos.org/wiki/ASUS_Chromebook_C201_(google-veyron-speedy)#U-Boot
u-boot-veyron-speedy: drop
2023-07-09 17:44:54 +03:00 · 2023-07-09 17:37:21 +03:00 · 2023-07-09 17:37:21 +03:00
18 changed files with 485 additions and 595 deletions
@@ -1,72 +0,0 @@
-diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
-index 2a308eeaeb..556cc95b82 100644
--- a/configs/chromebit_mickey_defconfig
-+++ b/configs/chromebit_mickey_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -98,3 +98,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
-diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
-index dada557952..be06e64909 100644
--- a/configs/chromebook_jerry_defconfig
-+++ b/configs/chromebook_jerry_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -106,3 +106,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
-diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
-index 985ca94770..8884d2d3da 100644
--- a/configs/chromebook_minnie_defconfig
-+++ b/configs/chromebook_minnie_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -105,3 +105,4 @@ CONFIG_CONSOLE_SCROLL_LINES=10
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
-diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
-index e3d4c30739..b81eeca775 100644
--- a/configs/chromebook_speedy_defconfig
-+++ b/configs/chromebook_speedy_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -102,3 +102,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
@@ -1,103 +0,0 @@
-diff --git a/disk/part_efi.c b/disk/part_efi.c
-index 60b1c1d761..3003e096ea 100644
--- a/disk/part_efi.c
-+++ b/disk/part_efi.c
-@@ -95,10 +95,10 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
- 
- 	/* Check the GPT header signature */
- 	if (le64_to_cpu(gpt_h->signature) != GPT_HEADER_SIGNATURE_UBOOT) {
-		printf("%s signature is wrong: 0x%llX != 0x%llX\n",
-+/*		printf("%s signature is wrong: 0x%llX != 0x%llX\n",
- 		       "GUID Partition Table Header",
- 		       le64_to_cpu(gpt_h->signature),
-		       GPT_HEADER_SIGNATURE_UBOOT);
-+		       GPT_HEADER_SIGNATURE_UBOOT); */
- 		return -1;
- 	}
- 
-@@ -682,8 +682,8 @@ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head,
- 	if (is_gpt_valid(dev_desc,
- 			 GPT_PRIMARY_PARTITION_TABLE_LBA,
- 			 gpt_head, gpt_pte) != 1) {
-		printf("%s: *** ERROR: Invalid GPT ***\n",
-		       __func__);
-+/*		printf("%s: *** ERROR: Invalid GPT ***\n",
-+		       __func__); */
- 		return -1;
- 	}
- 
-@@ -968,7 +968,7 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
- 	/* Read and allocate Partition Table Entries */
- 	*pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head);
- 	if (*pgpt_pte == NULL) {
-		printf("GPT: Failed to allocate memory for PTE\n");
-+		/* printf("GPT: Failed to allocate memory for PTE\n"); */
- 		return 0;
- 	}
- 
-@@ -1008,9 +1008,9 @@ static int find_valid_gpt(struct blk_desc *dev_desc, gpt_header *gpt_head,
- 			       __func__);
- 			return 0;
- 		}
-		if (r != 2)
-+/*		if (r != 2)
- 			printf("%s: ***        Using Backup GPT ***\n",
-			       __func__);
-+			       __func__); */
- 	}
- 	return 1;
- }
-diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
-index c52cc400e1..e64ff6c4cf 100644
--- a/fs/ext4/ext4_common.c
-+++ b/fs/ext4/ext4_common.c
-@@ -2415,7 +2415,7 @@ int ext4fs_mount(unsigned part_length)
- 
- 	return 1;
- fail:
-	printf("Failed to mount ext2 filesystem...\n");
-+/*	printf("Failed to mount ext2 filesystem...\n"); */
- fail_noerr:
- 	free(data);
- 	ext4fs_root = NULL;
-diff --git a/fs/fs.c b/fs/fs.c
-index 7a4020607a..a7bb481915 100644
--- a/fs/fs.c
-+++ b/fs/fs.c
-@@ -36,7 +36,7 @@ static int fs_type = FS_TYPE_ANY;
- static inline int fs_probe_unsupported(struct blk_desc *fs_dev_desc,
- 				      struct disk_partition *fs_partition)
- {
-	log_err("** Unrecognized filesystem type **\n");
-+/*	log_err("** Unrecognized filesystem type **\n"); */
- 	return -1;
- }
- 
-diff --git a/fs/fs_internal.c b/fs/fs_internal.c
-index bfc35c996c..35d75518d3 100644
--- a/fs/fs_internal.c
-+++ b/fs/fs_internal.c
-@@ -29,8 +29,8 @@ int fs_devread(struct blk_desc *blk, struct disk_partition *partition,
- 	/* Check partition boundaries */
- 	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
- 	    >= partition->size) {
-		log_err("%s read outside partition " LBAFU "\n", __func__,
-			sector);
-+/*		log_err("%s read outside partition " LBAFU "\n", __func__,
-+			sector); */
- 		return 0;
- 	}
- 
-diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
-index 7bd1ccec45..62663f45f8 100644
--- a/lib/efi_loader/efi_disk.c
-+++ b/lib/efi_loader/efi_disk.c
-@@ -531,7 +531,7 @@ efi_status_t efi_disk_register(void)
- 		const char *if_typename = blk_get_if_type_name(desc->if_type);
- 
- 		/* Add block device for the full device */
-		log_info("Scanning disk %s...\n", dev->name);
-+/*		log_info("Scanning disk %s...\n", dev->name); */
- 		ret = efi_disk_add_dev(NULL, NULL, if_typename,
- 					desc, desc->devnum, 0, 0, &disk);
- 		if (ret == EFI_NOT_READY) {
@@ -1,21 +0,0 @@
-From 92c21e5140288bec38eff1f5bcca63f7555b8d85 Mon Sep 17 00:00:00 2001
-From: Anton Bambura <jenneron@protonmail.com>
-Date: Tue, 24 May 2022 05:30:19 +0300
-Subject: [PATCH] add efi support
---
- configs/chromebook_minnie_defconfig | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
-index 8884d2d3da..1301e3e4ff 100644
--- a/configs/chromebook_minnie_defconfig
-+++ b/configs/chromebook_minnie_defconfig
-@@ -105,4 +105,5 @@ CONFIG_CONSOLE_SCROLL_LINES=10
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set
-+CONFIG_CMD_BOOTEFI=y
-+CONFIG_EFI_LOADER=y
--
-2.25.1
@@ -1,60 +0,0 @@
-# Maintainer: Nicholas Frillman <nicholas.frillman@gmail.com>
-# Co-Maintainer: Jenneron <jenneron@protonmail.com>
-pkgname=u-boot-veyron-minnie
-pkgver=2021.01
-pkgrel=0
-pkgdesc="U-Boot for ASUS Chromebook Flip C100"
-url="https://www.denx.de/wiki/U-Boot/"
-arch="armv7"
-license="GPL-2.0-or-later OFL-1.1 BSD-2-Clause BSD-3-Clause eCos-2.0 IBM-pibs
-	ISC LGPL-2.0-only LGPL-2.1-only X11"
-options="!check" # no tests in upstream
-makedepends="$depends_dev bc dtc python3-dev swig bison flex openssl-dev
-	py3-setuptools linux-headers u-boot-tools vboot-utils"
-source="
-	https://ftp.denx.de/pub/u-boot/u-boot-${pkgver//_/-}.tar.bz2
-	0001-chainloading-v2021.01.patch
-	0002-supress-efi-errors-v2021.01.patch
-	0003-add-efi-support.patch
-	chromebook_minnie.its
-"
-
-builddir="$srcdir"/u-boot-${pkgver//_/-}
-
-prepare() {
-	default_prepare
-}
-
-build() {
-	make chromebook_minnie_defconfig
-	make
-
-	cp "$srcdir"/chromebook_minnie.its ./
-	mkimage -f chromebook_minnie.its u-boot-dtb.img
-
-	echo -e "\n" > dummy_config
-	echo -e "\n" > dummy_bootloader
-
-	vbutil_kernel \
-		--pack u-boot-dtb.img.kpart \
-		--keyblock /usr/share/vboot/devkeys/kernel.keyblock \
-		--signprivate /usr/share/vboot/devkeys/kernel_data_key.vbprivk \
-		--version 1 \
-		--arch arm \
-		--config dummy_config \
-		--bootloader dummy_bootloader \
-		--vmlinuz u-boot-dtb.img
-}
-
-package() {
-	install -D -m644 "$builddir"/u-boot-dtb.img.kpart \
-		"$pkgdir"/usr/share/u-boot/google-veyron-minnie/u-boot-dtb.img.kpart
-}
-
-sha512sums="
-40dd4d9ef87a1829158658c433d46a047a39c0d8c314ad8d133f7240343ee3a75b060f009dd2efe598cfb8a766773f6cd773ea7f7745ee88e52a771c77eb1c6e  u-boot-2021.01.tar.bz2
-53e12dece9eb7ab4d5317ac2570714954c3158f1717abe729deca454244a97f885ae9cc571bab4f80a5b65d6dde7752242ac856138eede347fde719ff21a6097  0001-chainloading-v2021.01.patch
-b3fd3e1fea09f947b2f0b35dc5a4abd2bf8215907942a88c36685973d08112b74e5cc2e5fc3666a8d27a9f37873dfaedf2136f52c2756c9c97cbb8ad0472478c  0002-supress-efi-errors-v2021.01.patch
-bc80db7cad45d2f5bca5e9f19df4e5c66dc5dd5492a7beba78e95476d1e6b806da434f0e175d527d19e7a9b46b9bcba32a4126b1a6e8de32c87c588ac571fede  0003-add-efi-support.patch
-2944e710882522748816e2027eee9a9bfd16385ffa6ab051c385ad7ff04b663863e69273972c5988ad64ca7b3b71ee46937818490b1dbad6eb75928c1db7440a  chromebook_minnie.its
-"
@@ -1,42 +0,0 @@
-/dts-v1/;
-
-/ {
-	description = "U-Boot mainline";
-	#address-cells = <1>;
-
-	images {
-		kernel@1 {
-			description = "U-Boot mainline";
-			type = "kernel_noload";
-			arch = "arm";
-			os = "linux";
-			data = /incbin/("./u-boot.bin");
-			compression = "none";
-			load = <0>;
-			entry = <0>;
-			hash@2 {
-				algo = "sha1";
-			};
-		};
-
-		fdt@1{
-			description = "U-Boot dummy dtb";
-			data = /incbin/("./u-boot.dtb");
-			type = "flat_dt";
-			arch = "arm";
-			compression = "none";
-			hash@1{
-				algo = "sha1";
-			};
-		};
-	};
-
-	configurations {
-		default = "config@1";
-		config@1 {
-			description = "Boot U-Boot";
-			kernel = "kernel@1";
-			fdt = "fdt@1";
-		};
-	};
-};
@@ -1,72 +0,0 @@
-diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
-index 2a308eeaeb..556cc95b82 100644
--- a/configs/chromebit_mickey_defconfig
-+++ b/configs/chromebit_mickey_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -98,3 +98,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
-diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
-index dada557952..be06e64909 100644
--- a/configs/chromebook_jerry_defconfig
-+++ b/configs/chromebook_jerry_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -106,3 +106,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
-diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
-index 985ca94770..8884d2d3da 100644
--- a/configs/chromebook_minnie_defconfig
-+++ b/configs/chromebook_minnie_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -105,3 +105,4 @@ CONFIG_CONSOLE_SCROLL_LINES=10
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
-diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
-index e3d4c30739..b81eeca775 100644
--- a/configs/chromebook_speedy_defconfig
-+++ b/configs/chromebook_speedy_defconfig
-@@ -1,7 +1,7 @@
- CONFIG_ARM=y
- # CONFIG_SPL_USE_ARCH_MEMCPY is not set
- CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x00100000
-+CONFIG_SYS_TEXT_BASE=0x02000100
- CONFIG_NR_DRAM_BANKS=1
- CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
- CONFIG_SPL_TEXT_BASE=0xff704000
-@@ -102,3 +102,4 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-+# CONFIG_EFI_LOADER is not set
@@ -1,103 +0,0 @@
-diff --git a/disk/part_efi.c b/disk/part_efi.c
-index 60b1c1d761..3003e096ea 100644
--- a/disk/part_efi.c
-+++ b/disk/part_efi.c
-@@ -95,10 +95,10 @@ static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
- 
- 	/* Check the GPT header signature */
- 	if (le64_to_cpu(gpt_h->signature) != GPT_HEADER_SIGNATURE_UBOOT) {
-		printf("%s signature is wrong: 0x%llX != 0x%llX\n",
-+/*		printf("%s signature is wrong: 0x%llX != 0x%llX\n",
- 		       "GUID Partition Table Header",
- 		       le64_to_cpu(gpt_h->signature),
-		       GPT_HEADER_SIGNATURE_UBOOT);
-+		       GPT_HEADER_SIGNATURE_UBOOT); */
- 		return -1;
- 	}
- 
-@@ -682,8 +682,8 @@ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head,
- 	if (is_gpt_valid(dev_desc,
- 			 GPT_PRIMARY_PARTITION_TABLE_LBA,
- 			 gpt_head, gpt_pte) != 1) {
-		printf("%s: *** ERROR: Invalid GPT ***\n",
-		       __func__);
-+/*		printf("%s: *** ERROR: Invalid GPT ***\n",
-+		       __func__); */
- 		return -1;
- 	}
- 
-@@ -968,7 +968,7 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
- 	/* Read and allocate Partition Table Entries */
- 	*pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head);
- 	if (*pgpt_pte == NULL) {
-		printf("GPT: Failed to allocate memory for PTE\n");
-+		/* printf("GPT: Failed to allocate memory for PTE\n"); */
- 		return 0;
- 	}
- 
-@@ -1008,9 +1008,9 @@ static int find_valid_gpt(struct blk_desc *dev_desc, gpt_header *gpt_head,
- 			       __func__);
- 			return 0;
- 		}
-		if (r != 2)
-+/*		if (r != 2)
- 			printf("%s: ***        Using Backup GPT ***\n",
-			       __func__);
-+			       __func__); */
- 	}
- 	return 1;
- }
-diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
-index c52cc400e1..e64ff6c4cf 100644
--- a/fs/ext4/ext4_common.c
-+++ b/fs/ext4/ext4_common.c
-@@ -2415,7 +2415,7 @@ int ext4fs_mount(unsigned part_length)
- 
- 	return 1;
- fail:
-	printf("Failed to mount ext2 filesystem...\n");
-+/*	printf("Failed to mount ext2 filesystem...\n"); */
- fail_noerr:
- 	free(data);
- 	ext4fs_root = NULL;
-diff --git a/fs/fs.c b/fs/fs.c
-index 7a4020607a..a7bb481915 100644
--- a/fs/fs.c
-+++ b/fs/fs.c
-@@ -36,7 +36,7 @@ static int fs_type = FS_TYPE_ANY;
- static inline int fs_probe_unsupported(struct blk_desc *fs_dev_desc,
- 				      struct disk_partition *fs_partition)
- {
-	log_err("** Unrecognized filesystem type **\n");
-+/*	log_err("** Unrecognized filesystem type **\n"); */
- 	return -1;
- }
- 
-diff --git a/fs/fs_internal.c b/fs/fs_internal.c
-index bfc35c996c..35d75518d3 100644
--- a/fs/fs_internal.c
-+++ b/fs/fs_internal.c
-@@ -29,8 +29,8 @@ int fs_devread(struct blk_desc *blk, struct disk_partition *partition,
- 	/* Check partition boundaries */
- 	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
- 	    >= partition->size) {
-		log_err("%s read outside partition " LBAFU "\n", __func__,
-			sector);
-+/*		log_err("%s read outside partition " LBAFU "\n", __func__,
-+			sector); */
- 		return 0;
- 	}
- 
-diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
-index 7bd1ccec45..62663f45f8 100644
--- a/lib/efi_loader/efi_disk.c
-+++ b/lib/efi_loader/efi_disk.c
-@@ -531,7 +531,7 @@ efi_status_t efi_disk_register(void)
- 		const char *if_typename = blk_get_if_type_name(desc->if_type);
- 
- 		/* Add block device for the full device */
-		log_info("Scanning disk %s...\n", dev->name);
-+/*		log_info("Scanning disk %s...\n", dev->name); */
- 		ret = efi_disk_add_dev(NULL, NULL, if_typename,
- 					desc, desc->devnum, 0, 0, &disk);
- 		if (ret == EFI_NOT_READY) {
@@ -1,21 +0,0 @@
-From 92c21e5140288bec38eff1f5bcca63f7555b8d85 Mon Sep 17 00:00:00 2001
-From: Anton Bambura <jenneron@protonmail.com>
-Date: Tue, 24 May 2022 05:30:19 +0300
-Subject: [PATCH] add efi support
---
- configs/chromebook_speedy_defconfig | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
-index 8884d2d3da..1301e3e4ff 100644
--- a/configs/chromebook_speedy_defconfig
-+++ b/configs/chromebook_speedy_defconfig
-@@ -105,4 +105,5 @@ CONFIG_CONSOLE_SCROLL_LINES=10
- CONFIG_SPL_TINY_MEMSET=y
- CONFIG_CMD_DHRYSTONE=y
- CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set
-+CONFIG_CMD_BOOTEFI=y
-+CONFIG_EFI_LOADER=y
--
-2.25.1
@@ -1,59 +0,0 @@
-# Maintainer: Jenneron <jenneron@protonmail.com>
-pkgname=u-boot-veyron-speedy
-pkgver=2021.01
-pkgrel=0
-pkgdesc="U-Boot for ASUS Chromebook C201"
-url="https://www.denx.de/wiki/U-Boot/"
-arch="armv7"
-license="GPL-2.0-or-later OFL-1.1 BSD-2-Clause BSD-3-Clause eCos-2.0 IBM-pibs
-	ISC LGPL-2.0-only LGPL-2.1-only X11"
-options="!check" # no tests in upstream
-makedepends="$depends_dev bc dtc python3-dev swig bison flex openssl-dev
-	py3-setuptools linux-headers u-boot-tools vboot-utils"
-source="
-	https://ftp.denx.de/pub/u-boot/u-boot-${pkgver//_/-}.tar.bz2
-	0001-chainloading-v2021.01.patch
-	0002-supress-efi-errors-v2021.01.patch
-	0003-add-efi-support.patch
-	chromebook_speedy.its
-"
-
-builddir="$srcdir"/u-boot-${pkgver//_/-}
-
-prepare() {
-	default_prepare
-}
-
-build() {
-	make chromebook_speedy_defconfig
-	make
-
-	cp "$srcdir"/chromebook_speedy.its ./
-	mkimage -f chromebook_speedy.its u-boot-dtb.img
-
-	echo -e "\n" > dummy_config
-	echo -e "\n" > dummy_bootloader
-
-	vbutil_kernel \
-		--pack u-boot-dtb.img.kpart \
-		--keyblock /usr/share/vboot/devkeys/kernel.keyblock \
-		--signprivate /usr/share/vboot/devkeys/kernel_data_key.vbprivk \
-		--version 1 \
-		--arch arm \
-		--config dummy_config \
-		--bootloader dummy_bootloader \
-		--vmlinuz u-boot-dtb.img
-}
-
-package() {
-	install -D -m644 "$builddir"/u-boot-dtb.img.kpart \
-		"$pkgdir"/usr/share/u-boot/google-veyron-speedy/u-boot-dtb.img.kpart
-}
-
-sha512sums="
-40dd4d9ef87a1829158658c433d46a047a39c0d8c314ad8d133f7240343ee3a75b060f009dd2efe598cfb8a766773f6cd773ea7f7745ee88e52a771c77eb1c6e  u-boot-2021.01.tar.bz2
-53e12dece9eb7ab4d5317ac2570714954c3158f1717abe729deca454244a97f885ae9cc571bab4f80a5b65d6dde7752242ac856138eede347fde719ff21a6097  0001-chainloading-v2021.01.patch
-b3fd3e1fea09f947b2f0b35dc5a4abd2bf8215907942a88c36685973d08112b74e5cc2e5fc3666a8d27a9f37873dfaedf2136f52c2756c9c97cbb8ad0472478c  0002-supress-efi-errors-v2021.01.patch
-789e50a7d01308f2eba442fe20ab93e2a3c2e47af00a20bc6f5cca7a7f91f8fa266884dd88712a28673c2191b0499f866ff560771169986b0d60387ebfdc8211  0003-add-efi-support.patch
-2944e710882522748816e2027eee9a9bfd16385ffa6ab051c385ad7ff04b663863e69273972c5988ad64ca7b3b71ee46937818490b1dbad6eb75928c1db7440a  chromebook_speedy.its
-"
@@ -1,42 +0,0 @@
-/dts-v1/;
-
-/ {
-	description = "U-Boot mainline";
-	#address-cells = <1>;
-
-	images {
-		kernel@1 {
-			description = "U-Boot mainline";
-			type = "kernel_noload";
-			arch = "arm";
-			os = "linux";
-			data = /incbin/("./u-boot.bin");
-			compression = "none";
-			load = <0>;
-			entry = <0>;
-			hash@2 {
-				algo = "sha1";
-			};
-		};
-
-		fdt@1{
-			description = "U-Boot dummy dtb";
-			data = /incbin/("./u-boot.dtb");
-			type = "flat_dt";
-			arch = "arm";
-			compression = "none";
-			hash@1{
-				algo = "sha1";
-			};
-		};
-	};
-
-	configurations {
-		default = "config@1";
-		config@1 {
-			description = "Boot U-Boot";
-			kernel = "kernel@1";
-			fdt = "fdt@1";
-		};
-	};
-};
@@ -0,0 +1,59 @@
+From e093b4722643682910d9bc2f1333fbf095712b20 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Fri, 7 Jul 2023 16:11:37 +0300
+Subject: [PATCH 1/7] rockchip: veyron: Enable RESET driver
+
+Commit 70e351bdfeee ("rockchip: jerry: Enable RESET driver") enables
+DM_RESET for chromebook_jerry to fix its display as required by changes
+to the Rockchip video drivers. Enable it for other veyron boards as
+well.
+
+Fixes: cd529f7ad62 ("rockchip: video: edp: Add missing reset support")
+Fixes: 9749d2ea29e ("rockchip: video: vop: Add reset support")
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+
+ configs/chromebit_mickey_defconfig  | 1 +
+ configs/chromebook_minnie_defconfig | 1 +
+ configs/chromebook_speedy_defconfig | 1 +
+ 3 files changed, 3 insertions(+)
+
+diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
+index d4302353c5df..a7c6213a9892 100644
+--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
+@@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
+ CONFIG_SF_DEFAULT_SPEED=20000000
+ CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
+ CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_DM_RESET=y
+ CONFIG_SYS_MONITOR_LEN=614400
+ CONFIG_ROCKCHIP_RK3288=y
+ # CONFIG_SPL_MMC is not set
+diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
+index 73ab2f62af5e..8a4e1858c8bd 100644
+--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
+@@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
+ CONFIG_SF_DEFAULT_SPEED=20000000
+ CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
+ CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_DM_RESET=y
+ CONFIG_SYS_MONITOR_LEN=614400
+ CONFIG_ROCKCHIP_RK3288=y
+ # CONFIG_SPL_MMC is not set
+diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
+index 06437aae18d6..45c22f5b103a 100644
+--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
+@@ -10,6 +10,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
+ CONFIG_SF_DEFAULT_SPEED=20000000
+ CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
+ CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_DM_RESET=y
+ CONFIG_SYS_MONITOR_LEN=614400
+ CONFIG_ROCKCHIP_RK3288=y
+ # CONFIG_SPL_MMC is not set
+-- 
+2.40.1
+
@@ -0,0 +1,53 @@
+From 981b7635d5fbac38a3cafa9d0b78f32135becfca Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Fri, 7 Jul 2023 16:25:37 +0300
+Subject: [PATCH 2/7] rockchip: veyron: Enable building SPI ROM images
+
+Commit 9b312e26fc77 ("rockchip: Enable building a SPI ROM image on
+jerry") produces a u-boot.rom file for chromebook_jerry, intended to be
+written to SPI flash. Build this file for other veyron boards as well,
+especially because they are already configured only to boot from SPI.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+
+ arch/arm/mach-rockchip/rk3288/Kconfig | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
+index ea94ad114247..69a5614b449a 100644
+--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
+@@ -16,7 +16,9 @@ config TARGET_CHROMEBOOK_JERRY
+ 
+ config TARGET_CHROMEBIT_MICKEY
+ 	bool "Google/Rockchip Veyron-Mickey Chromebit"
+	select HAS_ROM
+ 	select BOARD_LATE_INIT
+	select ROCKCHIP_SPI_IMAGE
+ 	help
+ 	  Mickey is a small RK3288-based device with one USB 3.0 port, HDMI
+ 	  and WiFi. It has a separate power port and is designed to connect
+@@ -26,7 +28,9 @@ config TARGET_CHROMEBIT_MICKEY
+ 
+ config TARGET_CHROMEBOOK_MINNIE
+ 	bool "Google/Rockchip Veyron-Minnie Chromebook"
+	select HAS_ROM
+ 	select BOARD_LATE_INIT
+	select ROCKCHIP_SPI_IMAGE
+ 	help
+ 	  Minnie is a RK3288-based convertible clamshell device with 2 USB 3.0
+ 	  ports, micro HDMI, a 10.1-inch 1280x800 EDP display, micro-SD card,
+@@ -37,7 +41,9 @@ config TARGET_CHROMEBOOK_MINNIE
+ 
+ config TARGET_CHROMEBOOK_SPEEDY
+ 	bool "Google/Rockchip Veyron-Speedy Chromebook"
+	select HAS_ROM
+ 	select BOARD_LATE_INIT
+	select ROCKCHIP_SPI_IMAGE
+ 	help
+ 	  Speedy is a RK3288-based clamshell device with 2 USB 2.0 ports,
+ 	  micro HDMI, an 11.6 inch display, micro-SD card,
+-- 
+2.40.1
+
@@ -0,0 +1,59 @@
+From a7bf5a5461e682e3a1f7f2cebce0a01e1f348c76 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Fri, 7 Jul 2023 16:21:08 +0300
+Subject: [PATCH 3/7] rockchip: veyron: Unify u-boot.dtsi bootph-all fragments
+
+The rk3288-veyron-speedy-u-boot.dtsi file duplicates the bootphase dts
+fragments from rk3288-veyron-u-boot.dtsi even though it #inclues that.
+Deduplicate these into the latter file, which should also make the eMMC
+available to the other veyron boards' SPL.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+
+ arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 16 ----------------
+ arch/arm/dts/rk3288-veyron-u-boot.dtsi        |  4 ++++
+ 2 files changed, 4 insertions(+), 16 deletions(-)
+
+diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+index 90ce9e1395de..2a4ba44e0bf9 100644
+--- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+@@ -15,19 +15,3 @@ &dmc {
+ 		0x0 0xc3 0x6 0x1>;
+ 	rockchip,sdram-params = <0x20D266A4 0x5B6 6 533000000 6 13 0>;
+ };
+-
+-&sdmmc {
+-	bootph-all;
+-};
+-
+-&emmc {
+-	bootph-all;
+-};
+-
+-&uart2 {
+-	bootph-all;
+-};
+-
+-&pinctrl {
+-	bootph-all;
+-};
+diff --git a/arch/arm/dts/rk3288-veyron-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-u-boot.dtsi
+index ab564e73ed00..4f9c59c67573 100644
+--- a/arch/arm/dts/rk3288-veyron-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-veyron-u-boot.dtsi
+@@ -31,6 +31,10 @@ &dmc {
+ 	>;
+ };
+ 
+&emmc {
+	bootph-all;
+};
+
+ &gpio3 {
+ 	bootph-all;
+ };
+-- 
+2.40.1
+
@@ -0,0 +1,85 @@
+From dcbd49ab8493b92f0b93ec798c222dc3e8e33bd6 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Fri, 7 Jul 2023 16:45:13 +0300
+Subject: [PATCH 4/7] rockchip: veyron: Add serial, logging, silent console
+ support
+
+Commit eba768c54587 ("rockchip: jerry: Add serial support") enables
+ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work
+correctly. Enable it also for other veyron boards.
+
+Also enable logging and disable scrolling multiple lines at once as in
+chromebook_jerry, and enable silent console as chromebook_minnie does.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+
+ configs/chromebit_mickey_defconfig  | 3 +++
+ configs/chromebook_minnie_defconfig | 3 ++-
+ configs/chromebook_speedy_defconfig | 1 +
+ 3 files changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
+index a7c6213a9892..f45b14b9d3d1 100644
+--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
+@@ -26,6 +26,8 @@ CONFIG_SPL_PAYLOAD="u-boot.img"
+ CONFIG_DEBUG_UART=y
+ CONFIG_USE_PREBOOT=y
+ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
+CONFIG_SILENT_CONSOLE=y
+CONFIG_LOG=y
+ # CONFIG_DISPLAY_CPUINFO is not set
+ CONFIG_DISPLAY_BOARDINFO_LATE=y
+ CONFIG_BOARD_EARLY_INIT_R=y
+@@ -96,6 +98,7 @@ CONFIG_RAM=y
+ CONFIG_SPL_RAM=y
+ CONFIG_DEBUG_UART_SHIFT=2
+ CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SERIAL=y
+ CONFIG_ROCKCHIP_SPI=y
+ CONFIG_SYSRESET=y
+ CONFIG_USB=y
+diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
+index 8a4e1858c8bd..01964d13754e 100644
+--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
+@@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y
+ CONFIG_USE_PREBOOT=y
+ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
+ CONFIG_SILENT_CONSOLE=y
+CONFIG_LOG=y
+ # CONFIG_DISPLAY_CPUINFO is not set
+ CONFIG_DISPLAY_BOARDINFO_LATE=y
+ CONFIG_BOARD_EARLY_INIT_R=y
+@@ -98,6 +99,7 @@ CONFIG_RAM=y
+ CONFIG_SPL_RAM=y
+ CONFIG_DEBUG_UART_SHIFT=2
+ CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SERIAL=y
+ CONFIG_SOUND=y
+ CONFIG_I2S=y
+ CONFIG_I2S_ROCKCHIP=y
+@@ -114,7 +116,6 @@ CONFIG_DISPLAY=y
+ CONFIG_VIDEO_ROCKCHIP=y
+ CONFIG_DISPLAY_ROCKCHIP_EDP=y
+ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+-CONFIG_CONSOLE_SCROLL_LINES=10
+ CONFIG_SPL_TINY_MEMSET=y
+ CONFIG_CMD_DHRYSTONE=y
+ CONFIG_ERRNO_STR=y
+diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
+index 45c22f5b103a..f8f2a280f6cf 100644
+--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
+@@ -27,6 +27,7 @@ CONFIG_DEBUG_UART=y
+ CONFIG_USE_PREBOOT=y
+ CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
+ CONFIG_SILENT_CONSOLE=y
+CONFIG_LOG=y
+ # CONFIG_DISPLAY_CPUINFO is not set
+ CONFIG_DISPLAY_BOARDINFO_LATE=y
+ CONFIG_BOARD_EARLY_INIT_R=y
+-- 
+2.40.1
+
@@ -0,0 +1,54 @@
+From 859ada4302ab783367651626960298475d2a0ddc Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Fri, 7 Jul 2023 19:32:13 +0300
+Subject: [PATCH 5/7] rockchip: veyron: Use TrueType fonts
+
+Commit 815ed79d8338 ("video: rockchip: Use TrueType fonts with jerry")
+enables makes chromebook_jerry use TrueType fonts. Make other veyron
+boards switch to it as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+I have no idea why that commit disables USE_PRIVATE_LIBGCC, but I'm
+following that change here.
+
+ configs/chromebit_mickey_defconfig  | 2 ++
+ configs/chromebook_minnie_defconfig | 2 ++
+ 2 files changed, 4 insertions(+)
+
+diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
+index f45b14b9d3d1..81efa0fd4cc6 100644
+--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
+@@ -107,9 +107,11 @@ CONFIG_USB_DWC2=y
+ CONFIG_ROCKCHIP_USB2_PHY=y
+ CONFIG_VIDEO=y
+ # CONFIG_VIDEO_BPP8 is not set
+CONFIG_CONSOLE_TRUETYPE=y
+ CONFIG_DISPLAY=y
+ CONFIG_VIDEO_ROCKCHIP=y
+ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+# CONFIG_USE_PRIVATE_LIBGCC is not set
+ CONFIG_SPL_TINY_MEMSET=y
+ CONFIG_CMD_DHRYSTONE=y
+ CONFIG_ERRNO_STR=y
+diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
+index 01964d13754e..e2302074e8b3 100644
+--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
+@@ -112,10 +112,12 @@ CONFIG_USB_DWC2=y
+ CONFIG_ROCKCHIP_USB2_PHY=y
+ CONFIG_VIDEO=y
+ # CONFIG_VIDEO_BPP8 is not set
+CONFIG_CONSOLE_TRUETYPE=y
+ CONFIG_DISPLAY=y
+ CONFIG_VIDEO_ROCKCHIP=y
+ CONFIG_DISPLAY_ROCKCHIP_EDP=y
+ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+# CONFIG_USE_PRIVATE_LIBGCC is not set
+ CONFIG_SPL_TINY_MEMSET=y
+ CONFIG_CMD_DHRYSTONE=y
+ CONFIG_ERRNO_STR=y
+-- 
+2.40.1
+
@@ -0,0 +1,32 @@
+From ed6b53360701501acf20012dd5969db99f3c707e Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Fri, 7 Jul 2023 18:30:48 +0300
+Subject: [PATCH 6/7] rockchip: chromebook_jerry: Re-enable MAX98090 codec
+ driver
+
+Sound support for chromebook_jerry needs the MAX98090 codec driver. This
+was enabled in commit 2d0c01b8f0ad ("sound: rockchip: Add sound support
+for jerry"), but apparently lost in commit 7ae2729401bb ("configs:
+Resync with savedefconfig"). Enable it again.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+
+ configs/chromebook_jerry_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
+index 1a54986d089e..5b601a0b5809 100644
+--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
+@@ -102,6 +102,7 @@ CONFIG_ROCKCHIP_SERIAL=y
+ CONFIG_SOUND=y
+ CONFIG_I2S=y
+ CONFIG_I2S_ROCKCHIP=y
+CONFIG_SOUND_MAX98090=y
+ CONFIG_ROCKCHIP_SPI=y
+ CONFIG_SYSRESET=y
+ CONFIG_USB=y
+-- 
+2.40.1
+
@@ -0,0 +1,71 @@
+From 83ced846c7ec6cf4c965b0397686bee27049de31 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Fri, 7 Jul 2023 16:49:18 +0300
+Subject: [PATCH 7/7] rockchip: chromebook_speedy: Enable sound
+
+Commit ec107f04b619 ("rockchip: chromebook_minnie: Enable sound") and
+commit 2d0c01b8f0ad ("sound: rockchip: Add sound support for jerry")
+enable audio support for chromebook_minnie and chromebook_jerry. Enable
+it for chromebook_speedy as well, but put the non-upstream sound node
+in the board -u-boot.dtsi instead.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+Not enabling these for chromebit_mickey, as that'd use HDMI in a way I
+don't know how.
+
+ arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 14 ++++++++++++++
+ configs/chromebook_speedy_defconfig           |  5 +++++
+ 2 files changed, 19 insertions(+)
+
+diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+index 2a4ba44e0bf9..6bfa84906e35 100644
+--- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+@@ -5,6 +5,20 @@
+ 
+ #include "rk3288-veyron-u-boot.dtsi"
+ 
+/ {
+	sound {
+		compatible = "rockchip,audio-max98090-jerry";
+
+		cpu {
+			sound-dai = <&i2s 0>;
+		};
+
+		codec {
+			sound-dai = <&max98090 0>;
+		};
+	};
+};
+
+ &dmc {
+ 	rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
+ 		0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
+diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
+index f8f2a280f6cf..15b6e21095db 100644
+--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
+@@ -52,6 +52,7 @@ CONFIG_CMD_USB=y
+ # CONFIG_CMD_SETEXPR is not set
+ CONFIG_CMD_CACHE=y
+ CONFIG_CMD_TIME=y
+CONFIG_CMD_SOUND=y
+ CONFIG_CMD_PMIC=y
+ CONFIG_CMD_REGULATOR=y
+ # CONFIG_SPL_DOS_PARTITION is not set
+@@ -99,6 +100,10 @@ CONFIG_SPL_RAM=y
+ CONFIG_DEBUG_UART_SHIFT=2
+ CONFIG_SYS_NS16550_MEM32=y
+ CONFIG_ROCKCHIP_SERIAL=y
+CONFIG_SOUND=y
+CONFIG_I2S=y
+CONFIG_I2S_ROCKCHIP=y
+CONFIG_SOUND_MAX98090=y
+ CONFIG_ROCKCHIP_SPI=y
+ CONFIG_SYSRESET=y
+ CONFIG_USB=y
+-- 
+2.40.1
+
@@ -0,0 +1,72 @@
+# Maintainer: Jenneron <jenneron@protonmail.com>
+pkgname=u-boot-veyron
+pkgver=2023.07_rc6
+pkgrel=0
+pkgdesc="u-boot for Google Veyron chromebooks"
+url="https://www.denx.de/wiki/U-Boot/"
+arch="armv7"
+license="GPL-2.0-or-later OFL-1.1 BSD-2-Clause BSD-3-Clause eCos-2.0 IBM-pibs
+	ISC LGPL-2.0-only LGPL-2.1-only X11"
+options="!check" # no tests in upstream
+makedepends="$depends_dev bc dtc python3-dev swig bison flex openssl-dev
+	py3-setuptools linux-headers u-boot-tools vboot-utils"
+source="
+	https://ftp.denx.de/pub/u-boot/u-boot-${pkgver//_/-}.tar.bz2
+	0001-rockchip-veyron-Enable-RESET-driver.patch
+	0002-rockchip-veyron-Enable-building-SPI-ROM-images.patch
+	0003-rockchip-veyron-Unify-u-boot.dtsi-bootph-all-fragmen.patch
+	0004-rockchip-veyron-Add-serial-logging-silent-console-su.patch
+	0005-rockchip-veyron-Use-TrueType-fonts.patch
+	0006-rockchip-chromebook_jerry-Re-enable-MAX98090-codec-d.patch
+	0007-rockchip-chromebook_speedy-Enable-sound.patch
+	"
+builddir="$srcdir"/u-boot-${pkgver//_/-}
+
+_boards="
+	chromebit_mickey
+	chromebook_jerry
+	chromebook_minnie
+	chromebook_speedy
+	"
+
+subpackages="$(
+	for board in $_boards; do
+		printf "%s-%s:_subpkg\n" "$pkgname" "${board##*_}"
+	done
+)"
+
+prepare() {
+	default_prepare
+}
+
+build() {
+	for board in $_boards
+	do
+		_dir="${board##*_}"
+		mkdir "$_dir"
+		make O="$_dir" "$board"_defconfig all
+	done
+}
+
+package() {
+	mkdir -p "$pkgdir"
+}
+
+_subpkg() {
+	local board=${subpkgname##*u-boot-veyron-}
+	pkgdesc="U-Boot for $board"
+
+	install -Dm644 "$builddir"/"$board"/u-boot.rom \
+		-t "$subpkgdir"/usr/share/u-boot/google-veyron-"$board"
+}
+
+sha512sums="
+022518ca1ca372f3aa0983920d0df71b6d14ecec37a07c2202058923bfa1993ba2a79a96ecc482214619eed97a4d92a4d0e1e2033caf5063c9b2679ee70784d0  u-boot-2023.07-rc6.tar.bz2
+10b8b6bc79df41aefccbe6fe6b61c944c34527ef3e982f425951a8a0deb1fc5f8f9ff9e6b1c3b5d8cf675b14dc9f12291659c4051aa42f1cd635462be43eba67  0001-rockchip-veyron-Enable-RESET-driver.patch
+15cbcb1beb8e0c06424030e06b1bf74134141009930da7f26dd9f09992326a59fa2a2a5f89522636e65b9f94e31b68a092ed7eab1b9afaa16c5ca15d85640c67  0002-rockchip-veyron-Enable-building-SPI-ROM-images.patch
+fe9340247bd5a49d34ca63eff8dca2a0ba634440f422e5a902a8c298e41f1d3765e49420f1931a98621129d248e5337aa2623665cca9205128da0d493681c118  0003-rockchip-veyron-Unify-u-boot.dtsi-bootph-all-fragmen.patch
+8c20dfe4c197416b5fe7023cb02a82fd53d09129818c731187328eeedf15f40739e7413429d31f7a0a2cbca373debb7932032a26468d2a51106fa59fec3ad3ef  0004-rockchip-veyron-Add-serial-logging-silent-console-su.patch
+9e3272db4b4bff10f839464d8b4a343d901f99f67791a2f3d60c12a8f390ee28e503bc164c52814669e4c6762083f6097016a2d328e5161aff8f3c02f7d775c7  0005-rockchip-veyron-Use-TrueType-fonts.patch
+4b61edd48056f49c51252eec66624d39ed17bed5ba6b6ef359e5dc25243ec6d499bc3b92ceaeead7c6156a98d0639d1bd45f6bb1b36eaaf07a1d9c85d7052f2d  0006-rockchip-chromebook_jerry-Re-enable-MAX98090-codec-d.patch
+9edf74da27dbcab094b975a9a4dfec890790a01222fd1119c43db50efad12a79edacdec8128b71e5bf17d984b4e47f06bb7c64c6195b2354fd2a6c21ba2303cf  0007-rockchip-chromebook_speedy-Enable-sound.patch
+"